IDT74FCT162374ATE [IDT]
FAST CMOS 16-BIT REGISTER (3-STATE); FAST CMOS 16位寄存器（三态）
| 型号： | IDT74FCT162374ATE |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS 16-BIT REGISTER (3-STATE) |
| 文件： | 总8页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT16374T/AT/CT/ET
IDT54/74FCT162374T/AT/CT/ET
FAST CMOS 16-BIT
REGISTER (3-STATE)
Integrated Device Technology, Inc.
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16374T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
DESCRIPTION:
The FCT16374T/AT/CT/ET and FCT162374T/AT/CT/ET
16-bit edge-triggered D-type registers are built using ad-
vanced dual metal CMOS technology. These high-speed,
low-power registers are ideal for use as buffer registers for
data synchronization and storage. The Output Enable (xOE)
and clock (xCLK) controls are organized to operate each
device as two 8-bit registers or one 16-bit register with
common clock. Flow-through organization of signal pins sim-
plifies layout. All inputs are designed with hysteresis for
improved noise margin.
The FCT16374T/AT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162374T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times– reduc-
ing the need for external series terminating resistors. The
FCT162374T/AT/CT/ET are plug-in replacements for the
FCT16374T/AT/CT/ETandABT16374foron-boardbusinter-
face applications.
• Features for FCT162374T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
FUNCTIONAL BLOCK DIAGRAM
2OE
1OE
1CLK
2CLK
1D1
2D1
D
C
D
C
2O1
1O1
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
2542 drw 01
2542 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.8
DSC-4230/9
1
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1CLK
1D1
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1CLK
1D1
1OE
1O1
1O2
GND
1O3
1O4
VCC
1O5
1O6
GND
1O7
1O8
2O1
2O2
GND
2O3
2O4
VCC
2O5
2O6
GND
2O7
2O8
1OE
1O1
2
2
1O2
GND
1O3
1O4
VCC
1O5
1O6
GND
1O7
1O8
2O1
2O2
GND
2O3
2O4
VCC
2O5
2O6
GND
2O7
2O8
3
1D2
3
1D2
4
GND
1D3
4
GND
1D3
5
5
6
1D4
6
1D4
7
VCC
1D5
7
VCC
1D5
8
8
9
1D6
9
1D6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
1D7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
1D7
SO48-1
SO48-2
SO48-3
1D8
1D8
E48-1
2D1
2D1
2D2
2D2
GND
2D3
GND
2D3
2D4
2D4
VCC
2D5
VCC
2D5
2D6
2D6
GND
2D7
GND
2D7
2D8
2D8
2CLK
2OE
2CLK
2OE
2542 drw 03
2542 drw 04
SSOP/
TSSOP/TVSOP
TOP VIEW
CERPACK
TOP VIEW
5.8
2
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE(1)
PIN DESCRIPTION
Inputs
Outputs
Pin Names
Description
xDx
Data Inputs
Function
Hi-Z
xDx
X
xCLK
x
xOx
Z
OE
H
H
L
xCLK
xOx
Clock Inputs
3-State Outputs.
L
H
↑
↑
↑
↑
X
Z
xOE
3-State Output Enable Input (Active LOW)
Load
L
L
Register
H
L
H
2542 tbl 01
L
H
H
Z
H
Z
NOTE:
2542 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
↑ = LOW-to-HIGH Transition
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Input
Capacitance
I/O
Conditions
Typ. Max. Unit
Symbol
Description
Max.
Unit
(2) Terminal Voltage with Respect to
CIN
VIN = 0V
3.5
6.0
pF
V
TERM
TERM
–0.5 to +7.0
V
GND
(3) Terminal Voltage with Respect to
GND
V
–0.5 to
CC +0.5
V
CI/O
VOUT = 0V
3.5
8.0
pF
V
Capacitance
T
STG
Storage Temperature
DC Output Current
–65 to +150
°C
2542 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
I
OUT
–60 to +120 mA
2542 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
5.8
3
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
—
—
—
—
–80
—
—
—
—
—
0.8
±1
V
VIL
II H
Input LOW Level
Guaranteed Logic LOW Level
V
Input HIGH Current (Input pins)(5)
Input HIGH Current (I/O pins)(5)
Input LOW Current (Input pins)(5)
Input LOW Current (I/O pins)(5)
High Impedance Output Current
(3-State Output pins)(5)
VCC = Max.
VI = VCC
—
µA
—
±1
II L
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µA
—
±1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
—
–0.7
–140
100
5
–1.2
–225
—
V
IOS
VH
Short Circuit Current
mA
mV
µA
Input Hysteresis
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
500
2542 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16374T
Symbol
Parameter
Test Conditions(1)
VCC = Max., VO = 2.5V(3)
Min. Typ.(2) Max.
Unit
IO
Output Drive Current
–50
2.5
2.4
—
3.5
3.5
–180
—
mA
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3mA
V
V
VIN = VIH or VIL
IOH = –12mA MIL.
IOH = –15mA COM'L.
IOH = –24mA MIL.
IOH = –32mA COM'L.(4)
IOL = 48mA MIL.
—
2.0
—
3.0
0.2
—
—
0.55
±1
V
V
VOL
Output LOW Voltage
VCC = Min.
VIN = VIH or VIL
IOL = 64mA COM'L.
IOFF
Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V
—
µA
2542 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT162374T
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
I
I
ODL
Output LOW Current
V
CC = 5V, VIN = VIH or VIL,
CC = 5V, VIN = VIH or VIL,
V
OUT = 1.5V(3)
60
–60
2.4
115
200
mA
V
OUT = 1.5V(3)
ODH
Output HIGH Current
Output HIGH Voltage
V
–115 –200
mA
V
V
OH
OL
V
V
V
V
CC = Min.
I
OH = –16mA MIL.
OH = –24mA COM'L.
OL = 16mA MIL.
3.3
0.3
—
IN = VIH or VIL
CC = Min.
IN = VIH or VIL
I
I
I
V
Output LOW Voltage
—
0.55
V
OL = 24mA COM'L.
2542 lnk 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
5.8
4
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
1.5
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
xOE = GND
VIN = VCC
VIN = GND
—
60
100
µA/
MHz
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN = VCC
VIN = GND
—
—
0.6
1.1
1.5
3.0
mA
Outputs Open
fCP = 10MHz
50% Duty Cycle
xOE = GND
VIN = 3.4V
VIN = GND
fi = 5MHz
50% Duty Cycle
One Bit Toggling
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
xOE = GND
Sixteen Bits Toggling
fi = 2.5MHz
VIN = VCC
VIN = GND
—
—
3.0
7.5
5.5(5)
VIN = 3.4V
VIN = GND
19.0(5)
50% Duty Cycle
2542 tbl 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
5.8
5
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16374T/162374T
FCT16374AT/162374AT
Com'l. Mil.
Com'l.
Mil.
Symbol
Parameter
Propagation Delay
xCLK to xOx
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
2.0
1.5
1.5
2.0
1.5
7.0
—
10.0
2.0
11.0
2.0
1.5
1.5
2.0
1.5
5.0
—
6.5
2.0
7.2
ns
Output Enable Time
12.5
8.0
—
1.5
1.5
2.0
1.5
7.0
—
14.0
8.0
—
6.5
5.5
—
1.5
1.5
2.0
1.5
6.0
—
7.5
6.5
—
ns
ns
ns
ns
ns
ns
Output Disable Time
Set-up Time HIGH
or LOW, xDx to xCLK
Hold Time HIGH
or LOW, xDx to xCLK
xCLK Pulse Width
HIGH or LOW
tH
—
—
—
—
tW
—
—
—
—
tSK(o) Output Skew(3)
0.5
0.5
0.5
0.5
FCT16374CT/162374CT
Com'l. Mil.
FCT16374ET/162374ET
Com'l. Mil.
Symbol
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Propagation Delay
xCLK to xOx
2.0
5.2
2.0
6.2
1.5
3.7
—
—
ns
Output Enable Time
1.5
1.5
2.0
1.5
5.0
—
5.5
5.0
—
1.5
1.5
2.0
1.5
6.0
—
6.2
5.7
—
1.5
1.5
4.4
3.6
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
Output Disable Time
Set-up Time HIGH
or LOW, xDx to xCLK
Hold Time HIGH
or LOW, xDx to xCLK
xCLK Pulse Width
HIGH or LOW
1.5
tH
—
—
0.0
—
tW
—
—
3.0(4)
—
—
tSK(o) Output Skew(3)
0.5
0.5
0.5
ns
2542 tbl 09
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
5.8
6
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
Switch
VCC
7.0V
Open Drain
Disable Low
Closed
500
500
Ω
Ω
Enable Low
VOUT
VIN
Open
Pulse
Generator
All Other Tests
D.U.T.
2542 lnk 10
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
50pF
T
R
C
L
Generator.
2542 drw 05
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
INPUT
0V
3V
1.5V
0V
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
t
REM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
2542 drw 07
3V
1.5V
0V
CLEAR
tSU
t
H
CLOCK ENABLE
ETC.
2542 drw 06
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
t
PHL
PHL
t
PZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VOL
t
PLH
0.3V
0.3V
V
OL
3V
1.5V
0V
t
PZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
2542 drw 08
0V
2542 drw 09
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5.8
7
IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
XXXX
X
X
Temp. Range
Package
Process
Device Type
Blank
B
Commercial
MIL-STD-883, Class B
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
CERPACK (E48-1)
PV
PA
PF
E
Non-Inverting 16-Bit Register
16374T
16374AT
16374CT
16374ET
162374T
162374AT
162374CT
162374ET
54
74
–55°C to +125°C
–40°C to +85°C
2542 drw 10
5.8
8
相关型号：
IDT74FCT162374ATEG
Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP48, 0.635 INCH PITCH, CERPACK-48
IDT
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