IDT74FCT162H244CTPAG [IDT]
Bus Driver, FCT Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, TSSOP-48;
| 型号： | IDT74FCT162H244CTPAG |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Bus Driver, FCT Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, TSSOP-48 驱动 输入元件 光电二极管 逻辑集成电路 |
| 文件： | 总6页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS 16-BIT
BUFFER/LINE DRIVER
IDT74FCT162H244AT/CT
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
The FCT162H244T16-BitBuffer/Line Driveris forbus interface orsignal
bufferingapplicationsrequiringhighspeedandlowpowerdissipation. These
deviceshaveaflowthroughpinorganization,andshrinkpackagingtosimplify
boardlayout. Allinputsaredesignedwithhysteresisforimprovednoisemargin.
The three-state controls allow independent 4-bit, 8-bit or combined 16-bit
operation. Thesepartsarepluginreplacementsfor74ABT16244wherehigher
speed, lower noise or lower power dissipation levels are desired.
The FCT162H244T has "Bus-Hold" which retains the input's last state
whenevertheinputgoestohighimpedance. Thisprevents"floating"inputsand
eliminatestheneedforpull-up/downresistors.
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤ 1µA (max.)
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• Bus-Hold retains last active bus state during 3-state
• Eliminates the need for external pull up resistors
• Available in TSSOP and SSOP packages
FUNCTIONALBLOCKDIAGRAM
1OE
3OE
1Y1
1A1
1A2
3A1
3A2
3Y1
3Y2
1Y2
1Y3
3A3
3A4
1A3
1A4
3Y3
3Y4
1Y4
4OE
2OE
2Y1
4A1
4A2
4A3
2A1
2A2
4Y1
4Y2
4Y3
2Y2
2Y3
2Y4
2A3
2A4
4A4
4Y4
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
MAY 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5463/3
IDT74FCT162H244AT/CT
FASTCMOS16-BITBUFFER/LINEDRIVER
INDUSTRIALTEMPERATURERANGE
PINCONFIGURATION
ABSOLUTEMAXIMUMRATINGS(1)
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to 7
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
(3)
1OE
1Y1
2OE
1A1
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
° C
mA
2
3
1Y2
1A2
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
GND
4
GND
5
1Y3
1A3
6
1Y4
1A4
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT and FCT166XXXT.
VCC
7
VCC
8
2Y1
2A1
CAPACITANCE (TA = +25°C, f = 1.0MHz)
9
2A2
2Y2
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
GND
CIN
VIN = 0V
3.5
6
8
pF
pF
COUT
VOUT = 0V
3.5
2A3
2A4
3A1
2Y3
2Y4
3Y1
NOTE:
1. This parameter is measured at characterization but not tested.
PINDESCRIPTION
3A2
3Y2
Pin Names
Description
3-StateOutputsEnableInput(ActiveLOW)
DataInputs(1)
GND
GND
xOE
xAx
3A3
3Y3
3Y4
VCC
xYx
3-StateOutputs
3A4
NOTE:
VCC
1. These pins have “Bus-hold”. All other pins are standard inputs, outputs, or I/Os.
4A1
4Y1
FUNCTIONTABLE(1, 2)
4A2
4Y2
Inputs
Output
GND
GND
xOE
L
xAx
L
xYx
L
4A3
4A4
4Y3
4Y4
L
H
H
H
X
Z
4OE
3OE
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
SSOP/ TSSOP
TOP VIEW
2
IDT74FCT162H244AT/CT
FASTCMOS16-BITBUFFER/LINEDRIVER
INDUSTRIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
Symbol
VIH
Parameter
Input HIGH Level
TestConditions(1)
GuaranteedLogicHIGHLevel
GuaranteedLogicLOWLevel
Min.
2
Typ.(2)
—
Max.
—
Unit
V
VIL
InputLOWLevel
Input
—
—
—
—
—
—
—
—
—
–50
50
—
0.8
V
IIH
StandardInput(5) VCC = Max.
VI = VCC
—
±1
µA
(5)
HIGH
StandardI/O
—
±1
Current(4)
Bus-holdInput
—
±100
±100
±1
Bus-hold I/O
—
IIL
Input
StandardInput(5)
VI = GND
—
(5)
LOW
StandardI/O
—
±1
Current(4)
Bus-holdInput
Bus-hold I/O
Bus-holdInput
—
±100
±100
—
—
IBHH
IBHL
IOZH
IOZL
VIK
Bus-holdSustain
Current(4)
VCC = Min.
VCC = Max.
VI = 2.0V
VI = 0.8V
VO = 2.7V
VO = 0.5V
—
µ A
µ A
—
—
HighImpedanceOutputCurrent
(3-StateOutputpins)(5,6)
ClampDiodeVoltage
—
—
—
–80
—
—
—
±1
—
±1
VCC = Min., IIN = –18mA
–0.7
–140
100
5
–1.2
–250
—
V
(3)
IOS
ShortCircuitCurrent
VCC = Max., VO = GND
mA
mV
µ A
VH
InputHysteresis
—
ICCL
ICCH
ICCZ
QuiescentPowerSupplyCurrent
VCC = Max.
500
VIN = GND or VCC
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
OutputLOWCurrent
Output HIGH Current
OutputHIGHVoltage
Test Conditions(1)
Min.
Typ.(2)
115
Max.
200
Unit
mA
mA
V
(3)
IODL
VCC = 5V, VIN = VIH or VIL, VO = 1.5V
60
–60
2.4
(3)
IODH
VCC = 5V, VIN = VIH or VIL, VO = 1.5V
–115
3.3
–200
—
VOH
VCC = Min.
IOH = –24mA
IOH = 24mA
VIN = VIH or VIL
VCC = Min.
VOL
OutputLOWVoltage
—
0.3
0.55
V
VIN = VIH or VIL
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at TA = –55°C.
6. Does not include Bus-hold I/O pins.
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IDT74FCT162H244AT/CT
FASTCMOS16-BITBUFFER/LINEDRIVER
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ΔICC
QuiescentPowerSupplyCurrent
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V
—
0.5
1.5
mA
(3)
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
OutputsOpen
xOE = GND
VIN = VCC
VIN = GND
—
60
100
µA/
MHz
OneInputToggling
50% Duty Cycle
IC
TotalPowerSupplyCurrent(6)
VCC = Max.
OutputsOpen
fi = 10MHz
VIN = VCC
VIN = GND
—
—
—
—
0.6
0.9
2.4
6.4
1.5
2.3
mA
50% Duty Cycle
xOE = GND
OneBitToggling
VIN = 3.4V
VIN = GND
VCC = Max.
OutputsOpen
fi = 2.5MHz
VIN = VCC
VIN = GND
4.5(5)
16.5(5)
50% Duty Cycle
xOE = GND
SixteenBitsToggling
VIN = 3.4V
VIN = GND
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
FCT162H244AT
FCT162H244CT
Symbol
Parameter
PropagationDelay
xAx to xYx
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
CL = 50pF
RL = 500Ω
1.5
4.8
1.5
3.6
4.4
4.1
0.5
ns
tPZH
tPZL
OutputEnableTime
1.5
1.5
—
6.2
5.6
0.5
1.5
1.5
—
ns
ns
ns
tPHZ
tPLZ
OutputDisableTime
(3)
tSK(o)
OutputSkew
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4
IDT74FCT162H244AT/CT
FASTCMOS16-BITBUFFER/LINEDRIVER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
VCC
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T.
50pF
CL
All Other Tests
500Ω
RT
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
1.5V
INPUT
0V
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
Pulse Width
CLOCK ENABLE
ETC.
Set-up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
5
IDT74FCT162H244AT/CT
FASTCMOS16-BITBUFFER/LINEDRIVER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XXX
X
XX
Temp. Range
Family
Bus Hold
Package
Device Type
PV
PA
Shrink Small Outline Package
Thin Shrink Small Outline Package
244AT
244CT
16-Bit Buffer/Line Driver
Bus-hold
H
Double-Density, 5 Volt, Balanced Drive
– 40°C to +85°C
162
74
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6
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