IDT74FCT163245APF8 [IDT]
Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TVSOP-48;型号: | IDT74FCT163245APF8 |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TVSOP-48 光电二极管 电视 |
文件: | 总7页 (文件大小:116K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
3.3V CMOS 16-BIT
BIDIRECTIONAL
TRANSCEIVER
IDT74FCT163245A/C
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
The FCT163245 16-bit transceivers are built using advanced dual
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended
Range
• CMOS power levels (0.4μ W typ. static)
• Rail-to-rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
metalCMOStechnology. These high-speed,low-powertransceivers are
idealforasynchronous communicationbetweentwobuses (AandB). The
DirectionandOutputEnablecontrolsaredesignedtooperatethesedevices
aseithertwoindependent8-bittransceiversorone16-bittransceiver. The
directioncontrolpin(xDIR)controls the directionofdata flow. The output
enable pin(xOE)overrides the directioncontrolanddisables bothports.
Allinputs are designedwithhysteresis forimprovednoise margin.
• Inputs (except I/O) can be driven by 3.3V or 5V components
• Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONALBLOCKDIAGRAM
24
2 DIR
25
1
1 DIR
48
1OE
2OE
36
47
1A1
2A1
13
2
1B1
2B1
35
46
1A2
2A2
14
3
1B2
2B2
33
44
1A3
2A3
16
5
1B3
2B3
43
32
1A4
2A4
6
17
1B4
2B4
30
41
1A5
2A5
8
19
1B5
2B5
40
29
1A6
2A6
9
20
1B6
2B6
38
27
1A7
2A7
11
22
1B7
2B7
37
26
1A8
2A8
12
23
1B8
2B8
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JUNE 2006
1
©
2006 Integrated Device Technology, Inc.
DSC-2554/12
IDT74FCT163245A/C
3.3VCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
PINCONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
–0.5 to +4.6
–0.5 to 7
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
(3)
1OE
1A1
VTERM
V
(4)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
2
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +60
° C
mA
3
1B2
1A2
GND
4
GND
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
5
1B3
1A3
6
1B4
1A4
VCC
7
VCC
3. Input terminals.
4. Outputs and I/O terminals.
8
1B5
1A5
9
1B6
1A6
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
CAPACITANCE (TA = +25°C, F = 1.0MHz)
1B7
1B8
2B1
1A7
1A8
2A1
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
CIN
VIN = 0V
3.5
6
8
pF
pF
COUT
VOUT = 0V
3.5
NOTE:
2B2
2A2
1. This parameter is measured at characterization but not tested.
GND
GND
2B3
2A3
2B4
2A4
PINDESCRIPTION
VCC
VCC
Pin Names
xOE
Description
OutputEnableInput(ActiveLOW)
DirectionControlInput
2B5
2A5
xDIR
2B6
2A6
xAx
SideAInputsor3-StateOutputs
SideBInputsor3-StateOutputs
GND
GND
xBx
2B7
2B8
2A7
2A8
2DIR
FUNCTIONTABLE(1)
2OE
Inputs
xOE1
L
xDIR
L
Outputs
Bus B Data to Bus A
Bus A Data to Bus B
HighZState
SSOP/ TSSOP/ TVSOP
TOP VIEW
L
H
H
X
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
2
IDT74FCT163245A/C
3.3VCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V
Symbol
Parameter
Test Conditions(1)
Min.
2
Typ.(2)
—
Max.
Unit
VIH
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Guaranteed Logic HIGH Level
5.5
V
2
—
VCC+0.5
VIL
IIH
Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level
–0.5
—
—
—
—
—
—
—
–36
—
0.8
1
V
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
VCC = Max.
VI = 5.5V
VI = VCC
—
—
1
µA
IIL
VI = GND
VI = GND
VO = VCC
VO = GND
—
1
—
1
IOZH
IOZL
VIK
VCC = Max.
—
1
µA
—
1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
–0.7
–60
–1.2
–110
V
(3)
IODH
Output HIGH Current
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
mA
mA
(3)
IODL
VOH
Output LOW Current
Output HIGH Voltage
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
50
VCC-0.2
2.4
90
—
3
200
—
—
—
VCC = Min.
IOH = –0.1mA
VIN = VIH or VIL
VCC = 3V
IOH = –3mA
IOH = –8mA
V
2.4(5)
3
VIN = VIH or VIL
VCC = Min.
VOL
OutputLOWVoltage
IOL = 0.1mA
IOL = 16mA
IOL = 24mA
IOL = 24mA
—
—
—
—
—
0.2
0.3
0.3
0.2
0.4
VIN = VIH or VIL
0.55
0.5
V
VCC = 3V
VIN = VIH or VIL
(3)
IOS
VH
Short Circuit Current(4)
VCC = Max., VO = GND
–60
–135
–240
mA
Input Hysteresis
—
—
—
150
0.1
—
10
mV
µ A
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max.
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = VCC–0.6V at rated current.
3
IDT74FCT163245A/C
3.3VCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ΔICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = VCC - 0.6V
—
2
30
µ A
(3)
ICCD
IC
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
xOE = xDIR = GND
One Input Togging
50% Duty Cycle
VIN = VCC
VIN = GND
—
50
75
µA/
MHz
Total Power Supply Current(6)
VCC = Max.,Outputs Open
fI = 10MHz
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.5
0.8
0.8
mA
xOE = xDIR = GND
One Bit Toggling
VIN = VCC - 0.6V
VIN = GND
—
—
0.5
2
(5)
VCC = Max.,Outputs Open
VIN = VCC
3
fI = 2.5MHz
VIN = GND
50% Duty Cycle
xOE = xDIR = GND
Sixteen Bits Toggling
VIN = VCC - 0.6V
VIN = GND
—
2
3.3(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input. All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT163245A/C
3.3VCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE(1)
FCT163245A
FCT163245C
Symbol Parameter
Condition(2)
Min.(3)
Max.
Min.(3)
Max.
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tSK(o)
PropagationDelay
A to B, B to A
OutputEnableTime
xOE to A or B
OutputDisableTime
CL = 50pF
RL = 500Ω
1.5
4.6
1.5
1.5
1.5
1.5
1.5
—
4.1
ns
1.5
1.5
1.5
1.5
—
6.2
5
5.8
4.8
5.8
4.8
0.5
ns
ns
ns
ns
ns
xOE to A or B
OutputEnableTime
6.2
5
(4)
xDIR to A or B
OutputDisableTime
(4)
xDIR to A or B
OutputSkew
(5)
0.5
NOTES:
1. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable
times should be degraded by 20%.
2. See test circuit and waveforms.
3. Minimum limits are guaranteed but not tested on Propagation Delays.
4. This parameter is guaranteed but not tested.
5. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
5
IDT74FCT163245A/C
3.3VCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
6v
Test
Switch
6V
VCC
Open
Open Drain
Disable Low
Enable Low
GND
500Ω
VOUT
VIN
Disable High
Enable High
GND
Open
Pulse
Generator
D.U.T.
All Other Tests
50pF
500Ω
T
R
L
C
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
1.5V
INPUT
0V
LOW-HIGH-LOW
PULSE
tH
tSU
1.5V
1.5V
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Set-up, Hold, and Release Times
ENABLE
tPZL
DISABLE
tPLZ
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
VOH
1.5V
VOL
OUTPUT
3V
1.5V
3V
OUTPUT
NORMALLY
LOW
SWITCH
6V
0.3V
0.3V
VOL
VOH
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
GND
1.5V
0V
Propagation Delay
0V
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC.
6
IDT74FCT163245A/C
3.3VCMOS16-BITBIDIRECTIONALTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
Temp. Range
XX
FCT
XXX
XXXX
Device Type
X
Family
Package
PV
Shrink Small Outline Package
PVG
PA
PAG
PF
SSOP - Green
Thin Shrink Small Outline Package
TSSOP - Green
Thin Very Small Outline Package
TVSOP - Green
PFG
245A
245C
Non-Inverting 16-Bit Bidirectional Transceiver
Double-Density 3.3Volt
163
74
− 40°C to +85°C
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7
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