IDT74FCT163344APF8 [IDT]
Bus Driver, FCT Series, 4-Func, 2-Bit, True Output, CMOS, PDSO56, TVSOP-56;型号: | IDT74FCT163344APF8 |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Bus Driver, FCT Series, 4-Func, 2-Bit, True Output, CMOS, PDSO56, TVSOP-56 驱动 光电二极管 逻辑集成电路 电视 |
文件: | 总7页 (文件大小:78K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
3.3V CMOS ONE-TO-FOUR
ADDRESS/CLOCK DRIVER
IDT74FCT163344A/C
DESCRIPTION:
FEATURES:
TheFCT163344isa1:4address/clockdriverbuiltusingadvanceddual
metalCMOStechnology. Thishigh-speed, lowpowerdeviceprovidesthe
abilitytofanouttomemoryarrays. Eightbanks, eachwithafanoutof4, and
3-statecontrolprovideefficientaddressdistribution. Oneormorebanksmay
be used for clock distribution.
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended
Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V components
• Available in SSOP, TSSOP, and TVSOP packages
The FCT163344 has series current limiting resistors. These offer low
ground bounce, minimal undershoot and controlled output fall times,
reducing the need for external series terminating resistors.
A large number of power and ground pins ensure reduced noise levels.
All inputs are designed with hysteresis for improved noise margins.
TheinputsoftheFCT163344canbedrivenfromeither3.3Vor5Vdevice.
Thisfeatureallowstheuseofthesedevicesastranslatorsinamixed3.3V/
5V supply system.
FUNCTIONALBLOCKDIAGRAM
29
1
OE3
OE1
34
2
B51
B11
36
8
A5
A1
30
6
B54
B14
41
9
B61
B21
42
14
A6
A2
37
13
B64
B24
56
28
OE2
OE4
48
16
B31
B71
15
43
A3
A7
20
44
B34
B74
23
55
B41
B81
21
49
A4
A8
51
27
B44
B84
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
APRIL 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-3249/2
IDT74FCT163344A/C
3.3VCMOSONE-TO-FOURADDRESS/CLOCKDRIVER
INDUSTRIALTEMPERATURERANGE
PINCONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
V
1
2
56
55
54
53
52
(2)
OE1
B11
VTERM
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
–0.5 to +4.6
–0.5 to 7
OE4
B81
(3)
VTERM
V
(4)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
B12
3
B82
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +60
°C
mA
4
5
6
GND
B13
GND
B83
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
B84
B14
51
50
49
48
7
VCC
A1
VCC
A8
8
3. Input terminals.
4. Outputs and I/O terminals.
9
B21
B22
B71
B72
GND
B73
B74
10
47
46
45
44
11
12
13
14
15
16
17
18
GND
B23
CAPACITANCE (TA = +25°C, F = 1.0MHz)
B24
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
CIN
VIN = 0V
3.5
6
7
pF
pF
A2
A3
43
42
A7
A6
COUT
VOUT = 0V
3.5
NOTE:
B31
B32
1. This parameter is measured at characterization but not tested.
41
B61
B62
40
39
38
GND
B33
GND
19
20
21
22
23
PINDESCRIPTION
B63
Pin Names
OEx
Description
3-StateOutputEnableInputs(ActiveLOW)
Inputs
B34
A4
37
36
35
34
33
32
31
30
29
B64
A5
A x
VCC
B41
VCC
B51
B52
Bxx
3-StateOutputs
24
B42
25
26
27
GND
B43
GND
B53
FUNCTIONTABLE(1)
B44
B54
Inputs
Outputs
28
OE2
OEx
L
Ax
L
Bxx
L
OE3
L
H
X
H
SSOP/ TSSOP/ TVSOP
TOP VIEW
H
Z
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
2
IDT74FCT163344A/C
3.3VCMOSONE-TO-FOURADDRESS/CLOCKDRIVER
INDUSTRIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V
Symbol
Parameter
Test Conditions(1)
Min.
2
Typ.(2)
—
Max.
5.5
Unit
VIH
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Guaranteed Logic HIGH Level
V
2
—
VCC+0.5
0.8
VIL
IIH
Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level
–0.5
—
—
V
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
VCC = Max.
VI = 5.5V
VI = VCC
—
±1
—
—
±1
µA
IIL
VI = GND
VI = GND
VO = VCC
VO = GND
—
—
±1
—
—
±1
IOZH
IOZL
VIK
VCC = Max.
—
—
±1
µA
—
—
±1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–60
–1.2
–110
V
IODH
Output HIGH Current
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)
–36
mA
mA
IODL
VOH
Output LOW Current
Output HIGH Voltage
50
VCC-0.2
2.4
90
—
3
200
—
VCC = Min.
IOH = –0.1mA
VIN = VIH or VIL
VCC = 3V
IOH = –3mA
IOH = –8mA
—
V
2.4(5)
3
—
VIN = VIH or VIL
VCC = Min.
VOL
OutputLOWVoltage
IOL = 0.1mA
IOL = 16mA
IOL = 24mA
IOL = 24mA
—
—
—
—
—
0.2
0.3
0.3
0.2
0.4
VIN = VIH or VIL
0.55
0.5
V
VCC = 3V
VIN = VIH or VIL
IOS
VH
Short Circuit Current(4)
VCC = Max., VO = GND(3)
–60
–135
–240
mA
Input Hysteresis
—
—
—
150
0.1
—
10
mV
µA
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max.
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = VCC–0.6V at rated current.
3
IDT74FCT163344A/C
3.3VCMOSONE-TO-FOURADDRESS/CLOCKDRIVER
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
—
2
30
µA
VIN = VCC - 0.6V(3)
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
VIN = VCC
VIN = GND
—
230
320
µA/
MHz
OEx = GND
One Input Bit Togging
Four Output Bits Togging
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.,Outputs Open
fI = 10MHz
50% Duty Cycle
VIN = VCC
VIN = GND
—
—
—
2.3
2.3
4.6
3.2
3.2
mA
OEx = GND
One Input Bit Toggling
Four Output Bits Togging
VIN = VCC - 0.6V
VIN = GND
VCC = Max.,Outputs Open
VIN = VCC
6.4(5)
fI = 2.5MHz
VIN = GND
50% Duty Cycle
OEx = GND
Eight Input Bits Toggling
32 Output Bits Togging
VIN = VCC - 0.6V
VIN = GND
—
4.6
6.5(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input. All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT163344A/C
3.3VCMOSONE-TO-FOURADDRESS/CLOCKDRIVER
INDUSTRIALTEMPERATURERANGE
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE(1)
FCT163344A
FCT163344C
Symbol Parameter
Condition(2)
Min.(3)
Max.
Min.(3)
Max.
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSK(b)
PropagationDelay
Ax to Bxx
OutputEnableTime
OEx to Bxx
OutputDisableTime
OEx to Bxx
Skewbetweenoutputsofthesamebankand
samepackage(sametransition)(4,5)
Skew between outputs of all banks of the same
package(A1-A8tiedtogether)(4,5)
CL = 50pF
RL = 500Ω
1.5
4.8
1.5
1.5
1.5
—
—
4.3
ns
1.5
1.5
—
—
6.2
5.6
0.5
0.5
5.8
5.2
ns
ns
ns
ns
0.35
0.5
tSK(o)
NOTES:
1. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable
times should be degraded by 20%.
2. See test circuit and waveforms.
3. Minimum limits are guaranteed but not tested on Propagation Delays.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
5. This parameter is guaranteed but not tested. Skew is not guaranteed when VCC < 0.3V.
5
IDT74FCT163344A/C
3.3VCMOSONE-TO-FOURADDRESS/CLOCKDRIVER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
6v
Test
Switch
6V
VCC
Open
GND
Open Drain
Disable Low
Enable Low
500Ω
500Ω
VOUT
VIN
Disable High
Enable High
GND
Open
Pulse
Generator
D.U.T.
50pF
All Other Tests
T
R
L
C
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
tH
tSU
3V
1.5V
0V
TIMING
INPUT
LOW-HIGH-LOW
tREM
PRESET
CLEAR
ETC.
1.5V
3V
1.5V
0V
PULSE
tW
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
tSU
tH
Set-up, Hold, and Release Times
Pulse Width
3V
1.5V
0V
SAME PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
VOH
1.5V
VO
L
OUTPUT
ENABLE
DISABLE
3V
CONTROL
INPUT
1.5V
0V
3V
1.5V
0V
OPPOSITE PHASE
INPUT TRANSITION
tPZ
L
tPLZ
3V
1.5V
3V
OUTPUT
NORMALLY
LOW
SWITCH
6V
0.3V
0.3V
VOL
VOH
Propagation Delay
tPZH
tPHZ
OUTPUT
NORMALLY
HIGH
SWITCH
GND
VIH
VT
0V
1.5V
0V
0V
INPUT
tPLH1
tPHL1
VOH
Enable and Disable Times
VT
VOL
OUTPUT 1
OUTPUT 2
NOTES:
tSK(x)
tSK(x)
VOH
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC.
VT
VOL
tPLH2
tPHL2
tSK(x) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
Output Skew - tSK(X)
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
6
IDT74FCT163344A/C
3.3VCMOSONE-TO-FOURADDRESS/CLOCKDRIVER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FCT XXX
Family
XXX
Device Type
XX
Package
Temp. Range
Shrink Small Outline Package
Thin Shrink Small Outline Package
Thin Very Small Outline Package
PV
PA
PF
One-to-Four Address/Clock Driver
344A
344C
Double-Density 3.3V
-40°C to +85°C
163
74
DATASHEETDOCUMENTHISTORY
4/22/2002 Removed blank speed grade
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www.idt.com
7
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