IDT74FCT163827A_18 [IDT]
3.3V CMOS 20-BIT BUFFER;
| 型号： | IDT74FCT163827A_18 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | 3.3V CMOS 20-BIT BUFFER |
| 文件： | 总7页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.3V CMOS 20-BIT BUFFER
IDT74FCT163827A/C
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended
Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
DESCRIPTION:
TheFCT16382720-bitbufferisbuiltusingadvanceddualmetalCMOS
technology. These 20-bit bus drivers provide high-performance bus
interface buffering for wide data/address paths or busses carrying parity.
Two pairs of NAND-ed output enable controls offer maximum control
flexibility and are organized to operate the device as two 10-bit buffers or
one20-bitbuffer.Flow-throughorganizationofsignalpinssimplifieslayout.
All inputs are designed with hysteresis for improved noise margin.
The FCT163827 has series current limiting resistors. This offers low
ground bounce, minimal undershoot, and controlled output fall times,
reducing the need for external series terminating resistors.
• Inputs (except I/O) can be driven by 3.3V or 5V components
• Available in TSSOP package
The inputs of the FCT163827 can be driven from either 3.3V or 5V
devices. This feature allows the use of these devices as translators in a
mixed 3.3V/5V supply system.
FUNCTIONAL BLOCK DIAGRAM
1
28
1OE
1
2OE
1
29
56
1OE
2
2OE
2
55
2
42
15
1
A1
1Y1
2A1
2Y1
TO NINE OTHER CHANNELS
TO NINE OTHER CHANNELS
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
MAY 2018
1
© 2018 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-3083/11
IDT74FCT163827A/C
3.3VCMOS20-BITBUFFER
INDUSTRIALTEMPERATURERANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
V
(2)
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE2
1A1
VTERM
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
–0.5 to +4.6
–0.5 to 7
1OE1
(3)
VTERM
V
2
1Y1
(4)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
3
1Y2
1A2
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +60
° C
mA
GND
4
GND
5
1Y3
1A3
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
6
1Y4
1A4
VCC
7
VCC
8
1Y5
1Y6
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
3. Input terminals.
4. Outputs and I/O terminals.
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1Y7
GND
1Y8
1Y9
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
CIN
VIN = 0V
3.5
6
8
pF
pF
1Y10
COUT
VOUT = 0V
3.5
2Y1
2Y2
NOTE:
1. This parameter is measured at characterization but not tested.
2Y3
2A3
GND
GND
PIN DESCRIPTION
2A4
2A5
2A6
VCC
2Y4
2Y5
Pin Names
xOEx
xAx
Description
OutputEnableInputs(ActiveLOW)
DataInputs
2Y6
VCC
xYx
3-StateOutputs
2Y7
2Y8
2A7
2A8
GND
2Y9
GND
2A9
FUNCTION TABLE(1)
Inputs
2Y10
2OE1
2A10
Outputs
2OE2
xOE1
xOE2
xAx
L
xYx
L
L
L
L
L
H
H
TOP VIEW
H
X
X
H
X
Z
PackageType
TSSOP
PackageCode
PAG56
Order Code
PAG
X
Z
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
2
IDT74FCT163827A/C
3.3VCMOS20-BITBUFFER
INDUSTRIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V
Symbol
Parameter
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
Unit
VIH
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
5.5
V
2
—
VCC+0.5
VIL
IIH
Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level
–0.5
—
—
0.8
1
V
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
VCC = Max.
VI = 5.5V
VI = VCC
—
—
—
1
µA
IIL
VI = GND
VI = GND
VO = VCC
VO = GND
—
—
1
—
—
1
IOZH
IOZL
VIK
VCC = Max.
—
—
1
µA
—
—
1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–60
–1.2
–110
V
IODH
Output HIGH Current
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)
–36
mA
mA
IODL
VOH
Output LOW Current
Output HIGH Voltage
50
VCC-0.2
2.4
90
—
3
200
—
VCC = Min.
IOH = –0.1mA
VIN = VIH or VIL
VCC = 3V
IOH = –3mA
IOH = –8mA
—
V
2.4(5)
3
—
VIN = VIH or VIL
VCC = Min.
VOL
OutputLOWVoltage
IOL = 0.1mA
IOL = 16mA
IOL = 24mA
IOL = 24mA
—
—
—
—
—
0.2
0.4
VIN = VIH or VIL
0.2
0.3
0.3
0.55
0.5
V
VCC = 3V
VIN = VIH or VIL
IOS
VH
Short Circuit Current(4)
VCC = Max., VO = GND(3)
–60
–135
–240
mA
Input Hysteresis
—
—
—
150
0.1
—
10
mV
µA
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max.
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = VCC–0.6V at rated current.
3
IDT74FCT163827A/C
3.3VCMOS20-BITBUFFER
INDUSTRIALTEMPERATURERANGE
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ΔICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = VCC - 0.6V(3)
—
2
30
µA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
VIN = VCC
VIN = GND
—
50
75
µA/
MHz
xOE1 = xOE2 = GND
One Input Togging
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.,Outputs Open
fI = 10MHz
VIN = VCC
VIN = GND
—
0.5
0.7
mA
50% Duty Cycle
xOE1 = xOE2 = GND
One Bit Toggling
VIN = VCC - 0.6V
VIN = GND
—
—
0.5
2.5
0.8
VCC = Max.,Outputs Open
VIN = VCC
3.7(5)
fI = 2.5MHz
VIN = GND
50% Duty Cycle
xOE1 = xOE2 = GND
VIN = VCC - 0.6V
VIN = GND
—
2.5
4.1(5)
Twenty Bits Toggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input. All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT163827A/C
3.3VCMOS20-BITBUFFER
INDUSTRIALTEMPERATURERANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1)
FCT163827A
FCT163827C
Symbol Parameter
Condition(2)
Min.(3)
Max.
Min.(3)
Max.
Unit
tPLH
tPHL
PropagationDelay
CL = 50pF
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 50pF
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 5pF(4)
RL = 500Ω
CL = 50pF
RL = 500Ω
1.5
8
1.5
1.5
1.5
1.5
1.5
1.5
—
4.4
xAx to xYx
ns
1.5
1.5
1.5
1.5
1.5
—
15
12
23
9
10
7
tPZH
tPZL
OutputEnableTime
xOEx to xYx
ns
14
5.7
6
tPHZ
tPLZ
OutputDisableTime
xOEx to xYx
ns
ns
10
0.5
tSK(o)
OutputSkew(3)
0.5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. Propagation Delays and Enable/Disable times are with VCC = 3.3V 0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable
times should be degraded by 20%.
5
IDT74FCT163827A/C
3.3VCMOS20-BITBUFFER
INDUSTRIALTEMPERATURERANGE
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
6v
Test
Switch
6V
V
CC
Open
Open Drain
Disable Low
Enable Low
GND
500Ω
500Ω
V
OUT
V
IN
Disable High
Enable High
GND
Open
Pulse
Generator
D.U.T.
50pF
All Other Tests
T
R
L
C
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
INPUT
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
tH
t
SU
1.5V
1.5V
TIMING
INPUT
t
W
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
REM
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
3V
1.5V
0V
PRESET
CLEAR
CLOCK ENABLE
ETC.
tSU
t
H
Pulse Width
Set-up, Hold, and Release Times
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
t
PLH
t
PHL
PHL
t
PZL
tPLZ
VOH
OUTPUT
3V
1.5V
3V
1.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
6V
tPLH
t
0.3V
0.3V
VOL
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
GND
1.5V
0V
Propagation Delay
0V
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC.
6
IDT74FCT163827A/C
3.3VCMOS20-BITBUFFER
INDUSTRIALTEMPERATURERANGE
ORDERING INFORMATION
XX
FCT
XXX
XXXX
Device Type
X
X
X
Package
Temp. Range
Family
Tube
Tape and Reel
Blank
8
G
Green
PA
Thin Shrink Small Outline Package (PAG48)
Non-Inverting 20-Bit Buffer
827A
827C
Double-Density 3.3Volt
163
74
− 40°C to +85°C
Orderable Part Information
Speed
(ns)
Pkg.
Code
Pkg.
Type
Temp.
Grade
Orderable Part ID
A
C
74FCT163827APAG
74FCT163827APAG8
74FCT163827CPAG
74FCT163827CPAG8
PAG56
PAG56
PAG56
PAG56
TSSOP
TSSOP
TSSOP
TSSOP
I
I
I
I
Datasheet Document History
09/28/2009
05/10/2018
Pg. 7
Pg. 1, 2, 5, 7
Updated the ordering information by removing the "IDT" notation and non RoHS part.
Addedtableunderpinconfigurationdiagramwithdetailedpackageinformation.Updatedtheorderinginformation
diagram adding Tube, Tape and Reel. Added orderable part information table.
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7
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