IDT74FCT163952CPA8 [IDT]
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, TSSOP-56;
| 型号： | IDT74FCT163952CPA8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, TSSOP-56 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总7页 (文件大小：555K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.3V CMOS 16-BIT
IDT74FCT163952A/C
REGISTERED
TRANSCEIVER
DESCRIPTION:
FEATURES:
The FCT163952 16-bit registered transceiver is built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type registered transceivers with
separateinputandoutputcontrolforindependentcontrolofdataflowineither
direction. For example, the A-to-B Enable (xCEAB) must be LOW to enter
datafromtheAport.xCLKABcontrolstheclockingfunction.WhenxCLKAB
togglesfromlow-to-high, thedatapresentontheAportwillbeclockedinto
theregister. xOEABperformsthe outputenablefunctionontheBport.Data
flowfromtheBporttoAportissimilarbutrequiresusingxCEBA, xCLKBA,
andxOEBAinputs. Full16-bitoperationisachievedbytyingthecontrolpins
of the independent transceivers together.
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended
Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V components
• Available in SSOP and TSSOP packages
The FCT163952 has series current limiting resistors. These offer low
ground bounce, minimal undershoot, and controlled output fall times–
reducing the need for external series terminating resistors.
FUNCTIONALBLOCKDIAGRAM
54
31
1CEBA
2CEBA
30
55
1CLKBA
2CLKBA
28
1
1OEAB
2OEAB
3
26
1CEAB
2CEAB
2
27
1CLKAB
2CLKAB
56
29
1OEBA
2OEBA
C
CE
D
C
CE
D
5
15
1A1
2A1
52
42
1B1
2B1
C
C
CE
CE
D
D
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
APRIL 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-3096/1
IDT74FCT163952A/C
3.3VCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
PINCONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
V
V
V
°C
mA
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEAB
(2)
1OEBA
VTERM
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
–0.5 to +4.6
–0.5 to 7
2
(3)
1CLKAB
1CLKBA
VTERM
(4)
3
VTERM
1CEAB
GND
1CEBA
GND
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +60
4
5
1A1
1B1
NOTES:
6
1A2
1B2
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
VCC
7
VCC
8
1A3
1A4
1B3
1B4
9
3. Input terminals.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1A5
1B5
4. Outputs and I/O terminals.
GND
GND
1A6
1A7
1A8
2A1
2A2
1B6
1B7
1B8
2B1
2B2
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
CIN
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
VIN = 0V
Typ.
3.5
Max. Unit
6
8
pF
pF
COUT
VOUT = 0V
3.5
2A3
2B3
NOTE:
GND
GND
1. This parameter is measured at characterization but not tested.
2A4
2A5
2B4
2B5
FUNCTIONTABLE(1,3)
2A6
2B6
VCC
VCC
Inputs
Outputs
2A7
2B7
xCEAB
xCLKAB
xOEAB
xAx
X
X
L
H
xBx
B(2)
B(2)
L
H
Z
2A8
2B8
H
X
L
L
X
X
L
↑
↑
X
L
L
L
L
H
GND
GND
2CEBA
2CEAB
2CLKAB
2CLKBA
X
2OEAB
2OEBA
NOTES:
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA,
SSOP/ TSSOP
TOP VIEW
and xOEBA.
2. Level of B before the indicated steady-state input conditions were established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
PINDESCRIPTION
↑ = LOW-to-HIGH Transition
Z = High-impedance
Pin Names
Description
xOEAB
xOEBA
xCEAB
xCEBA
xCLKAB
xCLKBA
xAx
A-to-BOutputEnableInput(ActiveLOW)
B-to-AOutputEnableInput(ActiveLOW)
A-to-B Clock Enable Input (Active LOW)
B-to-A Clock Enable Input (Active LOW)
A-to-B Clock Input
B-to-A Clock Input
A-to-BDataInputsorB-to-A3-StateOutputs
B-to-ADataInputsorA-to-B3-StateOutputs
xBx
2
IDT74FCT163952A/C
3.3VCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V
Symbol
Parameter
Test Conditions(1)
Min.
2
Typ.(2)
—
Max.
5.5
Unit
VIH
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Guaranteed Logic HIGH Level
V
2
—
VCC+0.5
0.8
VIL
IIH
Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level
–0.5
—
—
V
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
VCC = Max.
VI = 5.5V
VI = VCC
—
±1
—
—
±1
µA
IIL
VI = GND
VI = GND
VO = VCC
VO = GND
—
—
±1
—
—
±1
IOZH
IOZL
VIK
VCC = Max.
—
—
±1
µA
—
—
±1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)
—
–0.7
–60
–1.2
–110
V
IODH
Output HIGH Current
–36
mA
mA
IODL
VOH
Output LOW Current
Output HIGH Voltage
50
VCC-0.2
2.4
90
—
3
200
—
—
VCC = Min.
IOH = –0.1mA
IOH = –3mA
IOH = –8mA
VIN = VIH or VIL
VCC = 3V
V
2.4(5)
3
—
VIN = VIH or VIL
VCC = Min.
VIN = VIH or VIL
VOL
OutputLOWVoltage
IOL = 0.1mA
IOL = 16mA
IOL = 24mA
IOL = 24mA
—
—
—
—
—
0.2
0.3
0.3
0.2
0.4
0.55
0.5
V
VCC = 3V
VIN = VIH or VIL
IOS
VH
ICCL
ICCH
ICCZ
Short Circuit Current(4)
VCC = Max., VO = GND(3)
–60
–135
–240
mA
Input Hysteresis
Quiescent Power Supply Current
—
—
—
150
0.1
—
10
mV
µA
VCC = Max.
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = VCC–0.6V at rated current.
3
IDT74FCT163952A/C
3.3VCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply Current
VCC = Max.
—
2
100
µA
TTL Inputs HIGH
VIN = VCC - 0.6V(3)
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
VIN = VCC
—
60
100
µA/
Outputs Open
VIN = GND
MHz
xOEAB or xOEBA = GND
One Input Togging
50% Duty Cycle
VCC = Max.,Outputs Open
fCP = 10MHz (xCLKAB)
50% Duty Cycle
IC
Total Power Supply Current(6)
VIN = VCC
—
—
0.6
0.6
1
mA
VIN = GND
xOEAB = xCEAB = GND
VIN = VCC - 0.6V
VIN = GND
1.1
xOEBA = VCC
One Bit Toggling
fi = 5MHz
50% Duty Cycle
VCC = Max.,Outputs Open
fCP = 10MHz (xCLKAB)
50% Duty Cycle
xOEAB = xCEAB = GND
xOEBA = VCC
VIN = VCC
—
—
2
2
3(5)
VIN = GND
VIN = VCC - 0.6V
VIN = GND
3.3(5)
Sixteen BitsTogging
fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input. All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
∆ICICCC= =QuPioewsceernSt uCpuprlryenCtu(rIrCeCnLt, fIoCrCHa aTnTdLICHCigZh) Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT163952A/C
3.3VCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE(1)
FCT163952A
FCT163952C
Symbol Parameter
Condition(2)
Min.(3)
Max.
Min.(3)
Max.
Unit
ns
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
PropagationDelay
CL = 50pF
RL = 500Ω
2
10
2
1.5
1.5
2.5
1.5
3
6.3
xCLKAB, xCLKBA to xBx, xAx
OutputEnableTime
1.5
1.5
2.5
2
10.5
10
7
6.5
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
xOEBA, xOEAB to xAx, xBx
OutputDisableTime
xOEBA, xOEAB to xAx, xBx
Set-up Time HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
Hold Time HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
Set-up Time HIGH or LOW
xCEAB, xCEBA to xCLKAB, xCLKBA
Hold Time HIGH or LOW
xCEAB, xCEBA to xCLKAB, xCLKBA
Pulse Width HIGH or LOW
xCLKAB or xCLKBA(3)
—
tH
—
tSU
tH
3
—
2
—
2
tW
3
—
3
tSK(o)
OutputSkew(4)
—
0.5
—
0.5
ns
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
4. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
5
IDT74FCT163952A/C
3.3VCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
6v
Test
Switch
6V
VCC
Open
Open Drain
Disable Low
Enable Low
GND
500Ω
VOUT
VIN
Disable High
GND
Open
Pulse
Generator
D.U.T.
Enable High
All Other Tests
50pF
500Ω
T
R
L
C
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
PULSE
tSU
tH
1.5V
1.5V
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Set-up, Hold, and Release Times
ENABLE
tPZL
DISABLE
tPLZ
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
VOH
1.5V
VOL
OUTPUT
3V
1.5V
3V
OUTPUT
NORMALLY
LOW
SWITCH
6V
0.3V
0.3V
VOL
VOH
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
GND
1.5V
0V
Propagation Delay
0V
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC.
6
IDT74FCT163952A/C
3.3VCMOS16-BITREGISTEREDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FCT
XXX
XXXX
X
Device Type
Temp. Range
Family
Package
PV
PA
Shrink Small Outline Package
Thin Shrink Small Outline Package
952A
952C
Non-Inverting 16-Bit Registered Transceiver
Double-Density 3.3Volt
163
74
− 40°C to +85°C
DATASHEETDOCUMENTHISTORY
4/19/2002 Removed B speed grade
CORPORATE HEADQUARTERS
2975StenderWay
for SALES:
for Tech Support:
800-345-7015 or 408-727-6116
fax: 408-492-8674
logichelp@idt.com
(408) 654-6459
Santa Clara, CA 95054
www.idt.com
7
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