IDT74FCT2543CTQ8 [IDT]
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24;
| 型号： | IDT74FCT2543CTQ8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总7页 (文件大小：62K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
IDT74FCT2543AT/CT
DESCRIPTION:
FEATURES:
The FCT2543T is a non-inverting octal transceiver built using an
advanced dual metal CMOS technology. This device contains two sets of
eightD-typelatcheswithseparateinputandoutputcontrolsforeachset. For
dataflowfromAtoB, forexample, theA-to-BEnable(CEAB)inputmustbe
lowinordertoenterdatafromA0–A7 ortotakedatafromB0–B7,asindicated
in the Function Table. With CEAB low, a low signal on the A-to-B Latch
Enable (LEAB) input makes the A-to-B latches transparent; a subsequent
low-to-high transition of the LEAB signal puts the A latches in the storage
modeandtheiroutputsnolongerchangewiththeAinputs. WithCEABand
OEAB both low, the 3-state B output buffers are active and reflect the data
presentattheoutputoftheAlatches. ControlofdatafromBtoAissimilar,
but uses the CEBA, LEBA and OEBA inputs.
• A and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• Resistor outputs (-15mA IOH, 12mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Reduced system switching noise
• Available in SOIC and QSOP packages
TheFCT2543Thasbalancedoutputdrivewithcurrentlimitingresistors.
This offers low ground bounce, minimal undershoot and controlled output
fall times-reducing the need for external series terminating resistors.
FCT2543T parts are plug-in replacements for FCT543T parts.
FUNCTIONALBLOCKDIAGRAM
DETAIL A
D
Q
0
B
LE
Q
D
A0
LE
1
2
3
4
5
6
7
1
2
3
4
5
A
A
A
A
A
A
A
B
B
B
B
B
DETAIL A x 7
6
7
B
B
OEBA
OEAB
CEBA
LEBA
CEAB
LEAB
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JUNE 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5490/2
IDT74FCT2543AT/CT
FASTCMOSOCTALLATCHEDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
LEBA
OEBA
A0
VCC
CEBA
B0
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
A1
B1
A2
B2
5
B3
A3
A4
A5
6
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
B4
B5
B6
B7
7
8
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
9
A6
A7
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
10
11
12
CIN
VIN = 0V
6
8
10
12
pF
pF
LEAB
OEAB
CEAB
GND
COUT
VOUT = 0V
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
FUNCTION TABLE(1,2)
PINDESCRIPTION
Pin Names
Description
ForA-to-B(SymmetricwithB-to-A)
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A0–A7
B0–B7
A-to-BOutputEnableInput(ActiveLOW)
B-to-AOutputEnableInput(ActiveLOW)
A-to-B Enable Input (Active LOW)
Latch
Output
Buffers
Inputs
Status
A-to-B
Storing
Storing
X
CEAB
LEAB
OEAB
B0–B7
High Z
B-to-A Enable Input (Active LOW)
H
X
X
L
X
H
X
L
X
X
H
L
A-to-BLatchEnableInput(ActiveLOW)
B-to-ALatchEnableInput(ActiveLOW)
A-to-BDataInputsorB-to-A3-StateOutputs
B-to-ADataInputsorA-to-B3-StateOutputs
X
High Z
Transparent
Storing
CurrentAInputs
L
H
L
Previous* A Inputs
NOTES:
1. * Before LEAB LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA
and OEBA.
2
IDT74FCT2543AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALLATCHEDTRANSCEIVER
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
—
0.8
±1
±1
±1
±1
±1
–1.2
—
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State output pins)(4)
Input HIGH Current(4)
ClampDiodeVoltage
Input Hysteresis
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
µA
µA
IIL
VCC = Max.
—
IOZH
IOZL
VCC = Max
—
—
II
VCC = Max., VI = VCC (Max.)
VCC = Min, IIN = -18mA
—
µA
V
VIK
VH
ICC
–0.7
200
0.01
—
mV
mA
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
1
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
OutputLOWCurrent
Output HIGH Current
Output HIGH Voltage
Test Conditions(1)
Min.
16
–16
2.4
Typ.(2)
48
–48
3.3
Max.
—
—
Unit
mA
mA
V
IODL
IODH
VOH
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
VCC = Min
IOH = –15mA
IOL = 12mA
—
VIN = VIH or VIL
VCC = Min
VOL
OutputLOWVoltage
—
0.3
0.5
V
VIN = VIH or VIL
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
3
IDT74FCT2543AT/CT
FASTCMOSOCTALLATCHEDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
CEAB and OEAB = GND
CEBA = VCC
VIN = VCC
VIN = GND
—
0.06
0.12
mA/
MHz
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max., Outputs Open
fCP = 10MHz (LEAB)
50% Duty Cycle
CEAB and OEAB = GND
CEBA = VCC
One Bit Toggling
VIN = VCC
VIN = GND
—
—
0.6
1.1
2.2
4.2
mA
VIN = 3.4V
VIN = GND
at fi = 5MHz
50% Duty Cycle
(5)
VCC = Max., Outputs Open
fCP = 10MHz (LEAB)
50% Duty Cycle
CEAB and OEAB = GND
CEBA = VCC
VIN = VCC
VIN = GND
—
—
1.5
3.8
4
VIN = 3.4V
VIN = GND
13(5)
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT74FCT2543AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALLATCHEDTRANSCEIVER
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
FCT2543AT
FCT2543CT
Symbol
tPLH
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Unit
PropagationDelay
1.5
6.5
1.5
5.3
ns
tPHL
TransparentMode
Ax to Bx or Bx to Ax
tPLH
tPHL
tPZH
tPZL
PropagationDelay
1.5
1.5
8
9
1.5
1.5
7
8
ns
ns
LEBA to Ax, LEAB to Bx
OutputEnableTime
OEBA or OEAB to Ax or Bx
CEBA or CEAB to Ax or Bx
OutputDisableTime
tPHZ
tPLZ
1.5
7.5
1.5
6.5
ns
OEBA or OEAB to Ax or Bx
CEBA or CEAB to Ax or Bx
Set-up Time, HIGH or LOW
Ax or Bx to LEBA or LEAB
Hold Time, HIGH or LOW
Ax or Bx to LEBA or LEAB
LEBA or LEAB Pulse Width LOW
tSU
tH
2
2
5
—
—
—
2
2
5
—
—
—
ns
ns
ns
tH
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT74FCT2543AT/CT
FASTCMOSOCTALLATCHEDTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
VCC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T
.
All Other Tests
50pF
500Ω
T
R
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
Octal link
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT74FCT2543AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALLATCHEDTRANSCEIVER
ORDERINGINFORMATION
IDT
XX
FCT XXXX
X
Temperature
Range
Device Package
Type
SO
Q
Small Outline IC
Quarter-size Small Outline Package
2543AT Octal Latched Transceiver
2543CT
74
- 40° to +85°C
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for Tech Support:
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www.idt.com
7
相关型号：
IDT74FCT2543DTLG
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC28, LCC-28
IDT
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