IDT74FCT2652CTQG8 [IDT]
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24;
| 型号： | IDT74FCT2652CTQG8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24 输入元件 光电二极管 逻辑集成电路 |
| 文件： | 总9页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS OCTAL
IDT74FCT2652AT/CT
TRANSCEIVER/
REGISTERS (3-STATE)
FEATURES:
DESCRIPTION:
• A and C grades
TheFCT2652Tconsistsofabustransceiverwith3-stateD-typeflip-flops
andcontrolcircuitryarrangedformultiplexedtransmissionofdatadirectly
from the data bus or from the internal storage registers. The FCT2652T
utilizes GAB and GBAsignals to control the transceiver functions.
SABandSBAcontrolpinsareprovidedtoselecteitherreal-timeorstored
data transfer. The circuitry used for select control will eliminate the typical
decoding glitch that occurs in a multiplexer during the transition between
storedandreal-timedata.Alowinputlevelselectsreal-timedataandahigh
selectsstoreddata.
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• Resistor outputs (-15mA IOH, 12mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Reduced system switching noise
• Power off disable outputs permit "live insertion"
• Available in SOIC and QSOP packages
Data on the A or B data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless of the select or enable control pins.
The FCT2652T have balanced drive outputs with current limiting
resistors. This offers low ground bounce, minimal undershoot and con-
trolled output fall times-reducing the need for external series terminating
resistors. FCT2652T parts are plug-in replacements for FCT652T parts.
FUNCTIONALBLOCKDIAGRAM
GAB
GBA
CPBA
SBA
CPAB
SAB
B REG
ONE OF EIGHT CHANNELS
1D
C1
A REG
1D
B1
A1
C1
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
AUGUST 2000
1
© 2000 Integrated Device Technology, Inc.
DSC-5509/1
IDT74FCT2652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
24
23
22
21
20
19
18
17
16
15
14
13
1
CPAB
SAB
VCC
CPBA
SBA
GBA
B1
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
2
3
4
NOTES:
GAB
A1
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
A2
A3
A4
A5
5
6
7
8
9
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
B2
B3
B4
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
B5
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
A6
A7
CIN
VIN = 0V
6
8
10
12
pF
pF
B6
B7
10
11
COUT
VOUT = 0V
A8
NOTE:
1. This parameter is measured at characterization but not tested.
B8
GND
12
SOIC/ QSOP
TOP VIEW
PINDESCRIPTION
Pin Names
Description
A1 - A8
Data Register A Inputs
Data Register B Output
Data Register B Inputs
Data Register A Output
Clock Pulse Inputs
B1 - B8
CPAB, CPBA
SAB, SBA
Output Data Source Select Inputs
Output Enable Inputs
GAB, GBA
2
IDT74FCT2652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
FUNCTION TABLE(1)
Inputs
Data I/O
GAB
H
H
X
GBA
X
CPAB
H or L
↑
CPBA
H or L
↑
SAB
X
SBA
X
A1 - A8
B1 - B8
Operation
Input
Input
Isolation
X
X
X
Store A and B Data
H
H
X
↑
H or L
↑
X
X
Input
Input
Unspecified(2)
Unspecified(2)
Output
Input
Store A, Hold B
H
L
↑
X
X
StoreAinBothRegisters
Hold A, Store B
H or L
↑
X
X
L
L
↑
↑
X
X
Output
Input
StoreBinBothRegisters
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus
Stored B Data to A Bus
L
L
X
X
X
L
Output
Input
L
L
X
H or L
X
X
H
X
L
H
H
L
X
L
Input
Output
Output
L
H or L
H or L
X
H
H
X
H
H or L
H
Output
NOTES:
1. H = HIGH
L = LOW
X = Don't Care
↑ = LOW-to-HIGH transition.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
2. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored
on every LOW-to-HIGH transition on the clock inputs.
3
IDT74FCT2652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
BUS
A
BUS
B
BUS
A
BUS
B
GAB GBA
CPAB
X
CPBA
X
SAB
L
SBA
X
GAB GBA
CPAB
X
CPBA
X
SAB
SBA
L
H
H
L
L
X
Real-Time Transfer Bus B to A
Real-Time Transfer Bus A to B
BUS
BUS
A
BUS
B
BUS
A
B
GAB GBA
CPAB
CPBA
SAB
SBA
X
GAB GBA
CPAB
H or
CPBA
H or
SAB
H
SBA
H
H
L
↑
X
L
L
H
X
H
X
↑
↑
X
X
X
X
X
↑
X
Storage From A and/or B
Transfer Stored Data to A and/or B
4
IDT74FCT2652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
—
0.8
±1
±1
±1
±1
±1
–1.2
—
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State output pins)(4)
Input HIGH Current(4)
ClampDiodeVoltage
Input Hysteresis
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
µA
µA
IIL
VCC = Max.
—
IOZH
IOZL
VCC = Max
—
—
II
VCC = Max., VI = VCC (Max.)
VCC = Min, IIN = -18mA
—
µA
V
VIK
VH
ICC
–0.7
200
0.01
—
mV
µA
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
1
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
OutputLOWCurrent
Output HIGH Current
Output HIGH Voltage
Test Conditions(1)
Min.
16
–16
2.4
Typ.(2)
48
–48
3.3
Max.
—
—
Unit
mA
mA
V
IODL
IODH
VOH
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
VCC = Min
IOH = –15mA
IOL = 12mA
—
VIN = VIH or VIL
VCC = Min
VOL
OutputLOWVoltage
—
0.3
0.5
V
VIN = VIH or VIL
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
5
IDT74FCT2652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
VIN = VCC
VIN = GND
—
0.06
0.12
mA/
MHz
GAB = GBA = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
GAB = GBA = GND
One Bit Toggling
VIN = VCC
VIN = GND
—
—
0.6
1.1
2.2
4.2
mA
VIN = 3.4V
VIN = GND
at fi = 5MHz
50% Duty Cycle
(5)
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
GAB = GBA = GND
Eight Bits Toggling
VIN = VCC
VIN = GND
—
—
1.5
3.8
4
VIN = 3.4V
VIN = GND
13(5)
at fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6
IDT74FCT2652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
FCT2652AT
Min.(2)
FCT2652CT
Min.(2)
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Max.
Max.
Unit
PropagationDelay
Bus to Bus
2
6.3
1.5
1.5
1.5
1.5
1.5
2
5.4
ns
OutputEnableTime
GAB, GBA to Bus
OutputDisableTime
GAB, GBA to Bus
PropagationDelay
Clock to Bus
2
2
9.8
6.3
6.3
7.7
—
7.8
6.3
5.7
6.2
—
ns
ns
ns
ns
ns
ns
ns
2
PropagationDelay
SBA or SAB to Bus
Set-up Time, HIGH or LOW
Bus to Clock
2
2
tH
Hold Time, HIGH or LOW
Bus to Clock
1.5
5
—
1.5
5
—
tW
Clock Pulse Width
HIGH or LOW(3)
—
—
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
7
IDT74FCT2652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
V CC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T.
All Other Tests
50pF
500Ω
T
R
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
3V
1.5V
0V
DATA
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
3V
1.5V
0V
Octal link
PRESET
CLEAR
CLOCK ENABLE
ETC.
tSU
tH
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
1.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
8
IDT74FCT2652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
ORDERINGINFORMATION
XXXX
Device Type
X
IDT
XX
Temperature
Range
FCT
Package
SO
Q
Small Outline IC
Quarter-size Small Outline Package
Octal Transceiver/Register (3-State)
- 40°C to +85°C
2652AT
2652CT
74
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www.idt.com
9
相关型号：
IDT74FCT2652DTLG
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC28, LCC-28
IDT
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