IDT74FCT273ATQG8 [IDT]
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, QSOP-20;型号: | IDT74FCT273ATQG8 |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, QSOP-20 光电二极管 逻辑集成电路 触发器 |
文件: | 总7页 (文件大小:74K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FAST CMOS
IDT54/74FCT273T/AT/CT
OCTAL D FLIP-FLOP
WITH MASTER RESET
DESCRIPTION:
FEATURES:
The FCT273T is an octal D flip-flop built using an advanced dual metal
CMOS technology. The FCT273T has eight edge-triggered D-type flip-
flops with individual D inputs and O outputs. The common buffered Clock
(CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
• Std., A, and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
The register is fully edge-triggered. The state of each D input, one set-
up time before the low-to-high clock transition, is transferred to the corre-
spondingflip-flop’sOoutput.
All outputs will be forced low independently of Clock or Data inputs by
a low voltage level on the MR input. The device is useful for applications
where the true output only is required and the Clock and Master Reset are
commontoallstorageelements.
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
• Power off disable outputs permit "live insertion"
• Available in the following packages:
– Industrial: SOIC, SSOP, QSOP
– Military: CERDIP, LCC
FUNCTIONALBLOCKDIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
CP
Q
Q
Q
Q
Q
Q
Q
Q
D
D
D
D
D
D
D
D
CP
RD
CP
RD
CP
RD
CP
RD
CP
RD
CP
RD
CP
RD
CP
RD
MR
O0
O1
O2
O3
O4
O5
O6
O7
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
JUNE 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-2568/2
IDT54/74FCT273T/AT/CT
FASTCMOSOCTALDFLIP-FLOPWITHMASTERRESET
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
INDEX
VCC
20
19
18
17
16
15
14
13
12
11
1
MR
O0
D0
D1
O1
2
3
4
O7
D7
D6
O6
O5
3
2
20 19
1
4
5
6
7
8
18
17
16
15
14
D1
D7
D6
O6
O5
D5
O1
5
O2
D2
D3
O2
D2
D3
O3
6
D5
D4
O4
CP
7
9
10 11 12 13
8
9
GND
10
LCC
TOP VIEW
CERDIP/ SOIC/ SSOP/ QSOP
TOP VIEW
ABSOLUTEMAXIMUMRATINGS(1)
PINDESCRIPTION
Symbol
Description
Max
Unit
V
Pin Names
Description
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
Dx
MR
CP
Ox
Data Inputs
Master Reset (Active LOW)
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
Clock Pulse Input (Active Rising Edge)
Data Outputs
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
FUNCTIONTABLE(1)
Inputs
Outputs
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Operating Mode
Reset(Clear)
Load "1"
MR
L
CP
X
Dx
X
h
Ox
L
L
↑
↑
H
L
Load "0"
H
l
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. H = HIGH voltage level steady state
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock
transition
CIN
VIN = 0V
6
8
10
12
pF
pF
COUT
VOUT = 0V
L = LOW voltage level steady state
NOTE:
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock
transition
1. This parameter is measured at characterization but not tested.
X = Don’t Care
↑ = LOW-to-HIGH Clock Transition
2
IDT54/74FCT273T/AT/CT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOSOCTALDFLIP-FLOPWITHMASTERRESET
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
VIH
VIL
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
0.8
±1
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
Input HIGH Current(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VI = 2.7V
VI = 0.5V
—
—
µA
IIL
VCC = Max.
—
—
±1
II
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
—
—
±1
µA
V
VIK
IOS
VOH
—
–0.7
–120
3.3
–1.2
–225
—
–60
2.4
mA
VCC = Min
VIN = VIH or VIL
IOH = –6mA MIL
IOH = –8mA IND
IOH = –12mA MIL
IOH = –15mA IND
IOL = 32mA MIL
IOL = 48mA IND
V
V
2
3
—
VOL
Output LOWVoltage
VCC = Min
—
0.3
0.5
VIN = VIH or VIL
VH
ICC
Input Hysteresis
—
—
—
200
—
1
mV
mA
Quiescent Power Supply Current
VCC = Max.
0.01
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
3
IDT54/74FCT273T/AT/CT
FASTCMOSOCTALDFLIP-FLOPWITHMASTERRESET
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
MR = VCC
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN = VCC
VIN = GND
—
—
—
—
1.5
2
3.5
5.5
mA
Outputs Open
fCP = 10MHz
50% Duty Cycle
MR = VCC
One Bit Toggling
fi = 5MHz
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
MR = VCC
VIN = 3.4V
VIN = GND
VIN = VCC
VIN = GND
3.8
6
7.3(5)
16.3(5)
VIN = 3.4V
VIN = GND
Eight Bits Toggling
fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT273T/AT/CT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOSOCTALDFLIP-FLOPWITHMASTERRESET
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE-INDUSTRIAL
74FCT273AT
Symbol
tPLH
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Unit
PropagationDelay
CP to Ox
2
7.2
2
ns
tPHL
tPLH
PropagationDelay
2
7.2
—
2
6.1
—
ns
ns
ns
tPHL
MR to Ox
Set-up Time HIGH or LOW
Dx to CP
tSU
2
2
tH
Hold Time HIGH or LOW
Dx to CP
1.5
—
1.5
—
tW
CP Pulse Width HIGH or LOW
MR Pulse Width LOW
Recovery Time MR to CP
6
6
2
—
—
—
6
6
2
—
—
—
ns
ns
ns
tW
tREM
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE-MILITARY
54FCT273T
54FCT273AT
54FCT273CT
Symbol
tPLH
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
PropagationDelay
CP to Ox
2
2
15
2
8.3
2
6.5
ns
tPHL
tPLH
PropagationDelay
15
—
—
2
8.3
—
2
6.8
—
ns
ns
ns
tPHL
MR to Ox
Set-up Time HIGH or LOW
Dx to CP
tSU
3.5
2
2
2
tH
Hold Time HIGH or LOW
Dx to CP
1.5
—
1.5
—
tW
CP Pulse Width HIGH or LOW
MR Pulse Width LOW
Recovery Time MR to CP
7
7
5
—
—
—
6
6
—
—
—
6
6
—
—
—
ns
ns
ns
tW
tREM
2.5
2.5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT54/74FCT273T/AT/CT
FASTCMOSOCTALDFLIP-FLOPWITHMASTERRESET
MILITARYANDINDUSTRIALTEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
VCC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T
.
All Other Tests
50pF
500Ω
T
R
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
Octal link
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT273T/AT/CT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOSOCTALDFLIP-FLOPWITHMASTERRESET
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XX
X
Temp. Range
Package
Process
Device Type
Blank
Industrial
B
MIL-STD-883, Class B
Industrial Options
Small Outline IC
Shink Small Outline Package
Quarter-size Small Outline Package
SO
PY
Q
Military Options
CERDIP
Leadless Chip Carrier
D
L
Octal D Flip-Flop with Master Reset
273T
273AT
273CT
54
74
– 55°C to +125°C
– 40°C to +85°C
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
7
相关型号:
IDT74FCT273ATSO8
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SOIC-20
IDT
IDT74FCT273ATSOG
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, GREEN, SOIC-20
IDT
IDT74FCT273ATSOG8
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SOIC-20
IDT
IDT74FCT273CD
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20
ROCHESTER
©2020 ICPDF网 联系我们和版权申明