IDT74FCT377ATSO8 [IDT]
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SOIC-20;
| 型号： | IDT74FCT377ATSO8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SOIC-20 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总6页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS OCTAL
IDT54/74FCT377T/AT/CT/DT
D FLIP-FLOP WITH
CLOCK ENABLE
FEATURES:
DESCRIPTION:
• Std., A, C, and D grades
The IDT54/74FCT377T is an octal D flip-flop built using an advanced
dual metal CMOS technology. The IDT54/74FCT377T has eight edge-
triggered, D-type flip-flops with individual D inputs and O outputs. The
commonbufferedClock(CP)inputloadsallflip-flopssimultaneouslywhen
theClockEnable(CE)islow. Theregisterisfullyedge-triggered. Thestate
of each D input, one set-up time before the low-to-high clock transition, is
transferredtothecorrespondingflip-flop’sOoutput. TheCEinputmustbe
stableonlyoneset-uptimepriortothelow-to-hightransitionforpredictable
operation.
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
• Power off disable outputs permit "live insertion"
• Available in the following packages:
– Industrial: SOIC, QSOP
– Military: CERDIP, LCC
FUNCTIONALBLOCKDIAGRAM
0
1
2
3
4
5
6
7
D
D
D
D
D
D
D
D
CE
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
CP
O 0
O 1
O 2
O 3
O 4
O 5
O 6
O 7
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
JANUARY 2004
1
© 2004 Integrated Device Technology, Inc.
DSC-2630/9
IDT54/74FCT377T/AT/CT/DT
FASTCMOSOCTALDFLIP-FLOPWITHCLOCKENABLE
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
20
19
18
17
16
15
14
13
12
11
1
2
3
4
CE
O0
D0
D1
O1
VCC
O7
D7
INDEX
3
2
20 19
1
4
5
6
7
8
18
17
16
15
14
D1
D7
D6
O6
O5
D5
D6
O1
O6
O5
5
O2
D2
D3
O2
D2
D3
6
D5
D4
O4
CP
7
8
9
10 11 12 13
9
O3
GND
10
LCC
TOP VIEW
CERDIP/ SOIC/ QSOP
TOP VIEW
ABSOLUTEMAXIMUMRATINGS(1)
PINDESCRIPTION
Symbol
Description
Max
Unit
V
Pin Names
Description
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
D0 – D7
CE
DataInputs
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
Clock Enable (Active LOW)
DataOutputs
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
O0 – O7
CP
Clock Pulse Input
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
FUNCTIONTABLE(1)
Inputs
Outputs
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Operating Mode
Load “1”
CP
↑
CE
D
h
l
O
H
L
l
l
Load “0”
↑
Hold
↑
H
h
X
X
No Change
No Change
CAPACITANCE (TA = +25°C, F = 1.0MHz)
H
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
NOTE:
1. H = HIGH Voltage Level
h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition
L = LOW Voltage Level
CIN
VIN = 0V
6
8
10
12
pF
pF
COUT
VOUT = 0V
l
= LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition
NOTE:
X = Don't Care
↑ = LOW-to-HIGH Clock Transition
1. This parameter is measured at characterization but not tested.
2
IDT54/74FCT377T/AT/CT/DT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOSOCTALDFLIP-FLOPWITHCLOCKENABLE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial : TA = –40°C to +85°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
VIL
Parameter
Input HIGH Level
Test Conditions(1)
Min.
2
Typ.(2)
—
Max.
—
Unit
V
Guaranteed Logic HIGH Level
InputLOWLevel
GuaranteedLogicLOWLevel
VCC = Max.
—
—
0.8
±1
V
IIH
Input HIGH Current(4)
InputLOWCurrent(4)
Input HIGH Current(4)
ClampDiodeVoltage
ShortCircuitCurrent
Output HIGH Voltage
VI = 2.7V
VI = 0.5V
—
—
µA
µA
µA
V
IIL
VCC = Max.
—
—
±1
II
VCC = Max., VI = VCC (Max.)
VCC = Min., IN = –18mA
VCC = Max.(3), VO = GND
VCC = Min.
—
—
±1
VIK
IOS
VOH
—
–0.7
–120
3.3
–1.2
–225
—
–60
2.4
mA
V
IOH = –6mA MIL.
IOH = –8mA IND.
IOH = –12mA MIL.
IOH = –15mA IND.
IOL = 32mA MIL.
IOL = 48mA IND.
VIN = VIH or VIL
2
3
—
0.5
±1
V
V
VOL
OutputLOWVoltage
VCC = Min.
—
—
0.3
—
VIN = VIH or VIL
IOFF
Input/OutputPowerOff
Leakage(5)
VCC = 0V, VIN or VO - 4.5V
µA
VH
InputHysteresis
QuiescentPower
SupplyCurrent
—
—
—
200
—
1
mV
mA
ICC
VCC = Max.
0.01
VIN = GND or VCC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
5. This parameter is guaranted but not tested.
3
IDT54/74FCT377T/AT/CT/DT
FASTCMOSOCTALDFLIP-FLOPWITHCLOCKENABLE
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply
Current TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
ICCD
IC
Dynamic Power Supply
Current(4)
VCC = Max., Outputs Open
CE = GND
OneInputToggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
TotalPowerSupply
Current(6)
VCC = Max., Outputs Open
fCP = 10MHz
VIN = VCC
VIN = GND
—
—
1.5
2
3.5
5.5
mA
CE = GND
OneBitToggling
fi = 5MHz
VIN = 3.4V
VIN = GND
50% Duty Cycle
VCC = Max., Outputs Open
fCP = 10MHz, 50% Duty Cycle
VIN = VCC
VIN = GND
—
—
3.8
6
7.3(5)
CE = GND
EightBitsToggling
fi = 2.5MHz
VIN = 3.4V
VIN = GND
16.3(5)
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
54FCT377T
54/74FCT377AT
54/74FCT377CT
74FCT377DT
Ind.
Mil.
Ind. Mil.
Ind. Mil.
Symbol
tPLH
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
PropagationDelay
CP to Qx
2
15
—
—
—
—
—
2
7.2
—
—
—
—
—
2
8.3
—
—
—
—
—
2
5.2
—
—
—
—
—
2
5.5
—
—
—
—
—
2
2
1
3
0
3
4.4
—
—
—
—
—
ns
ns
ns
ns
ns
ns
tPHL
tSU
Set-up Time HIGH or LOW
Dx to CP
3
2
2
2
2
tH
Hold Time HIGH or LOW
Dx to CP
2.5
4
1.5
3.5
1.5
8
1.5
3.5
1.5
7
1.5
3.5
1.5
6
1.5
3.5
1.5
7
tSU
tH
Set-up Time HIGH or LOW
CE to CP
Hold Time HIGH or LOW
CE to CP
1.5
7
tW
CP Pulse Width HIGH or LOW
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT54/74FCT377T/AT/CT/DT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOSOCTALDFLIP-FLOPWITHCLOCKENABLE
TESTCIRCUITSANDWAVEFORMS
VCC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T
.
All Other Tests
50pF
500Ω
RT
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Octal Link
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
5
IDT54/74FCT377T/AT/CT/DT
FASTCMOSOCTALDFLIP-FLOPWITHCLOCKENABLE
MILITARYANDINDUSTRIALTEMPERATURERANGES
ORDERINGINFORMATION
XXXX
XX
X
IDT
XX
FCT
Package
Process
Device Type
Temp. Range
Blank
B
Industrial
MIL-STD-883, Class B
Industrial Options
SO
Q
Small Outline IC
Quarter-size Small Outline Package
Military Options
CERDIP
Leadless Chip Carrier
D
L
Fast CMOS Octal D Flip-Flop with Clock Enable
377T
377AT
377CT
377DT
54
74
– 55°C to +125°C
– 40°C to +85°C
DATASHEETDOCUMENTHISTORY
6/26/2002 Updated as per PDNs Logic-00-07 and Logic-01-04
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
6
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