IDT74FCT574DTPG [IDT]
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, TSSOP-20;型号: | IDT74FCT574DTPG |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, TSSOP-20 驱动 光电二极管 逻辑集成电路 触发器 |
文件: | 总7页 (文件大小:108K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FAST CMOS OCTAL D
REGISTERS (3-STATE)
IDT74FCT574T/AT/CT/DT
DESCRIPTION:
FEATURES:
−
−
−
−
Low input and output leakage ≤1µA (max.)
Extended commercial range of –40°C to +85°C
CMOS power levels
The FCT574T is an 8-bit register built using an advanced dual metal
CMOStechnology.Theseregisters consistofeightD-typeflip-flops witha
bufferedcommonclockandbuffered3-stateoutputcontrol.Whentheoutput
enable(OE)inputis low,theeightoutputs areenabled.WhentheOEinput
is high,the outputs are inthe high-impedance state.
True TTL input and output compatibility
•
•
VOH = 3.3V (typ.)
VOL = 0.3V (typ.)
Inputdatameetingtheset-upandholdtimerequirementsoftheDinputs
istransferredtotheQoutputsonthelow-to-hightransitionoftheclockinput.
−
−
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation Enhanced
versions
−
−
−
Available in PDIP, SOIC, SSOP, QSOP, and TSSOP packages
Std., A, C and D speed grades
High drive outputs (-15mA IOH, 48mA IOL)
FUNCTIONALBLOCKDIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
COMMERCIAL TEMPERATURE RANGE
SEPTEMBER 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-5494/-
IDT74FCT574T/AT/CT/DT
FASTCMOSOCTALDREGISTER(3-STATE)
COMMERCIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
PINCONFIGURATION
Symbol
Rating
Max.
Unit
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
V
VCC
20
19
18
17
16
1
2
(3)
OE
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
Storage Temperature
DC Output Current
–65 to +150
–65 to +120
°C
D0
D1
D2
D3
Q0
Q1
Q2
Q3
Q4
IOUT
mA
8T-link
3
4
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
P20-1
D20-1
SO20-2
5
rating conditions for extended periods may affect reliability.
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
No
D4
D5
D6
D7
SO20-7 15
6
SO20-8
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
SO20-9 14
Q5
Q6
Q7
CP
7
13
12
11
8
O
CAPACITANCE
Symbol
(TA = +25 C, f = 1.0MHz)
Parameter(1)
Conditions
Typ.
Max. Unit
9
CIN
Input Capacitance
VIN = 0V
6
10
12
pF
GND
10
COUT
Output Capacitance
VOUT = 0V
8
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
PDIP/ SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
Description
DN
D flip-flop data inputs
CP
Clock Pulse for the register. Enters data on LOW-to-
HIGH transition.
QN
QN
OE
3-state outputs (TRUE)
3-state outputs (INVERTED)
Active LOW 3-state Output Enable input
FUNCTION TABLE (1)
Inputs
Outputs
QN
Internal
QN
Function
HI-Z
OE
CP
DN
H
H
L
L
H
H
L
H
↑
↑
↑
X
X
L
H
L
Z
Z
L
H
Z
Z
NC
NC
H
L
H
LOAD
REGISTER
↑
H
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
NC = No Change
↑ = LOW-to-HIGH transition
2
IDT74FCT574T/AT/CT/DT
FASTCMOSOCTALDREGISTER(3-STATE)
COMMERCIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 5%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
Typ.(2) Max.
Unit
VIH
2
—
—
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
V
VIL
IIH
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
V
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State Output pins)(4)
Input HIGH Current(4)
Clamp Diode Voltage
Input Hysteresis
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
IIL
—
IOZH
IOZL
II
VCC = Max.
—
—
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN = –18mA
—
µA
V
VIK
VH
ICC
–0.7
200
0.01
—
mV
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
mA
8T-link
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Output LOW Current
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
(3)
IODL
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V
16
48
-48
3.3
—
—
—
mA
(3)
IODH
VOH
Output HIGH Current
Output HIGH Voltage
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V
-16
2.4
mA
V
VCC = Min.
IOH = –15mA
IOH = 12mA
VIN = VIH or VIL
VCC = Min.
VOL
Output LOW Voltage
—
0.3
0.5
V
VIN = VIH or VIL
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
3
IDT74FCT574T/AT/CT/DT
FASTCMOSOCTALDREGISTER(3-STATE)
COMMERCIALTEMPERATURERANGE
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
∆ICC
VCC = Max.
VIN = 3.4V
—
0.5
2
mA
(3)
ICCD
Dynamic Power Supply Current(4)
VCC = Max.
VIN = VCC
—
0.15
0.25
mA/
Outputs Open
OE = GND
VIN = GND
MHz
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
IC
Total Power Supply Current(6)
VIN = VCC
—
—
—
—
1.5
2
3.5
5.5
mA
VIN = GND
V = 3.4
IN
fi = 5MHz
VIN = GND
50% Duty Cycle
One Bit Toggling
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
VIN = VCC
3.8
6
7.3(5)
16.3(5)
VIN = GND
VIN = 3.4
Eight Bits Toggling
fi = 2.5MHz
VIN = GND
50% Duty Cycle
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT74FCT574T/AT/CT/DT
FASTCMOSOCTALDREGISTER(3-STATE)
COMMERCIALTEMPERATURERANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT574T
Min (2)
Max
FCT574AT
Min (2)
Max
FCT574CT
Min (2)
Max
FCT574DT
Min (2)
Max
.
.
.
.
.
.
.
.
Symbol
Parameter
Propagation Delay
CP to QN
Conditions(1)
CL = 50pF
Unit
tPLH
2
10
2
6.5
6.5
5.5
—
—
—
2
5.2
5.5
5
2
4.2
4.8
4
ns
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
RL = 500Ω
Output Enable Time
1.5
1.5
2
12.5
8
1.5
1.5
2
1.5
1.5
2
1.5
1.5
2
ns
ns
ns
ns
ns
Output Disable Time
Set-up Time HIGH
or LOW, DN to CP
Hold Time HIGH
or LOW, DN to CP
CP Pulse Width
HIGH or LOW
—
—
—
—
—
—
—
—
—
tH
1.5
7
1.5
5
1.5
5
1
tW
3
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
5
IDT74FCT574T/AT/CT/DT
FASTCMOSOCTALDREGISTER(3-STATE)
COMMERCIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
Closed
Open
V CC
7.0V
Open Drain
Disable Low
Enable Low
All Other Tests
500Ω
500Ω
V OUT
VIN
Pulse
D.U.T.
Generator
8-link
50pF
DEFINITIONS:
T
R
L
C
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Octal link
PULSEWIDTH
SET-UP, HOLD, AND RELEASE TIMES
3V
1.5V
0V
DATA
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
Octal link
CLEAR
CLOCK ENABLE
ETC.
tSU
tH
Octal link
PROPAGATIONDELAY
ENABLEANDDISABLETIMES
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
VOL
1.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
tPLH
0.3V
0.3V
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6
IDT74FCT574T/AT/CT/DT
FASTCMOSOCTALDREGISTER(3-STATE)
COMMERCIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FCT
X
XXXX
X
X
Temp. Range
Family
Device Type
Package
Process
Blank
Commercial
P
Plastic DIP (P20-1)
D
CERDIP (D20-1)
SO
PY
Q
Small Outline IC (SO20-2)
Shrink Small Outline Package (SO20-7)
Quarter-size Small Outline Package (SO20-8)
Thin Shrink Small Outline Package (SO20-9)
PG
574T
Octal D Register
574AT
574CT
574DT
Blank
74
High Drive
-40°C to +8 5°C
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7
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