IDT74FCT652CTQ8 [IDT]
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24;型号: | IDT74FCT652CTQ8 |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24 光电二极管 输出元件 逻辑集成电路 触发器 |
文件: | 总9页 (文件大小:80K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FAST CMOS OCTAL
TRANSCEIVER/
IDT74FCT652AT/CT
REGISTER (3-STATE)
FEATURES:
DESCRIPTION:
• A and C grades
TheFCT652Tconsistsofabustransceiverwith3-stateD-typeflip-flops
andcontrolcircuitryarrangedformultiplexedtransmissionofdatadirectly
from the data bus or from the internal storage registers. The FCT652T
utilizes GAB and GBAsignals to control the transceiver functions.
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
SABandSBAcontrolpinsareprovidedtoselecteitherreal-timeorstored
data transfer. The circuitry used for select control will eliminate the typical
decoding glitch that occurs in a multiplexer during the transition between
storedandreal-timedata.Alowinputlevelselectsreal-timedataandahigh
selectsstoreddata.
• High Drive outputs (-15mA IOH, 64mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in SOIC and QSOP packages
Data on the A or B data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless of the select or enable control pins.
FUNCTIONALBLOCKDIAGRAM
GAB
GBA
CPBA
SBA
CPAB
SAB
B REG
ONE OF EIGHT CHANNELS
1D
C1
A REG
1D
B1
A1
C1
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JANUARY 2004
1
© 2004 Integrated Device Technology, Inc.
DSC-5508/4
IDT74FCT652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
(3)
24
23
22
21
20
19
18
17
16
15
14
13
1
CPAB
SAB
VCC
CPBA
SBA
GBA
B1
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
2
3
4
GAB
A1
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
A2
A3
A4
A5
5
6
7
8
9
B2
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
B3
B4
B5
A6
A7
B6
10
11
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
B7
A8
CIN
VIN = 0V
6
8
10
12
pF
pF
B8
GND
12
COUT
VOUT = 0V
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
PINDESCRIPTION
Pin Names
Description
A1 - A8
DataRegisterAInputs
DataRegisterBOutputs
DataRegisterBInputs
DataRegisterAOutputs
Clock Pulse Inputs
B1 - B8
CPAB, CPBA
SAB, SBA
OutputDataSourceSelectInputs
OutputEnableInputs
GAB, GBA
2
IDT74FCT652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
FUNCTIONTABLE(1)
Inputs
Data I/O
GAB
L
GBA
H
L
CPAB
H or L
↑
CPBA
H or L
↑
SAB
X
SBA
X
A1 - A8
B1 - B8
Operation or Function
Input
Input
Isolation
L
X
X
Store A and B Data
X
H
H
X
↑
H or L
↑
X
X
Input
Input
Unspecified(2)
Output
Unspecified(2)
Output
Input
Store A, Hold B
H
L
↑
X
X
StoreAinBothRegisters
Hold A, Store B
H or L
↑
↑
X
X
L
L
↑
X
X
Input
StoreBinBothRegisters
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and Stored B Data to A Bus
L
L
X
X
X
L
Output
Input
L
L
X
H or L
X
X
H
X
H
H
H
H
H
L
X
L
Input
Output
Output
H or L
H or L
X
H
H
X
H or L
H
Output
NOTES:
1. H = HIGH
L = LOW
X = Don't Care
↑ = LOW-to-HIGH transition.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
2. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored
on every LOW-to-HIGH transition on the clock inputs.
3
IDT74FCT652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
BUS
A
BUS
B
BUS
A
BUS
B
GAB GBA
CPAB
X
CPBA
X
SAB
L
SBA
X
GAB GBA
CPAB
X
CPBA
X
SAB
SBA
L
H
H
L
L
X
Real-Time Transfer
Bus B to A
Real-Time Transfer
Bus A to B
BUS
BUS
BUS
B
BUS
A
A
B
GAB GBA
CPAB
CPBA
SAB
SBA
X
GAB GBA
CPAB
H or L
CPBA
H or L
SAB
H
SBA
H
H
L
↑
X
L
L
H
X
H
X
↑
↑
X
X
X
X
X
↑
X
Storage From
A and/or B
Transfer Stores
Data to A and/or B
4
IDT74FCT652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
—
0.8
±1
±1
±1
±1
±1
–1.2
—
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State output pins)(4)
Input HIGH Current(4)
ClampDiodeVoltage
Input Hysteresis
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
µA
µA
IIL
VCC = Max.
—
IOZH
IOZL
VCC = Max
—
—
II
VCC = Max., VI = VCC (Max.)
VCC = Min, IIN = -18mA
—
µA
V
VIK
VH
ICC
–0.7
200
0.01
—
mV
mA
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
1
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
2.4
2
Typ.(2)
3.3
3
0.3
Max.
—
—
Unit
VOH
Output HIGH Voltage
VCC = Min
IOH = –8mA
IOH = –15mA
IOL = 64mA
V
VIN = VIH or VIL
VCC = Min
VOL
Output LOWVoltage
—
0.55
V
VIN = VIH or VIL
IOS
Short Circuit Current
Input/Output Power Off Leakage(5)
VCC = Max., VO = GND(3)
–60
—
–120
—
–225
mA
µA
IOFF
VCC = 0V, VIN or VO ≤ 4.5V
±1
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
5. This parameter is guaranteed but not tested.
5
IDT74FCT652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
GAB = GBA = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN = VCC
—
1.5
3.5
mA
Outputs Open
fCP = 10MHz
50% Duty Cycle
VIN = GND
GAB = GBA = GND
One Bit Toggling
at fi = 5MHz
VIN = 3.4V
VIN = GND
—
—
2
5.5
VCC = Max.
Outputs Open
fCP = 10MHz
VIN = VCC
VIN = GND
3.8
7.3(5)
50% Duty Cycle
GAB = GBA = GND
Eight Bits Toggling
at fi = 2.5MHz
VIN = 3.4V
VIN = GND
—
6
16.3(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6
IDT74FCT652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
FCT652AT
FCT652CT
Min.(2)
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Max.
Unit
PropagationDelay
2
6.3
1.5
1.5
1.5
1.5
1.5
5.4
ns
Bus to Bus
OutputEnableTime,
2
2
2
2
9.8
6.3
6.3
7.7
7.8
6.3
5.7
6.2
ns
ns
ns
ns
GAB, GBA to Bus
OutputDisableTime,
GAB, GBA to Bu
PropagationDelay
Clock to Bus
PropagationDelay
SBA or SAB to Bus
Set-up Time HIGH or LOW, Bus to Clock
Hold Time HIGH or LOW, Bus to Clock
Clock Pulse Width, HIGH or LOW(3)
2
1.5
5
—
—
—
2
1.5
5
—
—
—
ns
ns
ns
tH
tW
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
7
IDT74FCT652AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
VCC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T
.
All Other Tests
50pF
500Ω
R T
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Octal Link
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
8
IDT74FCT652AT/CT
INDUSTRIALTEMPERATURERANGE
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
ORDERINGINFORMATION
XXXX
XX
IDT
XX
FCT
Package
Device Type
Temp. Range
Small Outline IC
SO
Q
Quarter-size Small Outline Package
Fast CMOS Octal Transceiver/Register (3-State)
– 40°C to +85°C
652AT
652CT
74
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
9
相关型号:
IDT74FCT652CTQG8
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24
IDT
IDT74FCT652CTSO8
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, SOIC-24
IDT
IDT74FCT652CTSOG8
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, SOIC-24
IDT
©2020 ICPDF网 联系我们和版权申明