IDT74FCT807BTEB [IDT]
FAST CMOS 1-TO-10 CLOCK DRIVER; FAST CMOS 1到10个时钟驱动器
| 型号： | IDT74FCT807BTEB |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS 1-TO-10 CLOCK DRIVER |
| 文件： | 总7页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT807BT/CT
FAST CMOS
1-TO-10
CLOCK DRIVER
Integrated Device Technology, Inc.
> 200V using machine model (C = 200pF, R = 0)
• Available in DIP, SOIC, SSOP, QSOP, Cerpack and
LCC packages
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 250ps (max.)
• Very low duty cycle distortion < 350ps (max.)
• High speed: propagation delay < 2.5ns (max.)
• 100MHz operation
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT807BT/CT clock driver is built using
advanced dual metal CMOS technology. This low skew clock
driver features 1:10 fanout, providing minimal loading on the
preceding drivers. The IDT54/74FCT807BT/CT offers low
capacitanceinputswithhysteresisforimprovednoisemargins.
TTL level outputs and multiple power and grounds reduce
noise. The device also features -32/48mA drive capability for
driving low impedance traces.
• TTL compatible inputs and outputs
• TTL level output voltage swings
• 1:10 fanout
• Output rise and fall time < 1.5ns (max.)
• Low input capacitance: 4.5pF typical
• High Drive: -32mA IOH, 48mA IOL
• ESD > 2000V per MIL STD-883, Method 3015;
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
1
20
19
18
17
V
CC
IN
2
3
GND
O
10
9
O1
O1
O
O2
O3
O4
O5
O6
O7
O8
O9
O10
4
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
VCC
GND
5
16
15
14
13
12
11
O2
O
8
6
GND
VCC
E20-1
7
O3
O
7
8
VCC
GND
IN
9
O4
O
6
5
10
GND
O
3017 drw 02
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
INDEX
3
2
20 19
1
O9
VCC
4
5
6
7
8
18
17
16
15
14
3017 drw 01
O2
GND
O3
GND
O8
L20-2
VCC
O7
VCC
9 10 11 12 13
LCC
TOP VIEW
3017 drw 03
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OCTOBER 1995
1995 Integrated Device Technology, Inc.
9.3
DSC-4242/3
1
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ. Max. Unit
Pin Names
Description
CIN
Input
Capacitance
Output
VIN = 0V
4.5
5.5
6.0
pF
IN
Input
Ox
Outputs
COUT
VOUT = 0V
8.0
pF
3017 tbl 01
Capacitance
3017 lnk 02
NOTE:
1. This parameter is measured at characterization but not tested.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Commercial
Military
Unit
(2)
VTERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0
V
with Respect to
GND
(3)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to VCC
+0.5
–0.5 to VCC
+0.5
V
TA
Operating
Temperature
Temperature
Under Bias
Storage
0 to +70
–55 to +125 °C
TBIAS
TSTG
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Temperature
DC Output
Current
IOUT
–60 to +120 –60 to +120 mA
3017 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
abovethoseindicatedintheoperationalsectionsofthisspecificationisnot
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability. No terminal voltage may exceed VCC by
+0.5V unless otherwise noted.
2. Input and VCC terminals.
3. Output and I/O terminals.
9.3
2
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
0.8
±1
V
VIL
II H
Input LOW Level
Guaranteed Logic LOW Level
V
µA
µA
µA
µA
µA
V
Input HIGH Current(5)
Input LOW Current(5)
High Impedance Output Current
(3-State Output pins)(5)
Input HIGH Current(5)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VCC = Max.
VCC = Max.
VCC = Max.
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
—
II L
—
—
±1
IOZH
IOZL
II
—
—
±1
—
—
±1
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN= –18mA
VCC = Max.(3), VO = GND
—
—
±1
VIK
IOS
VOH
—
–0.7
–1.2
–60
2.4
–120 –225
mA
V
VCC = Min.
IOH = –12mA MIL.
3.3
3.0
0.3
—
VIN = VIH or VIL
IOH = –15mA COM'L.
IOH = –24mA MIL.
IOH = –32mA COM'L.(4)
IOL = 32mA MIL.
2.0
—
—
VOL
Output LOW Voltage
VCC = Min.
0.55
V
VIN = VIH or VIL
IOL = 48mA COM'L.
IOFF
VH
Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V
—
—
—
—
150
5
±1
—
µA
mV
µA
Input Hysteresis for all inputs
—
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
500
3017 lnk 04
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VCC = Max.
VIN = 3.4V
∆ICC
—
—
0.5
0.4
2.0
0.6
mA
ICCD
IC
Dynamic Power Supply Current(3) VCC = Max.
VIN = VCC
VIN = GND
mA/
MHz
Input toggling
50% Duty Cycle
Outputs Open
VCC = Max.
Total Power Supply Current(5)
VIN = VCC
VIN = GND
—
—
20.0 30.5(4) mA
20.3 31.3(4)
Input toggling
50% Duty Cycle
Outputs Open
fi = 50MHz
VIN = 3.4V
VIN = GND
3017 tbl 05
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi= Input Frequency
All currents are in milliamps and all frequencies are in megahertz.
9.3
3
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
IDT54/74FCT807BT
IDT54/74FCT807CT
Com'l.
Mil.
Com'l.
Mil.
(2)
(2)
(2)
(2)
Max. Min.
Symbol
tPLH
Parameter
Propagation Delay
Conditions(1) Min.
Max. Min.
Max. Min.
Max. Unit
50Ω to VCC/2, 1.3
2.7
1.3
2.5
ns
tPHL
CL = 10pF
tR
Output Rise Time
Output Fall Time
(See figure 1)
—
—
—
1.5
1.5
0.5
—
—
—
—
1.5
1.5
—
ns
ns
ns
tF
or 50Ω ac
—
—
—
—
tSK(o)
Output skew: skew between outputs of
same package (same transition)
termination,
CL = 10pF
0.25
tSK(p)
tSK(t)
Pulse skew: skew between opposite
transitions of same output (|tPHL -– tPLH|)
(See figure 2)
f ≤ 100MHz
—
—
0.5
0.9
—
—
—
—
0.35
0.65
—
—
ns
ns
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
Outputs
connected in
groups of two
3017 tbl 06
IDT54/74FCT807BT
IDT54/74FCT807CT
Com'l.
Mil.
Com'l.
Mil.
(2)
(2)
(2)
(2)
Max. Min.
Symbol
tPLH
tPHL
Parameter
Conditions(1) Min.
Max. Min.
Max. Min.
Max. Unit
Propagation Delay
CL = 30pF
f ≤ 67MHz
1.5
3.8
1.5
3.5
ns
tR
Output Rise Time
Output Fall Time
(See figure 3)
—
—
—
1.5
1.5
0.5
—
—
—
—
1.5
1.5
—
ns
ns
ns
tF
—
—
—
—
tSK(o)
Output skew: skew between outputs of
same package (same transition)
0.25
tSK(p)
tSK(t)
Pulse skew: skew between opposite
transitions of same output (|tPHL -– tPLH|)
—
—
0.5
0.9
—
—
—
—
0.35
0.75
—
—
ns
ns
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
3017 tbl 07
IDT54/74FCT807BT
IDT54/74FCT807CT
Com'l.
Mil.
Com'l.
Mil.
(2)
(2)
(2)
(2)
Max. Min.
Symbol
tPLH
tPHL
Parameter
Conditions(1) Min.
Max. Min.
Max. Min.
Max. Unit
Propagation Delay
CL = 50pF
f ≤ 40MHz
1.5
3.8
1.5
3.5
ns
tR
Output Rise Time
Output Fall Time
(See figure 4)
—
—
—
1.5
1.5
0.5
—
—
—
—
1.5
1.5
—
ns
ns
ns
tF
—
—
—
—
tSK(o)
Output skew: skew between outputs of
same package (same transition)
0.35
tSK(p)
tSK(t)
Pulse skew: skew between opposite
transitions of same output (|tPHL -– tPLH|)
—
—
0.60
1.0
—
—
—
—
0.45
0.75
—
—
ns
ns
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
3017 tbl 08
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay
limits do not imply skew.
9.3
4
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS
50Ω TO VCC/2, CL = 10pF
50Ω AC TERMINATION, CL = 10pF
VCC
VCC
VCC
100Ω
VIN
VIN
VOUT
VOUT
Pulse
Generator
Pulse
Generator
D.U.T.
D.U.T.
50Ω
10pF
10pF
100Ω
R
T
T
R
220pF
3017 drw 04
3017 drw 05
The capacitor value for ac termination is determined by the operating
frequency. For very low frequencies a higher capacitor value should be
selected.
Figure 1.
Figure 2.
CL = 30pF CIRCUIT
CL = 50pF CIRCUIT
VCC
V CC
VOUT
VOUT
VIN
VIN
Pulse
Generator
Pulse
Generator
D.U.T.
D.U.T.
30pF
50pF
R
T
RT
C
L
C L
3017 drw 06
3017 drw 07
Figure 3.
Figure 4.
ENABLE AND DISABLE TIME CIRCUIT
ENABLE AND DISABLE TIME
SWITCH POSITION
V
CC
Test
Switch
7.0V
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
Closed
500
Ω
VOUT
Open
VIN
Pulse
Generator
D.U.T.
3017 lnk 09
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
50pF
500Ω
RT
C
L
Generator.
3017 drw 08
Figure 5.
9.3
5
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST WAVEFORMS
PACKAGE DELAY
OUTPUT SKEW- tSK(o)
3V
3V
1.5V
0V
1.5V
0V
INPUT
tPLH1
tPHL1
INPUT
VOH
tPLH
tPHL
1.5V
VOL
VOH
1.5V
VOL
OUTPUT 1
OUTPUT 2
2.0V
0.8V
tSK(o)
tSK(o)
VOH
1.5V
VOL
OUTPUT
tPLH2
tF
tPHL2
tR
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
3017 drw 09
3017 drw 10
PULSE SKEW - tSK(p)
PACKAGE SKEW - tSK(t)
3V
3V
1.5V
0V
1.5V
0V
INPUT
tPLH1
tPHL1
INPUT
VOH
1.5V
VOL
tPHL
tPLH
VOH
1.5V
VOL
PACKAGE 1 OUTPUT
tSK(t)
tSK(t)
VOH
1.5V
VOL
OUTPUT
tSK(p) = |tPHL - tPLH|
PACKAGE 2 OUTPUT
tPLH2
tPHL2
tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
3017 drw 11
Package 1 and Package 2 are same device type and speed grade
3017 drw 12
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
CONTROL
INPUT
1.5V
0V
t PZL
t PLZ
3.5V
1.5V
3.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
t PHZ
tPZH
OUTPUT
NORMALLY
HIGH
0.3V VOH
0V
SWITCH
OPEN
1.5V
0V
3017 drw 13
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
9.3
6
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
XXXX
X
X
Package
Device Type
Temp. Range
Process
Commercial
MIL-STD-883, Class B
Blank
B
P
D
Plastic DIP
CERDIP
SO
L
Small Outline IC
Leadless Chip Carrier
CERPACK
Shrink Small Outline IC
Quarter-size Small Outline IC
E
PY
Q
807BT 1-to-10 Clock Driver
807CT
54
74
–55
°C to +125°C
0
°
C to +70°C
3017 drw 14
9.3
7
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