IDT74LVC07ADC [IDT]
3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS AND 5 VOLT TOLERANT I/O; 3.3V CMOS六缓冲器/驱动器，具有漏极开路输出和5V兼容的I / O
| 型号： | IDT74LVC07ADC |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS AND 5 VOLT TOLERANT I/O |
| 文件： | 总5页 (文件大小：55K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.3V CMOS HEX
BUFFER/DRIVER WITH
IDT74LVC07A
OPEN-DRAIN OUTPUTS
AND 5 VOLT TOLERANT I/O
DESCRIPTION:
FEATURES:
Thishexbuffer/driverisbuiltusingadvanceddualmetalCMOStechnol-
ogy. The outputs of the LVC07A device are open-drain and can be
connectedtootheropen-drainoutputstoimplementactive-lowwired-ORor
active-high wired-AND functions. The maximum sink current is 24mA.
TheLVC07Ahasbeendesignedwitha+24mAoutputdriver. Thisdriver
is capable of driving a moderate to heavy load while maintaining speed
performance.
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• All inputs, outputs, and I/Os are 5V tolerant
• Supports hot insertion
Inputs can be driven from either 2.5V, 3.3V (LVTTL), or 5V (CMOS)
devices.Thisfeatureallowstheuseofthisdeviceasatranslatorinamixed-
systemenvironment.
• Available in SOIC, SSOP, and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONALBLOCKDIAGRAM
PINCONFIGURATION
1
2
14
1A
1Y
VCC
6A
6Y
5A
5Y
4A
4Y
13
12
11
10
A
Y
2A
3
4
2Y
3A
5
6
7
3Y
9
8
GND
SOIC/ SSOP/ TSSOP
TOP VIEW
(1)
PINDESCRIPTION
Pin Names
FUNCTION TABLE (EACH BUFFER/DRIVER)
Inputs
Outputs (with pull-up)
Description
x A
x Y
Data Inputs
xA
H
xY
H
Data Outputs
L
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JULY 2000
1
©2000 Integrated Device Technology, Inc.
DSC-4723/1
IDT74LVC07A
3.3VCMOSHEXBUFFER/DRIVERWITHOPEN-DRAINOUTPUTS
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
Conditions
VIN = 0V
VOUT = 0V
VIN = 0V
Typ.
Max. Unit
Symbol
VTERM
TSTG
Description
Terminal Voltage with Respect to GND
Storage Temperature
Max
Unit
V
Symbol
–0.5 to +6.5
–65 to +150
–50 to +50
–50
CIN
Input Capacitance
Output Capacitance
I/O Port Capacitance
4.5
6
8
8
pF
pF
pF
°C
mA
mA
COUT
CI/O
5.5
IOUT
DC Output Current
6.5
IIK
Continuous Clamp Current,
VI < 0 or VO < 0
NOTE:
IOK
1. As applicable to the device type.
ICC
ISS
Continuous Current through each
VCC or GND
±100
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Operating Condition: TA = –40°C to +85°C
Symbol
Parameter
Test Conditions
Min.
1.7
2
Typ.(1)
—
Max.
—
Unit
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 4.5V to 5.5V
VIH
Input HIGH Voltage Level
—
—
V
0.7 x VCC
—
—
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
—
—
—
—
0.7
0.8
VIL
Input LOW Voltage Level
Input Leakage Current
V
VCC = 4.5V to 5.5V
VCC = 3.6V
—
—
—
—
0.3 x VCC
IIH
IIL
VI = 0 to 5.5V
±5
µA
µA
IOZH
IOZL
IOFF
VIK
High Impedance Output Current
(3-State Output pins)
VCC = 3.6V
VO = 0 to 5.5V
—
—
±10
Input/Output Power Off Leakage
Clamp Diode Voltage
VCC = 0V, VIN or VO ≤ 5.5V
—
—
—
±50
µA
V
VCC = 2.3V, IIN = –18mA
–0.7
–1.2
VH
Input Hysteresis
VCC = 3.3V
—
—
100
—
—
10
mV
µA
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = 3.6V, VIN = GND or VCC
∆ICC
Quiescent Power Supply Current
Variation
One input at VCC - 0.6V, other inputs at VCC or GND
—
—
500
µA
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2
IDT74LVC07A
3.3VCMOSHEXBUFFER/DRIVERWITHOPEN-DRAINOUTPUTS
INDUSTRIALTEMPERATURERANGE
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
TestConditions(1)
Min.
—
Max.
0.2
Unit
VOL
OutputLOWVoltage
VCC = 2.3V to 3.6V
IOL = 0.1mA
IOL = 6mA
V
VCC = 2.3V
—
0.4
IOL = 12mA
IOL = 12mA
IOL = 24mA
—
0.7
VCC = 2.7V
VCC = 3V
—
0.4
—
0.55
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V±0.2V VCC = 3.3V±0.3V
VCC = 5V±0.5V
Symbol
Parameter
Test Conditions
Typical
Typical
Typical
Unit
CPD
PowerDissipationCapacitanceperBuffer/Driver
CL = 0pF, f = 10Mhz
2.5
4
7
pF
SWITCHINGCHARACTERISTICS(1)
VCC = 2.5V±0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
VCC = 5V±0.5V
Symbol
tPZL
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
xA to xY
1
2.8
1
3.3
1
2.9
1
2.6
ns
tPLZ
tSK(o)
OutputSkew(2)
—
—
—
—
—
—
—
500
ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2
Skew between any two outputs of the same package and switching in the same direction.
3
IDT74LVC07A
3.3VCMOSHEXBUFFER/DRIVERWITHOPEN-DRAINOUTPUTS
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
TESTCONDITIONS
VIH
VT
0V
SAME PHASE
INPUT TRANSITION
(1)
VCC
(2)
VCC
(2)
VCC
tPHL
tPHL
tPLH
tPLH
Symbol
Unit
VOH
VT
VOL
OUTPUT
= 2.5V±0.2V
2 x Vcc
Vcc
=3.3V±0.3V & 2.7V
= 5V±0.5V
VLOAD
VIH
6
2 x Vcc
3
V
V
VIH
VT
0V
2.7
1.5
300
300
50
OPPOSITE PHASE
INPUT TRANSITION
VT
Vcc / 2
150
1.5
V
VLZ
VHZ
CL
200
200
50
mV
LVC QUAD Link
Propagation Delay
150
mV
30
pF
VLOAD
Open
VCC
DISABLE
ENABLE
VIH
VT
CONTROL
INPUT
500Ω
500Ω
GND
0V
tPZL
tPLZ
VIN
VOUT
(1, 2)
Pulse
D.U.T.
VLOAD/2
VT
VLOAD/2
OUTPUT
NORMALLY
LOW
Generator
SWITCH
CLOSED
VLZ
VOL
RT
tPHZ
tPZH
CL
OUTPUT
NORMALLY
HIGH
VOH
VHZ
SWITCH
OPEN
VT
0V
LVC QUAD Link
0V
Test Circuit for All Outputs
LVC QUAD Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Enable and Disable Times
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
VIH
DATA
INPUT
VT
SWITCHPOSITION
0V
tSU
tH
VIH
VT
0V
VIH
VT
0V
Test
Switch
TIMING
INPUT
tPZL
tPLZ
tPHZ
tPZH
VLOAD
tREM
SYNCHRONOUS
CONTROL
VIH
VT
ASYNCHRONOUS
CONTROL
tSU
0V
tH
VIH
LVC QUAD Link
VT
0V
INPUT
Set-up, Hold, and Release Times
tPLH1
tPHL1
VOH
VT
VOL
LOW-HIGH-LOW
OUTPUT 1
OUTPUT 2
tSK (x)
tSK (x)
VT
PULSE
VOH
tW
VT
VOL
HIGH-LOW-HIGH
PULSE
VT
tPLH2
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tPHL2
LVC QUAD Link
LVC QUAD Link
Pulse Width
Output Skew - tSK(X)
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
4
IDT74LVC07A
3.3VCMOSHEXBUFFER/DRIVERWITHOPEN-DRAINOUTPUTS
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
XXX
Device Type Package
XX
IDT
Temp. Range
LVC
XX
DC Small Outline IC
PY Shrink Small Outline Package
PG Thin Shrink Small Outline Package
07A
Hex Buffer/Driver with Open Drain Outputs, +24mA
74
– 40°C to +85°C
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