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IDT74LVC162245APFG8 [IDT]

Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TVSOP-48;
IDT74LVC162245APFG8
型号： IDT74LVC162245APFG8
厂家： INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述：

Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TVSOP-48

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3.3V CMOS 16-BIT  
BUS TRANSCEIVER  
IDT74LVC162245A  
WITH 3-STATE OUTPUTS  
AND 5 VOLT TOLERANT I/O  
FEATURES:  
DESCRIPTION:  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
This 16-bit transceiver is built using advanced dual metal CMOS  
technology.TheLVC162245Ais designedforasynchronous communica-  
tionbetweendata buses.The control-functionimplementationminimizes  
external timing requirements. This device can be used as two 8-bit  
transceivers orone16-bittransceiver.Itallows datatransmissionfromthe  
A bus to the B bus or from the B bus to the A bus, depending on the logic  
levelatthedirection-control(DIR)input.Theoutput-enable(OE)inputcan  
beusedtodisablethedevicesothatthebuses areeffectivelyisolated. To  
ensure the high-impedance state during power up or power down, OE  
shouldbe tiedtoVCC througha pullupresistor;the minimumvalue ofthe  
resistoris determinedbythe current-sinkingcapabilityofthe driver.  
Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows  
the use of this device as a translator in a mixed 3.3V/5V supply system.  
The LVC162245Ahas series resistors inthe device outputstructure of  
the “A”portwhichwillsignificantlyreduce line noise whenusedwithlight  
loads. The driver has been designed to drive ±12mA at the designated  
threshold levels. The “B” port has a ±24mA driver.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4μ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Available in SSOP, TSSOP, and TVSOP packages  
DRIVE FEATURES:  
• Balanced Output Drivers: ±12mA (A port)  
• High Output Drivers: ±24mA (B port)  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
24  
1
1DIR  
2DIR  
25  
48  
1OE  
1B1  
2OE  
36  
47  
1A1  
2A1  
2
13  
2B1  
35  
46  
1A2  
3
2A2  
14  
1B2  
1B3  
2B2  
33  
44  
1A3  
2A3  
16  
5
2B3  
32  
43  
1A4  
2A4  
6
17  
1B4  
1B5  
1B6  
2B4  
41  
30  
1A5  
2A5  
8
19  
2B5  
40  
29  
1A6  
2A6  
9
20  
2B6  
38  
27  
1A7  
2A7  
11  
22  
1B7  
1B8  
2B7  
26  
37  
1A8  
2A8  
23  
12  
2B8  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
OCTOBER 2008  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4483/3  
IDT74LVC162245A  
3.3VCMOS16-BITTRANSCEIVERWITH3-STATEOUTPUTS  
INDUSTRIALTEMPERATURERANGE  
ABSOLUTEMAXIMUMRATINGS(1)  
PINCONFIGURATION  
Symbol  
Description  
Max  
Unit  
V
(2)  
VTERM  
Terminal Voltage with Respect to GND  
Terminal Voltage with Respect to GND  
Storage Temperature  
–0.5 to +6.5  
–0.5 to +6.5  
–65 to +150  
–50 to +50  
–50  
(3)  
VTERM  
V
1
2
3
4
5
6
48  
47  
46  
45  
44  
43  
1DIR  
1B1  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
VCC  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
VCC  
TSTG  
IOUT  
° C  
mA  
mA  
DC Output Current  
IIK  
IOK  
Continuous Clamp Current,  
VI < 0 or VO < 0  
1B2  
GND  
1B3  
ICC  
ISS  
Continuous Current through each  
VCC or GND  
±100  
mA  
NOTES:  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
1B4  
VCC  
1B5  
7
42  
41  
40  
8
2. VCC terminals.  
3. All terminals except VCC.  
1B6  
9
GND  
1B7  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
CAPACITANCE (TA = +25°C, F = 1.0MHz)  
Symbol  
Parameter(1)  
Conditions  
VIN = 0V  
VOUT = 0V  
VIN = 0V  
Typ.  
Max. Unit  
1B8  
CIN  
Input Capacitance  
Output Capacitance  
I/O Port Capacitance  
4.5  
6
8
8
pF  
pF  
pF  
2B1  
COUT  
CI/O  
6.5  
2B2  
6.5  
NOTE:  
GND  
2B3  
1. As applicable to the device type.  
2B4  
PINDESCRIPTION  
Pin Names  
VCC  
2B5  
Description  
xOE  
xDIR  
xAx  
xBx  
Output Enable Input (Active LOW)  
Direction Control Output  
2A5  
2A6  
GND  
2A7  
2A8  
20  
21  
22  
23  
2B6  
GND  
2B7  
Side A Inputs or 3-State Outputs  
Side B Inputs or 3-State Outputs  
(1)  
2B8  
FUNCTION TABLE (EACH 8-BIT SECTION)  
Inputs  
24  
25  
2DIR  
2OE  
xOE  
L
xDIR  
L
Outputs  
B Data to A Bus  
SSOP/ TSSOP/ TVSOP  
TOP VIEW  
L
H
A Data to B Bus  
Isolation  
H
X
NOTE:  
1. H = HIGH Voltage Level  
X = Don’t Care  
L = LOW Voltage Level  
2
IDT74LVC162245A  
3.3VCMOS16-BITTRANSCEIVERWITH3-STATEOUTPUTS  
INDUSTRIALTEMPERATURERANGE  
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE  
FollowingConditionsApplyUnlessOtherwiseSpecified:  
OperatingCondition:TA = –40°C to +85°C  
Symbol  
Parameter  
Test Conditions  
Min.  
1.7  
2
Typ.(1)  
—
Max.  
—
Unit  
VIH  
Input HIGH Voltage Level  
VCC = 2.3V to 2.7V  
VCC = 2.7V to 3.6V  
V
—
—
VIL  
Input LOW Voltage Level  
Input Leakage Current  
VCC = 2.3V to 2.7V  
VCC = 2.7V to 3.6V  
—
—
—
—
0.7  
0.8  
V
IIH  
IIL  
VCC = 3.6V  
VI = 0 to 5.5V  
—
—
5
µA  
µ A  
IOZH  
IOZL  
High Impedance Output Current  
(3-State Output pins)  
VCC = 3.6V  
VO = 0 to 5.5V  
—
—
10  
IOFF  
VIK  
VH  
Input/Output Power Off Leakage  
Clamp Diode Voltage  
VCC = 0V, VIN or VO ≤ 5.5V  
—
—
—
50  
µ A  
V
VCC = 2.3V, IIN = –18mA  
–0.7  
–1.2  
Input Hysteresis  
VCC = 3.3V  
VCC = 3.6V  
—
—
100  
—
—
10  
mV  
µA  
ICCL  
ICCH  
ICCZ  
Quiescent Power Supply Current  
VIN = GND or VCC  
(2)  
3.6 ≤ VIN ≤ 5.5V  
—
—
—
—
10  
ΔICC  
Quiescent Power Supply Current  
Variation  
One input at VCC - 0.6V, other inputs at VCC or GND  
500  
µ A  
NOTES:  
1. Typical values are at VCC = 3.3V, +25°C ambient.  
2. This applies in the disabled state only.  
OUTPUTDRIVECHARACTERISTICS(APORT)  
Symbol  
Parameter  
TestConditions(1)  
VCC = 2.3V to 3.6V  
Min.  
VCC – 0.2  
1.9  
1.7  
2.2  
2
Max.  
—
Unit  
V
VOH  
OutputHIGHVoltage  
IOH = – 0.1mA  
IOH = – 4mA  
IOH = – 6mA  
IOH = – 4mA  
IOH = – 8mA  
IOH = – 6mA  
IOH = – 12mA  
IOL = 0.1mA  
IOL = 4mA  
VCC = 2.3V  
VCC = 2.7V  
VCC = 3V  
—
—
—
—
2.4  
2
—
—
VOL  
OutputLOWVoltage  
VCC = 2.3V to 3.6V  
VCC = 2.3V  
—
0.2  
0.4  
0.55  
0.4  
0.6  
0.55  
0.8  
V
—
IOL = 6mA  
—
VCC = 2.7V  
VCC = 3V  
IOL = 4mA  
—
IOL = 8mA  
—
IOL = 6mA  
—
IOL = 12mA  
—
NOTE:  
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.  
TA = – 40°C to + 85°C.  
3
IDT74LVC162245A  
3.3VCMOS16-BITTRANSCEIVERWITH3-STATEOUTPUTS  
INDUSTRIALTEMPERATURERANGE  
OUTPUTDRIVECHARACTERISTICS(BPORT)  
Symbol  
Parameter  
TestConditions(1)  
Min.  
VCC – 0.2  
2
Max.  
—
Unit  
VOH  
OutputHIGHVoltage  
VCC = 2.3V to 3.6V  
IOH = – 0.1mA  
IOH = – 6mA  
IOH = – 12mA  
V
VCC = 2.3V  
VCC = 2.3V  
VCC = 2.7V  
VCC = 3V  
—
1.7  
—
2.2  
—
2.4  
—
VCC = 3V  
IOH = – 24mA  
IOL = 0.1mA  
IOL = 6mA  
2
—
VOL  
OutputLOWVoltage  
VCC = 2.3V to 3.6V  
VCC = 2.3V  
—
0.2  
0.4  
0.7  
0.4  
0.55  
V
—
IOL = 12mA  
IOL = 12mA  
IOL = 24mA  
—
VCC = 2.7V  
VCC = 3V  
—
—
NOTE:  
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.  
TA = – 40°C to + 85°C.  
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C  
Symbol  
Parameter  
Test Conditions  
Typical  
Unit  
CPD  
PowerDissipationCapacitanceperTransceiverOutputsenabled  
PowerDissipationCapacitanceperTransceiverOutputsdisabled  
CL = 0pF, f = 10Mhz  
pF  
CPD  
SWITCHINGCHARACTERISTICS(APORT)(1)  
VCC = 2.7V  
Max.  
VCC = 3.3V ± 0.3V  
Symbol  
Parameter  
Min.  
Min.  
Max.  
Unit  
tPLH  
tPHL  
PropagationDelay  
xBx to xAx  
1.5  
5.7  
7.9  
8.3  
—
1.5  
4.8  
ns  
ns  
ns  
ps  
tPZH  
tPZL  
OutputEnableTime  
xOE to xAx  
1.5  
1.5  
—
1.5  
2.2  
—
6.3  
7.4  
500  
tPHZ  
tPLZ  
OutputDisableTime  
xOE to xAx  
(2)  
tSK(o)  
OutputSkew  
NOTES:  
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.  
2. Skew between any two outputs of the same package and switching in the same direction.  
SWITCHINGCHARACTERISTICS(BPORT)(1)  
VCC = 2.7V  
Max.  
VCC = 3.3V ± 0.3V  
Symbol  
Parameter  
Min.  
Min.  
Max.  
Unit  
tPLH  
tPHL  
PropagationDelay  
xAx to xBx  
1.5  
4.7  
6.7  
7.1  
—
1
4
ns  
tPZH  
tPZL  
OutputEnableTime  
xOE to xBx  
1.5  
1.5  
—
1.5  
1.5  
—
5.5  
6.6  
500  
ns  
ns  
ps  
tPHZ  
tPLZ  
OutputDisableTime  
xOE to xBx  
(2)  
tSK(o)  
OutputSkew  
NOTES:  
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.  
2. Skew between any two outputs of the same package and switching in the same direction.  
4
IDT74LVC162245A  
3.3VCMOS16-BITTRANSCEIVERWITH3-STATEOUTPUTS  
INDUSTRIALTEMPERATURERANGE  
TESTCIRCUITSANDWAVEFORMS  
TESTCONDITIONS  
VIH  
VT  
0V  
SAME PHASE  
INPUT TRANSITION  
(1)  
(1)  
(2)  
Symbol VCC =3.3V±0.3V VCC =2.7V VCC =2.5V±0.2V Unit  
tPHL  
VLOAD  
VIH  
6
6
2 x Vcc  
Vcc  
V
V
tPLH  
VOH  
VT  
VOL  
OUTPUT  
2.7  
1.5  
300  
300  
50  
2.7  
1.5  
300  
300  
50  
VT  
Vcc / 2  
150  
V
tPHL  
tPLH  
VLZ  
VHZ  
CL  
mV  
mV  
pF  
VIH  
VT  
0V  
OPPOSITE PHASE  
INPUT TRANSITION  
150  
30  
LVC Link  
VLOAD  
Open  
GND  
Propagation Delay  
VCC  
DISABLE  
ENABLE  
VIH  
VT  
0V  
500Ω  
CONTROL  
INPUT  
VIN  
VOUT  
Pulse (1, 2)  
tPZL  
tPLZ  
D.U.T.  
Generator  
VLOAD/2  
VT  
VLOAD/2  
VOL+VLZ  
VOL  
OUTPUT  
NORMALLY  
LOW  
SWITCH  
CLOSED  
500Ω  
RT  
CL  
tPHZ  
tPZH  
VOH  
VOH-VHZ  
OUTPUT  
NORMALLY  
HIGH  
SWITCH  
OPEN  
LVC Link  
VT  
0V  
Test Circuit for All Outputs  
0V  
LVC Link  
DEFINITIONS:  
CL = Load capacitance: includes jig and probe capacitance.  
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.  
Enable and Disable Times  
NOTE:  
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.  
NOTES:  
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.  
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.  
VIH  
SWITCHPOSITION  
DATA  
INPUT  
VT  
0V  
Test  
Switch  
VLOAD  
GND  
Open  
tSU  
tH  
VIH  
TIMING  
INPUT  
Open Drain  
Disable Low  
Enable Low  
VT  
0V  
tREM  
VIH  
ASYNCHRONOUS  
CONTROL  
VT  
Disable High  
Enable High  
0V  
VIH  
SYNCHRONOUS  
CONTROL  
All Other Tests  
VT  
tSU  
0V  
tH  
LVC Link  
VIH  
VT  
0V  
Set-up, Hold, and Release Times  
INPUT  
tPLH1  
tPHL1  
VOH  
LOW-HIGH-LOW  
VT  
VOL  
VT  
PULSE  
OUTPUT 1  
tSK (x)  
tSK (x)  
tW  
VOH  
VT  
VOL  
HIGH-LOW-HIGH  
PULSE  
VT  
OUTPUT 2  
LVC Link  
tPLH2  
tPHL2  
Pulse Width  
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1  
LVC Link  
Output Skew - tSK(X)  
NOTES:  
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.  
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.  
5
IDT74LVC162245A  
3.3VCMOS16-BITTRANSCEIVERWITH3-STATEOUTPUTS  
INDUSTRIALTEMPERATURERANGE  
ORDERINGINFORMATION  
LVC  
XX  
Device Type Package  
X
XX  
XXXX  
XX  
Family  
Temp. Range  
Bus-Hold  
Shrink Small Outline Package  
PV  
Thin Shrink Small Outline Package  
TSSOP - Green  
PA  
PAG  
Thin Very Small Outline Package  
PF  
16-Bit Bus Transceiver  
245A  
162  
Double-Density 3.3Volt with Resistors, 12mA (A Port)  
24mA (B Port)  
No Bus-hold  
Blank  
74  
-40°C to +85°C  
CORPORATE HEADQUARTERS  
6024 Silver Creek Valley Road  
San Jose, CA 95138  
for SALES:  
800-345-7015 or 408-284-8200  
fax: 408-284-2775  
for Tech Support:  
logichelp@idt.com  
www.idt.com  
6

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