IDT74LVC541APY8 [IDT]

Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, SSOP-20;


型号：	IDT74LVC541APY8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, SSOP-20 驱动光电二极管输出元件逻辑集成电路
文件：	总5页 (文件大小：99K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74LVC541A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

3.3V CMOS OCTAL

BUFFER/DRIVER

IDT74LVC541A

WITH 3-STATE OUTPUTS

AND 5 VOLT TOLERANT I/O

DESCRIPTION:

FEATURES:

–

0.5 MICRON CMOS Technology

The LVC541A octal buffer/driver is built using advanced dual metal

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

1.27mm pitch SOIC, 0.65mm pitch SSOP,

0.635mm pitch QSOP, 0.65mm pitch TSSOP packages

Extended commercial range of – 40°C to +85°C

VCC = 3.3V ±0.3V, Normal Range

CMOS technology. This device is ideal for driving bus lines or buffer

memory address registers. This device features inputs and outputs on

oppositesidesofthepackagethatfacilitateprintedcircuitboardlayout.The

3-state controlgate is a 2-inputANDgate withactive-lowinputs sothatif

eitheroutputenable(OE1 orOE2)inputis high,alleightoutputs areinthe

high-impedancestate.

–

= 2.3V to 3.6V, Extended Range

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

All inputs, outputs and I/O are 5 Volt tolerant

Supports hot insertion

The LVC541A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

Drive Features for LVC541A:

Toensure the high-impedance state duringpoweruporpowerdown,

OE shouldbe tiedtoVCC througha pullupresistor;the minimumvalue of

the resistoris determinedbythe current-sinkingcapabilityofthe driver.

–

High Output Drivers: ±24mA

Reduced system switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

Inputs canbedrivenfromeither3.3Vor5Vdevices.This featureallows

the use ofthis device as a translatorina mixed3.3V/5Vsystemenviron-

ment.

PINCONFIGURATION

FUNCTIONALBLOCKDIAGRAM

VCC

OE2

OE1

OE2

SO20-2

SO20-7

SO20-8

SO20-9

TO SEVEN OTHER CHANNELS

FUNCTION TABLE ⁽¹⁾

GND

Inputs

Outputs

SOIC/ SSOP/ QSOP/ TSSOP

TOP VIEW

OE1

OE2

PIN DESCRIPTION

Pin Names

Description

OE1, OE2

Output-enable Inputs (Active LOW)

NOTE:

1. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Data Inputs

Data Outputs

Z = High-Impedance

EXTENDED COMMERCIAL TEMPERATURE RANGE

DECEMBER 1999

1999 Integrated Device Technology, Inc.

DSC-4649/-

IDT74LVC541A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

CAPACITANCE (TA = +25°C, f = 1.0MHZ)

Symbol

Parameter⁽¹⁾

Conditions

= 0V

Typ.

Max. Unit

Symbol

VTERM

TSTG

Description

Max.

Unit

Input Capacitance

4.5

Terminal Voltage with Respect to GND

Storage Temperature

– 0.5 to +6.5

– 65 to +150

°C

C_OUT

Output

Capacitance

I/O Port

V_OUT= 0V

5.5

6.5

IOUT

DC Output Current

– 50 to +50

– 50

I/O

V = 0V

IIK

Continuous Clamp Current,

VI < 0 or VO < 0

Capacitance

IOK

ICC

8LVC Link

NOTE:

1. As applicable to the device type.

Continuous Current through

±100

I_SS

each V_CCor GND

8LVC

NOTE:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Operating Condition: TA = – 40°C To +85°C

Symbol

Parameter

Test Conditions

Min.

Typ.⁽¹⁾

Max.

Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

VCC = 3.6V

1.7

—

VIL

Input LOW Voltage Level

Input Leakage Current

—

0.7

0.8

±5

IIH

VI = 0 to 5.5V

µA

IIL

IOZH

High Impedance Output Current

(3-State Output pins)

VCC = 3.6V

VO = 0 to 5.5V

—

±10

IOZL

IOFF

VIK

Input/Output Power Off Leakage

Clamp Diode Voltage

VCC = 0V, VIN or VO ≤ 5.5V

VCC = 2.3V, IIN = – 18mA

VCC = 3.3V

—

– 0.7

100

—

±50

– 1.2

—

µA

Input Hysteresis

µA

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VCC = 3.6V

VIN = GND or VCC

(2)

—

3.6 ≤ VIN ≤ 5.5V

∆ICC

Quiescent Power Supply

Current Variation

One input at VCC - 0.6V,

other inputs at VCC or GND

500

µA

8LVC Link

NOTES:

1. Typical values are at V^CC= 3.3V, +25°C ambient.

2. This applies in the disabled state only.

IDT74LVC541A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

OUTPUT DRIVE CHARACTERISTICS

Symbol

Parameter

Output HIGH Voltage

Test Conditions⁽¹⁾

IOH = – 0.1mA

Min.

Max.

Unit

VOH

VCC = 2.3V to 3.6V

VCC = 2.3V

VCC – 0.2

—

IOH = – 6mA

IOH = – 12mA

—

VCC = 2.3V

1.7

2.2

2.4

2.2

—

VCC = 2.7V

—

VCC = 3.0V

—

VCC = 3.0V

IOH = – 24mA

IOL = 0.1mA

IOL = 6mA

—

VOL

Output LOW Voltage

VCC = 2.3V to 3.6V

VCC = 2.3V

0.2

0.4

0.7

0.4

0.55

IOL = 12mA

IOL = 24mA

VCC = 2.7V

VCC = 3.0V

8LVC Link

NOTE:

1. V^IHand V^ILmust be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the

appropriate V^CCrange. T^A= – 40°C to +85°C.

OPERATING CHARACTERISTICS, T = 25°C

VCC = 2.5V±0.2V

VCC = 3.3V±0.3V

Unit

Symbol

Parameter

Test Conditions

Typical

CPD

Power dissipation capacitance per transceiver outputs enabled

CL = 0pF, f = 10Mhz

—

CPD

Power dissipation capacitance per transceiver outputs disabled

—

SWITCHING CHARACTERISTICS ⁽¹⁾

VCC = 2.5V±0.2V

VCC = 2.7V

VCC = 3.3V±0.3V

Symbol

tPLH

Parameter

Propagation Delay

Ax to Yx

Min.

Max.

Min.

Max.

Min.

Max.

Unit

—

5.6

7.5

7.7

—

1.5

5.1

tPHL

tPZH

Output Enable Time

OEx to Yx

Output Disable Time

—

1.5

—

tPZL

tPHZ

tPLZ

OEx to Yx

(2)

tSK(o) Output Skew

NOTES:

1. See test circuits and waveforms. T^A= – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

IDT74LVC541A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

TESTCIRCUITSANDWAVEFORMS

PROPAGATIONDELAY

TESTCONDITIONS

Symbol

VIH

(1)

(2)

VCC = 3.3V ±0.3V VCC = 2.7V VCC = 2.5V ±0.2V

Unit

SAME PHASE

VLOAD

2 xVcc

Vcc

INPUT TRANSITION

t^PHL

t^PLH

VIH

2.7

1.5

300

2.7

1.5

300

VOH

VOL

OUTPUT

VCC / 2

150

VLZ

VHZ

t^PHL

t^PLH

VIH

150

OPPOSITE PHASE

INPUT TRANSITION

8LVC Link

LVC Link

TEST CIRCUITS FOR ALL OUTPUTS

ENABLEANDDISABLETIMES

V^LOAD

V^CC

DISABLE

ENABLE

V^IH

V^T

Open

GND

CONTROL

INPUT

500Ω

t^PZL

t^PLZ

V^IN

V^OUT

Pulse ^{(1, 2)}

Generator

D.U.T.

V^LOAD/2

V^T

V^LOAD/2

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

V^OL+V^LZ

V^OL

R^T

t^PHZ

tPZH

C^L

V^OH

V^OH-V^HZ

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

V^T

LVC Link

DEFINITIONS:

C^L= Load capacitance: includes jig and probe capacitance.

LVC Link

R^T= Termination resistance: should be equal to Z^OUTof the Pulse

NOTE:

Generator.

1. Diagram shown for input Control Enable-LOW and input Control

Disable-HIGH.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; t^F≤ 2.5ns; t^R≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; t^F≤ 2ns; t^R≤ 2ns.

SET-UP, HOLD, AND RELEASE TIMES

SWITCHPOSITION

V^IH

V^T

DATA

INPUT

Test

Switch

t^SU

t^H

Open Drain

Disable Low

Enable Low

Disable High

Enable High

All Other tests

LOAD

V^IH

V^T

TIMING

INPUT

t^REM

V^IH

V^T

GND

Open

ASYNCHRONOUS

CONTROL

V^IH

V^T

SYNCHRONOUS

CONTROL

8LVC Link

t^SU

t^H

OUTPUT SKEW - tsk (x)

V^IH

LVC Link

V^T

INPUT

PULSEWIDTH

t^PLH1

t^PHL1

V^OH

V^T

LOW-HIGH-LOW

PULSE

OUTPUT 1

OUTPUT 2

V^OL

V^T

t^SK(x)

V^OH

t^W

V^T

HIGH-LOW-HIGH

PULSE

V^T

V^OL

LVC Link

t^PLH2

t^SK(x) = t^PLH2- t^PLH1or t^PHL2- t^PHL1

t^PHL2

LVC Link

NOTES:

1. For t^SK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For t^SK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74LVC541A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

ORDERINGINFORMATION

IDT

LVC

XXXX

Temp. Range

Bus-Hold Device Type Package

Small Outline IC (gull wing) (SO20-2)

Shrink Small Outline Package (SO20-7)

Quarter Size Small Outline Package (SO20-8)

Thin Shrink Small Outline Package (SO20-9)

541A

Octal Buffer/Driver with 3-State Outputs, ±24mA

Blank

No Bus-hold

–40°C to +85°C

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Santa Clara, CA 95054

for SALES:

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fax: 408-492-8674

www.idt.com*

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The IDT logo is a registered trademark of Integrated Device Technology, Inc.

IDT74LVC541APY8 [IDT]

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