IDTQS3ST257Q [IDT]
Multiplexer And Demux/Decoder, 1-Func, 8 Line Input, 4 Line Output, True Output, CMOS, PDSO20, QSOP-20;
| 型号： | IDTQS3ST257Q |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Multiplexer And Demux/Decoder, 1-Func, 8 Line Input, 4 Line Output, True Output, CMOS, PDSO20, QSOP-20 光电二极管 逻辑集成电路 |
| 文件： | 总10页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
QUICKSWITCH® PRODUCTS
HIGH-SPEED CMOS SYNCHRO-
IDTQS3ST257
SWITCH™ QUAD 2:1 MUX/DEMUX
WITH ACTIVE TERMINATORS
FEATURES:
DESCRIPTION:
−
−
−
−
−
−
−
−
−
−
−
−
−
Enhanced N channel FET with no inherent diode to Vcc
Bidirectional signal flow
Flow-through pinout
Zero propagation delay, zero ground bounce
4 banks of 2:1 Mux/Demux
Port select synchronous to the clock
Clock enable and Asynchronous switch enable
“Bus-hold” terminators on the Demux side
Undershoot clamp diodes on all switch and control pins
Asynchronous SEL option
TheQS3ST257isahigh-speedCMOSQuad2:1 multiplexer/demultiplexer
withactiveterminators(bus-holdcircuits)onthedemuxside. Portselection
andconnection,controlledbySELsignals,canbeeitherasynchronous or
synchronous. Inthesynchronousmode,theAorBporttoYportconnection
is updatedonthe risingedge ofthe inputclockCLK. Once the port-to-port
connection is made, data flow can be bi-directional with a typical 250ps
propagationdelaythroughtheswitch. ClockEnable,overridingAsynchro-
nous Enable,andAsynchronous Selectcontrols provideadditionaldesign
flexibility.
The bus-hold circuits latch the last data driven on the demux side,
providinginfiniteholdtimeandglitch-freesignaltransitions. Synchronous
controlsandbus-holdeasetimingconstraintsinmanyhighspeeddatamux/
demuxapplications,suchas bankinterleaving.
Break-before-make feature
Available in 20-pin QSOP Package
Bus-hold eliminates floating bus lines and reduces static power
consumption
QuickSwitchMux/Demuxdevicesprovideanorderofmagnitudefaster
speedthanequivalentlogicdevices.
APPLICATIONS:
−
−
−
Video, audio, graphics switching, muxing
Bus funneling
Voltage translation
The QS3ST257 is characterized for operation at -40°C to +85°C.
FUNCTIONALBLOCKDIAGRAM
R
=
T
SEL
CLK
CONTROL
CLKEN
LOGIC
OE
SYNC
A0
B0
A1
B1
A2
B2
A3
B3
T
T
T
T
T
T
T
T
Y0
Y1
Y2
Y3
INDUSTRIAL TEMPERATURE RANGE
NOVEMBER 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-5534/-
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS (1)
PINCONFIGURATION
Symbol
Description
Max.
Unit
(2)
Supply Voltage to Ground
– 0.5 to +7
V
V
TERM
(3)
V
TERM
DC Switch Voltage VS
– 0.5 to +7
– 0.5 to +7
-3
V
V
1
2
20
19
18
17
NC
A0
A1
A2
A3
Vcc
OE
SEL
Y0
(3)
DC Input Voltage VIN
VTERM
VAC
AC Input Voltage (pulse width ≤20ns)
DC Output Current
V
3
IOUT
120
mA
W
4
5
6
PMAX
TSTG
Maximum Power Dissipation (TA = 85°C)
Storage Temperature
.82
– 65 to +150 °C
16
Y1
Y2
SO20-8
NOTES:
B0
B1
15
14
13
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc Terminals.
7
8
9
Y3
B2
CLKEN
CLK
B3
12
11
10
GND
SYNC
3. All terminals except Vcc.
CAPACITANCE
QSOP
(TA = +25OC, f = 1.0MHz, VIN = 0V, VOUT = 0V)
TOP VIEW
Pins
Typ.
Max. (1)
Unit
Control Inputs
4
5
pF
Quickswitch Channels
(Switch OFF)
Demux
Mux
5
7
7
9
pF
pF
NOTE:
1. This parameter is guaranteed but not production tested.
PIN DESCRIPTION
Pin Names
I/O
Description
Demux Port A
A0 - A3
I/O
B0 - B3
Y0 - Y3
SEL
I/O
Demux Port B
Mux Port Y
I/O
I
I
I
I
I
Select Input
Clock
CLK
CLKEN
OE
Clock Enable
Output Enable
Synchronous Enable
SYNC
2
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
FUNCTION TABLE(1)
Control Inputs
Port Status
Function
SYNC
OE
L
CLKn
CLKEN
SEL
L
Y0
A0
B0
Y1
A1
B1
Y2
A2
B2
Y3
A3
B3
L
L
L
L
L
H
H
↑
L
L
Select Port A
L
↑
H
Select Port B
H
L
↑
L
X
No change in Mux connection
No change in Mux connection
No change in Mux connection
Hold Previous Data (2) (Switch OFF)
Hold Previous Mux connection (3) (Switch ON)
Hold Previous Data (4) (Switch OFF)
Select Port A
↑
H
H
X
X
X
X
H
L
↑
X
X
X
X
L
A0
B0
A1
B1
A2
B2
A3
B3
L
H
Select Port B
Hold Previous Data (2) (Switch OFF)
H
H
X
No change in Mux connection
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
= Low-to-High Transition
2. Mux switches are turned off and the terminators (last value latches) hold the previous data state. The port connection can be changed by the SEL
input.
3. The contents of the “Mux select register” are unchanged and the previous Mux connection is unchanged. The output (Mux port) data state will
depend on the present data state of the input (Demux port).
4. The contents of the “Mux select register” are unchanged and the last value latches hold the previous data state.
CONTROLLOGIC
1
2:1
D
Q
0
MUX
2:1
0
SEL
MUX
To Port B Switches
1
CLKEN
CLK
SYNC
OE
To Port A Switches
3
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Voltage
Test Conditions
Min. Typ.(1) Max.
Unit
VIH
Guaranteed Logic HIGH for Control Pins
2
—
—
0.01
7
—
0.8
±1
V
VIL
IIN
Input LOW Voltage
Guaranteed Logic LOW for Control Pins
0V ≤ VIN ≤ Vcc
—
—
—
—
60
V
µA
Ω
Input Leakage Current (Control Inputs)
Switch On Resistance (2)
RON
Vcc = Min., VIN = 0V, ION = 30mA
Vcc = Min., VIN = 2.4V, ION = 15mA
9
10
13
IBHL
IBHH
IBH
Input Hold Current (3,4)
(A or B port)
Input Current (5)
Vcc = Min.
Switch OFF
Vcc = Max.
VIN = 0.8V
—
—
—
—
—
µA
µA
VIN = 2V
—
60
–
VIN = 0V or Vcc
0.8 < VIN < 2V
—
±20
±500
A and B port
—
NOTES:
1. Typical values are at VCC = 5.0V, TA = 25°C.
2. RON guaranteed but not production tested.
3. IBHL is the minimum sustaining “sink” current at the input for VIN = 0.8V. This parameter signifies the latching capability of the bus-hold circuit in
logic LOW state.
4. IBHH is the minimum sustaining “source” current at the input for VIN = 2V. This parameter signifies the latching capability of the bus-hold circuit in
logic HIGH state.
5. IBH is the magnitude of the input current specified under two conditions:
a) Input voltage at GND or Vcc. This indicates the input current under steady-state condition.
b) Input voltage between 0.8V and 2V (TTL input threshold range). This indicates the maximum input current during transient condition. The
driver connected to the input must overcome this current requirement in order to switch the logic state of the bus-hold circuit.
TYPICAL ON RESISTANCE vs VIN AT VCC = 5V
16
14
RON
(ohms)
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VIN
(Volts)
4
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Max.
Unit
ICCQ
Quiescent Power Supply Current
VCC = Max., VIN = GND or Vcc, f = 0
3
µA
∆ICC
Power Supply Current per Control Input HIGH (2)
Dynamic Power Supply Current per MHz(3)
VCC = Max., VIN = 3.4V, f = 0
1.5
mA
ICCD
VCC = Max., A/B and Y pins open
0.25
mA/MHz
Control Input Toggling at 50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TLL driven input (VIN = 3.4V, control inputs only). A/B and Y pins do not contribute to ∆Icc
.
3. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The A/B
and Y inputs generate no significant AC or DC currents as they transition. This parameter is guaranteed but not production tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 5.0V ± 10%
Ω
CLOAD = 50pF, RLOAD = 500 unless otherwise noted.
Min.
Typ.
0.25
—
Max.
Symbol
tPLH
Parameter
Unit
Data Propagation Delays (1,2)
A/B to Y, Y to A/B
—
—
ns
tPHL
tSEC
Clock Enable to Clock Setup Time
Clock Enable to Clock Hold Time
Clock to A,B Switch Turn-On Delay (3)
Asynchronous Select to A,B Switch Turn-On Delay (3)
Clock Pulse Width (High)
—
—
3
0
ns
ns
ns
ns
ns
ns
ns
ns
tHEC
tCSO
tASO
tW
—
—
0.5
0.5
3
7
—
7
—
—
tSCS
tHCS
SEL to Clock Setup Time
—
—
—
3
SEL to Clock Hold Time
—
0
tPZL
tPZH
tPLZ
Asynchronous Enable to Switch Turn-On Delay (3)
—
1.5
5.2
4.8
Asynchronous Enable to Switch Turn-Off Delay (1,3)
—
1.5
ns
tPHZ
NOTES:
1. This parameter is guaranteed but not production tested.
2. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time
constant for the switch alone is of the order of 0.25ns for CL = 50pF. Since this time constant is much smaller than the rise and fall times of typical
driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch, when used in a system, is determined by the
driving circuit on the driving side of the switch and its interaction with the load on the driven side.
3. Minimums guaranteed but not production tested.
5
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
TIMING WAVEFORMS - SYNCHRONOUS MODE, DEMUX FUNCTION
SYNC
tSEC tHEC
CLKEN
CLK
SEL
tSCS tHCS
tSCS tHCS
OE
Port Y
DATA 0
DATA 2
DATA 1
tPLH, tPHL
tCSO
DATA
1
Port A
Port B
DATA 0
HOLD PREVIOUS DATA, DATA 1
tPLH, tPHL
INVALID DATA
tCSO
HOLD PREVIOUS DATA, DATA 2
INVALID DATA
DATA 1 DATA 2
6
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
TIMING WAVEFORMS - SYNCHRONOUS MODE, MUX FUNCTION
SYNC
SEC HEC
t
t
CLKEN
CLK
tSCS tHCS
SCS HCS
t
t
SEL0, SEL1
Port A
DATA1
DATA2
Port B
DATA3
DATA4
tCSO
CSO
t
tPLH,
PLH,
t
tPHL
PHL
t
DATA1
INVALID DATA
DATA2
DATA3
DATA4
Port Y
7
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
TIMING WAVEFORMS - ASYNCHRONOUS MODE, MUX FUNCTION
SYNC
SEL
OE
INVALID
DATA
Port A
DATA1
DATA2
tPLH, tPHL
tPLH, tPHL
Port B
Port Y
INVALID DATA
INVALID DATA
DATA3
tASO
tPZL, tPZH
tPLZ, tPHZ
DATA1
DATA2
DATA3
DATA3
8
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
ACTIVE TERMINATOR OR BUS-HOLD CIRCUIT
The Active Terminator circuit, also known as the bus-hold circuit, is configured as a “weak latch” with positive feedback. When connected to a
TTL or CMOS input port, the bus-hold circuit holds the last logic state at the input when the input is “disconnected” from the driver. When the output
of a device connected to such an input attempts a logic level transition, it will overdrive the bus-hold circuit. The primary benefit of a bus-hold circuit
is that it prevents CMOS inputs from floating, a situation which should be avoided to prevent spurious switching of inputs and unnecessary power
dissipation. Bus-hold is a better solution than the traditional approach of using resistive termination to Vcc or GND to prevent bus floating, because
the bus-hold circuit does not consume any static power.
V-ICHARACTERISTICSOFBUS-HOLDCIRCUIT
IBH
+500
Sinking
Current
( + )
Voltage
+20 IBH
IBHL
IBH
+60
+20
+60 IBHL
VT
– 20 IBH
– 20
– 60
Vcc
IBHH
– 60 IBHL
VIH
VIL
Sourcing
Current
( – )
IBH
– 500
0.8V
2V
VT ≡ Threshold Voltage ≈ 1.5V
VIL ≈ .8 VIH ≈ 2V
This figure shows the input V-I characteristics of a typical bus-hold implementation. The input characteristics resemble a resistor. As the input
voltage is increased from 0 volts, the input “sink” current increases linearly. When the TTL threshold of the circuit is reached (typically 1.5 volts), the
latch changes the logic state due to positive feedback and the direction of the current is reversed. As the input voltage is further increased towards
Vcc, the input “source” current begins to decrease, reaching the lowest level at VIN = Vcc.
9
IDTQS3ST257
HIGH-SPEEDCMOSSYNCHROSWITCHQUAD2:1MUX
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
XX
IDTQS
XXXXX
X
Package
Process
Device Type
Industrial (-40°C to +85°C)
Blank
Q
Quarter Size Small Outline Package (SO20-8)
High Speed CMOS SynchroSwitch Quad 2:1
Mux/Demux with Active Terminators
3ST257
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc.
10
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