IDTQS5805ATQ8 [IDT]

Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20;


型号：	IDTQS5805ATQ8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20 驱动光电二极管逻辑集成电路
文件：	总6页 (文件大小：94K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

QS5805T/AT/BT

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

GUARANTEED LOW SKEW

CMOS CLOCK

QS5805T/AT/BT

ADVANCE

DRIVER/BUFFER

INFORMATION

DESCRIPTION

FEATURES:

−

10 output, low skew signal buffer

Guaranteed low skew:

TheQS5805Tclockbuffer/drivercircuits canbeusedforclockbuffering

schemes wherelowskewis akeyparameter.This deviceoffers twobanks

offive non-invertingoutputs. This device provides lowpropagationdelay

bufferingwithon-chipskewof0.7nsforsame-transition,same-banksignals.

•

0.7ns output skew (same bank)

0.9ns output skew (different bank)

1ns part-to-part skew

The QS5805T is characterized for operation at -40°C to +85°C.

−

Input hysteresis for better noise margin

Monitor output

Undershoot clamp diodes on all inputs

Std., A, and B speed grades

Available in QSOP and SOIC packages

FUNCTIONALBLOCKDIAGRAM

OEA

INA

OA5

OA1

OB1

MON

OB5

INB

OEB

INDUSTRIAL TEMPERATURE RANGE

JULY 2000

1999 Integrated Device Technology, Inc.

DSC-5267

QS5805T/AT/BT

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

PINCONFIGURATION

Symbol

Description

Supply Voltage to Ground

DC Output Voltage VOUT

DC Input Voltage VIN

Max.

– 0.5 to +7

-3

Unit

(2)

VTERM

VCCB

OB1

OB2

OB3

GNDB

OB4

OB5

MON

OE^B

INB

VCCA

OA1

(3)

VTERM

VAC

AC Input Voltage (pulse width ≤20ns)

OA2

IOUT

DC Input Diode Current VIN < 0

DC Output Current Max. Sink Current/Pin

Storage Temperature

-20

°C

OA3

120

GNDA

OA4

SO20-2

SO20-8

TSTG

– 65 to +150

150

Junction Temperature

OA5

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

2. Vcc Terminals.

GNDQ

OEA

INA

QSOP/ SOIC

TOP VIEW

3. All terminals except Vcc.

CAPACITANCE _{(TA = +25 C, f = 1.0MHz, VIN = 0V)}

Pins

Typ.

Max. ⁽¹⁾

Unit

CIN

COUT

NOTE:

1. This parameter is guaranteed but not production tested.

PIN DESCRIPTION

Pin Names

I/O

Description

Output Enable Inputs

OEA, OEB

INA, INB

OAn, OBn

MON

Clock Inputs

Clock Outputs

Unbuffered Monitor Output

QS5805T/AT/BT

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Industrial: T^A= -40°C to +85°C, V^CC= 5.0V ± 10%

Symbol

Parameter

Input HIGH Voltage

Test Conditions

Min.

Typ.⁽¹⁾

Max.

Unit

VIH

Guaranteed Logic HIGH for All Inputs

—

VIL

Input LOW Voltage

Clamp Diode Voltage ⁽³⁾

Guaranteed Logic LOW for All Inputs

Vcc = Min., IIN = -18mA

—

2.4

—

–0.7

—

0.8

–1.2

—

VIC

VOH

Output HIGH Voltage

Vcc = Min., IOH = -24mA

Vcc = Min., IOH = -32mA

—

V_OL

IIN

Output LOW Voltage

Vcc = Min., I_OL= 64mA

—

0.55

±1

Input Leakage Current

Vcc = Max., VIN = Vcc or GND

Vcc = 0V, VIN or VOUT = Vcc or GND

Vcc = Max., VOUT = Vcc or GND

Vcc = Max., VOUT = GND

—

µA

IOFF

IOZ

Input/Output Power Off Leakage

—

±1

Output Leakage Current

—

±1

(2,3)

IOS

Short Circuit Current

—

–250

—

–

—

∆VT

Input Hysteresis

V_TLH- V_THLfor All Inputs

0.2

NOTES:

1. Typical values are at V^CC= 5.0V, T^A= 25°C.

2. Not more than one output should be used to test this high power condition. Duration is less than one second.

3. Guaranteed by design but not tested.

POWER SUPPLY CHARACTERISTICS

Symbol

Parameter

Test Conditions ⁽¹⁾

VCC = Max., VIN = GND or Vcc

_CC= Max., V = 3.4V, f = 0MHz

Typ. ⁽³⁾

Max.

Unit

ICC

Quiescent Power Supply Current

0.005

0.5

2.5

∆ICC

Supply Current per Input HIGH

ICCD

Dynamic Power Supply Current per Output ⁽²⁾VCC = Max., VIN = GND or Vcc

0.08

0.18

mA/MHz

Outputs Enabled, 50% duty cycle

Total Power Supply Current Examples ^(2,4)

VCC = Max.,

VIN = GND or Vcc

9.5

OEA = OEB = GND

50% duty cycle, f = 10MHz

V = GND or 3.4V

4.5

10.8

Five outputs toggling

Unused inputs = GND or Vcc

VCC = Max.,

OEA = OEB = GND

50% duty cycle, fI = 2.5MHz

All outputs toggling

VIN = GND or Vcc

VIN = GND or 3.4V

2.2

3.2

5.5

NOTES:

1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.

2. Guaranteed by design but not tested. C^L= 0pF.

3. Typical values are for reference only. Conditions are V^CC= 5.0V, T^A= 25°C.

4. I^C= I^CC+ (∆I^CC)(D^H)(N^T) + I^CCD(f^O)(N^O)

where:

D^H= Input Duty Cycle

N^T= Number of TTL HIGH inputs at D^H(one or two)

f^O= Output Frequency

N^O= Number of outputs at f^O

QS5805T/AT/BT

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

SKEW CHARACTERISTICS OVER OPERATING RANGE

T^A= -40°C to +85°C, V^CC= 5.0V ± 10%

C^LOAD= 50pF; R^LOAD= 500Ω

QS5805T

QS5805AT

QS5805BT

Min.

Max.

0.7

Min.

—

Max.

0.7

0.9

0.7

Min.

—

Max.

0.7

0.9

0.7

Symbol

Parameter ⁽¹⁾

Unit

tSK(01)

Skew between two outputs, same transition, same bank

—

tSK(02)

tSK(P)

Skew between two outputs, same transition, different banks

Pulse Skew; opposite transition skew, same output (tPHL - tPLH)

Part-to-part skew ⁽²⁾

0.9

—

0.7

—

tSK(T)

1.5

—

NOTES:

1. Skew parameters are guaranteed across temperature range, but not tested. Skew parameters apply to propagation delays only.

2. t^SK(T)only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grade.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

T^A= -40°C to +85°C, V^CC= 5.0V ± 10%

C^LOAD= 50pF; R^LOAD= 500Ω

QS52805T

Max.

QS52805AT

QS5805BT

Min.

Max.

Min.

Max.

Symbol

tPLH

Parameter ⁽¹⁾

Propagation Delay ⁽²⁾

Unit

1.5

6.5

1.5

5.8

1.5

tPHL

tPZL

Output Enable Time

Output Disable Time

1.5

tPZH

tPLZ

tPHZ

Output Rise Time, 0.8V to 2V ⁽³⁾

Output Fall Time, 2V to 0.8V ⁽³⁾

—

1.5

—

1.5

—

1.5

NOTES:

1. Minimums guaranteed but not production tested.

2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation

delays do not imply limit skew.

3. This parameter is guaranteed but not tested.

QS5805T/AT/BT

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

Parameter

Tested

Switch

Position

tPLZ, tPZL

All Others

Closed

Open

500Ω

V_CC

6.0 V

V_IN

V_OUT

Pulse

Generator

DUT

500Ω

50Ω

50pF

Pulse generator for all pulses: f ≤ 1.0MHz; t_F≤ 2.5ns; t_R≤ 2.5ns

PROPAGATIONDELAY

PULSE SKEW — tSK(P)

1.5V

INPUT

1.5V

tPLH

t_PHL

V_OH

t_PLH

VOH

1.5V

2.0V

1.5V

0.8V

V_OL

OUTPUT

V_OL

t_R

t_F

t_SK(p)

= t_PHL- t_PLH

OUTPUT SKEW (SAME BANK) — tSK(O1)

OUPUT SKEW (DIFFERENT BANKS) — tSK(O2)

1.5V

INPUT

tPHL1

t_PLH1

t_PHLA

t_PLHA

V_OH

OUTPUT 1

1.5V

V_OL

V_OH

OUTPUT A

1.5V

V_OL

V_OH

t_SK(01)

t_SK(02)

t_SK(01)

t_SK(02)

OUTPUT 2

OUTPUT B

1.5V

V_OL

1.5V

V_OL

t_PLHB

t_PLH2

= t_PLH2- t_PLH1or t_PHL2- t_PHL1

t_PHLB

t_PHL2

t_SK(01)

tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA

PART-TO-PART SKEW — tSK(T)

ENABLE AND DISABLE TIMES

ENABLE

DISABLE

CONTROL

INPUT

1.5V

INPUT

PART 1 OUTPUT

PART 2 OUTPUT

t_PLH1

tPHL1

tPZL

t_PLZ

V_OH

1.5V

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

1.5V

0.3V V_OL

V_OL

V_OH

t_PHZ

t_SK(t)

t_PZH

V_OH

0.3V

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

V_OL

t_PLH2

t_SK(t)

t_PHL2

t_PLH2- t_PLH1or t_PHL2- t_PHL1

QS5805T/AT/BT

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

XXXX

Package

Device Type

Quarter Size Small Outline Package (SO20-8)

Small Outline IC (SO20-2)

5805T

Guaranteed Low Skew CMOS Clock Driver/Buffer

5805AT

5805BT

CORPORATE HEADQUARTERS

2975StenderWay

Santa Clara, CA 95054

for SALES:

800-345-7015 or 408-727-6116

fax: 408-492-8674

www.idt.com*

*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.

The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc.

IDTQS5805ATQ8 [IDT]

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