QS32862Q [IDT]
Bus Transceiver, 32862 Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24;![QS32862Q](http://pdffile.icpdf.com/pdf2/p00263/img/icpdf/QS3862SO_1584424_icpdf.jpg)
型号: | QS32862Q |
厂家: | ![]() |
描述: | Bus Transceiver, 32862 Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24 驱动 光电二极管 逻辑集成电路 |
文件: | 总4页 (文件大小:64K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
QUICKSWITCH® PRODUCTS
HIGH-SPEED CMOS
10-BIT BUS SWITCH WITH
ACTIVE HIGH AND LOW ENABLES
QS3862
QS32862
ADVANCE
INFORMATION
FEATURES/BENEFITS
DESCRIPTION
• Enhanced N channel FET with no inherent diode to V
The QS3862 and QS32862 each provide a set of ten high speed
CMOS, TTL Compatible bus switches. The low ON resistance (5Ω) of
the QS3862 allows inputs to be connected to outputs without adding
propagation delay and without generating additional ground bounce
noise. The switches are controlled by independent active Low enable
(BE) and active High enable (BE) controls.
CC
• 5Ω bidirectional switches connect inputs to outputs
• Zero propagation delay, zero ground bounce
• Undershoot clamp diodes on all switch and control pins
• Available in 24-pin QSOP, and SOIC (SO) packages
• QS32862 is 25Ω version for low noise
• Active Low and High enable control
The QS32862 includes internal 25Ω series termination resistors to
reduce reflection noise in high speed applications. When closed, the
switch acts as the source (series) termination for the driver connected
to it.
The QS3862 is ideal for switching digital buses as well as hot-
plugging, hot-docking, and voltage translation.
APPLICATIONS
• Hot-swapping, hot-docking (Application Note AN-13) •
Voltage translation (5V to 3.3V; Application Note AN-11)
• Power conservation
• Capacitance reduction and isolation
• Applications requiring Active-High enabling
• Bus isolation
• Clock gating
FUNCTIONAL BLOCK DIAGRAM
A0
B0
A9
B9
BE
BE
OCTOBER 1999
1
1999 Integrated Device Technology, Inc
DSC-XXXXXX
QS3862 AND QS32862
IDT
PIN DESCRIPTION
PIN CONFIGURATION
(ALL PINS TOP VIEW)
Name
BE
I/O
I
Function
Active High Bus Enable
Active High Bus Enable
Bus A
QSOP, SOIC (SO)
BE
I
A0-A9
B0-B9
I/O
I/O
BE
1
2
24
23
22
21
20
19
18
17
16
15
14
13
VCC
BE
Bus B
A0
A1
B0
B1
3
A2
A3
4
B
2
5
A4
B3
6
FUNCTION TABLE
A5
B
B
4
5
7
BE
L
BE
L
A0-A9
Hi-Z
Function
Disconnect
Disconnect
Connect
A6
8
A7
B6
B7
B8
B9
9
A8
10
11
12
L
H
L
Hi-Z
A9
H
L
B0-B9
Hi-Z
GND
L
Disconnect
ABSOLUTE MAXIMUM RATINGS
Note: ABSOLUTE MAXIMUM CONTINUOUS
RATINGS are those values beyond which
damage to the device may occur. Exposure to
these conditions or conditions beyond those
indicated may adversely affect device reliability.
Supply Voltage to Ground ...................................................................... –0.5V to +7.0V
DC Switch Voltage V ............................................................................ –0.5V to +7.0V
S
DC Input Voltage V .............................................................................. –0.5V to +7.0V
IN
AC Input Voltage (for a pulse width ≤ 20ns) ..........................................................–3.0V Functional operation under absolute-maximum
conditions is not implied.
DC Output Current Max. Sink Current/Pin ...........................................................120mA
Maximum Power Dissipation ............................................................................0.5 watts
TSTG Storage Temperature .................................................................... –65° to +150°C
CAPACITANCE
TA = 25°C, f = 1MHz, V = 0V
IN
Note: Capacitance is characterized but not
QSOP, SOIC
production tested. For total capacitance while the
switch is ON, please see Section 1 under “Input
and Switch Capacitance.”
Pins
Control Inputs
Typ
3
Max
5
Unit
pF
QuickSwitch Channels
(Swithc OFF)
5
7
pF
2
1999 Integrated Device Technology, Inc
DSC-XXXXXX
IDT
QS3862 AND QS32862
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
TA = –40°C to 85°C, V = 5.0V ± 10%
CC
Symbol Parameter
Input HIGH Voltage
Test Conditions
Min
Typ(1)
Max
Unit
V
Guaranteed Logic HIGH
for Control Inputs
2.0
—
—
V
IH
V
Input LOW Voltage
Guaranteed Logic LOW
for Control Inputs
—
—
—
0.8
1
V
IL
| I |
Input Leakage Current
(Control Inputs)
0 ≤ V ≤ V
CC
0.01
µA
IN
IN
| IOZ
|
Off-State Current (Hi-Z)
Switch ON Resistance(2)
0 ≤ VOUT ≤ V , Switches Off
—
—
20
—
20
3.7
0.01
5
1
7
µA
CC
RON
V
CC = Min., V = 0.0V,
3862
32862
3862
Ω
IN
ION = 30mA
CC = Min., V = 2.4V
28
10
35
4
40
15
48
4.2
RON
Switch ON Resistance(2)
Pass Voltage(3)
V
Ω
IN
ION = 15mA
V = VCC = 5V, IOUT = –5µA
32862
V
V
P
IN
Notes:
1. Typical values indicate VCC = 5.0V and TA = 25°C.
2. For a diagram explaining the procedure for RON measurement, please see Section 1 under “DC Electrical Characteristics.”
Max. value of RON guaranteed, but not production tested.
3. Pass Voltage is guaranteed but not production tested.
TYPICAL ON RESISTANCE VS VIN AT VCC = 5.0V (QS3862)
16
14
12
10
R ON
8
(ohms)
6
4
2
0
1.5
2.0
2.5
3.0
3.5
1.0
0.0
0.5
V IN
(Volts)
Note: For QS32862, add 23Ω to RON shown.
3
1999 Integrated Device Technology, Inc
DSC-XXXXXX
QS3862 AND QS32862
IDT
POWER SUPPLY CHARACTERISTICS OVER OPERATING RANGE
TA = –40°C to 85°C, V = 5.0V ± 10%
CC
Symbol Parameter
Test Conditions(1)
Typ(2)
Max
Unit
ICCQ
∆ICC
QCCD
Quiescent Power
Supply Current
V = Max., V = GND or V , f = 0
0.2
3.0
µA
CC
IN
CC
(3)
Power Supply Current
per Input HIGH
V = Max., V = 3.4V , f = 0
—
—
2.5
mA
CC
IN
per Control Input
Dynamic Power Supply
Current per MHz(4)
V = Max., A and B Pins Open,
0.25
mA/
MHz
CC
BE, BE Inputs
Toggling @ 50% Duty Cycle
Notes:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC specifications.
2. Typical Values are at VCC = 5.0V, +25°C Ambient.
3. Per TTL driven input (V = 3.4V, control inputs only). A and B pins do not contribute to ∆ICC
.
IN
4. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The A and B
inputs generate no significant AC or DC currents as they transition. This parameter is guaranteed, but not production tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = –40°C to 85°C, V = 5.0V ± 10%
CC
CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
QS3862
Typ
QS32862
Typ
Symbol
Description(1)
Min
Max
Min
Max
Unit
(2,4)
tPLH
tPHL
tPZL
tPZH
tPLZ
tPHZ
Data Propagation Delay
A to B or B to A
—
—
—
—
0.25(3)
—
—
—
—
1.25(3)
ns
Switch Turn-on Delay
1.5
1.5
6.5
5.5
1.5
1.5
7.5
5.5
ns
ns
BE or BE to A or B
(2)
Switch Turn-off Delay
BE or BE to A or B
Notes:
1. See Test Circuit and Waveforms. Minimums guaranteed but not production tested.
2. This parameter is guaranteed, but not production tested.
3. The time constant for the switch alone is of the order of 0.25ns for QS3862 and 1.25ns for QS32862 at CL = 50pF.The bus switch contributes no propagation
delay other than the RC delay of the ON resistance of the switch and the load capacitance. Since this time constant is much smaller than the rise/fall times of
typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined by the
driving circuit on the driving side of the switch and its interaction with the load on the driven side.
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1999 Integrated Device Technology, Inc
DSC-XXXXXX
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