STAC9200D5NAEYYR [IDT]
PCM Codec, 1-Func, 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-5, QFN-32;型号: | STAC9200D5NAEYYR |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | PCM Codec, 1-Func, 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-5, QFN-32 PC 电信 电信集成电路 |
文件: | 总126页 (文件大小:1559K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
2-CHANNEL HIGH DEFINITION AUDIO CODEC
STAC9200/9200D
•
•
Integrated Headphone Amplifiers
Stereo Microphone
Description
The STAC9200/9200D is a high quality, 2-channel audio
CODEC compatible with the Intel High Definition (HD)
Audio Interface. The STAC9200/9200D provides Stereo
24-Bit resolution with sample rates up to 192 KHz. SPDIF
I/O provides connectivity to consumer electronic
equipment. The STAC9200/9200D incorporates IDT's
proprietary SD technology to achieve an estimated DAC
SNR in excess of 100dB.
•
•
Supports Stereo Microphone
Microphone Boost 0, 10, 20, 30, 40dB
•
•
•
•
•
•
Direct CDROM Recording Mixerless Design
S/PDIF In and Out
TM
Universal Jacks Functionality for jack retasking
Adjustable VREF Out
The STAC9200/9200D provides high quality, HD Audio
capability to notebook and cost sensitive desktop PC
applications.
Digital PC Beep to all outputs
+3.3 V, +4 V and +5 V analog power supply options
(The +4 V Analog voltage is supported by the +5 V version of
the STAC9200 or STAC9200D. Request +4 V configuration of
the driver.)
Features
•
•
•
•
High performance SD technology
100dB DAC SNR
•
•
32-pad QFN (5mm x 5mm) and 48-pin LQFP
package options
Intel HD Audio Interface
Dolby Sound Room Compliant (STAC9200D only)
(System manufacturers must obtain system license from
Dolby.)
Two Channel DACs and ADCs with 24-bit
resolution
•
Dolby Home Theater Compliant (STAC9200D only)
(System manufacturers must obtain system license from
Dolby.)
•
•
Sample rates up to 192 KHz
Mixer-less design
•
Low-latency Karaoke Mode Supported
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
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STAC9200/9200D
V 1.4 12/06
IDT CONFIDENTIAL
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table of Contents
1. DESCRIPTION ...........................................................................................................................9
2. PERFORMANCE .....................................................................................................................10
2.1. Audio Fidelity ................................................................................................................................... 10
2.2. Electrical Specifications ................................................................................................................... 10
2.2.1. Absolute Maximum Ratings ............................................................................................... 10
2.2.2. Recommended Operation Conditions ............................................................................... 10
2.3. Power Consumption ........................................................................................................................ 11
2.3.1. Digital ................................................................................................................................. 11
2.3.2. Analog ............................................................................................................................... 11
2.4. STAC9200/9200D 5V Analog Performance Characteristics ........................................................... 12
2.5. STAC9200/9200D 4V Analog Performance Characteristics ........................................................... 14
2.6. STAC9200/9200D 3.3V Analog Performance Characteristics ........................................................ 16
3. EXTENDED FEATURE EXPLANATION .................................................................................18
3.1. SPDIF Input ..................................................................................................................................... 18
3.2. SPDIF Output .................................................................................................................................. 18
3.3. Universal JacksTM .......................................................................................................................... 18
3.4. Audio Jack Presence Detect ........................................................................................................... 18
4. BLOCK DIAGRAMS AND TYPICAL HOOKUPS ....................................................................19
4.1. Functional Block Diagram ................................................................................................................ 19
4.2. STAC9200/9200D Typical Connection Diagram for 48-pin LQFP ................................................... 20
4.3. STAC9200/9200D Split Independent Power Supply for 48-pin LQFP ............................................. 20
4.4. STAC9200/9200D Typical Connection Diagram for 32-pad QFN ................................................... 20
4.5. STAC9200/9200D Split Independent Power Supply for 32-pad QFN ............................................. 20
5. WIDGET INFORMATION .........................................................................................................21
5.1. Widget Diagram ............................................................................................................................... 21
5.2. STAC9200/9200D Widget List ........................................................................................................ 22
5.3. Root Node (NID = 0x00) .................................................................................................................. 23
5.3.1. Root PnpID ....................................................................................................................... 23
5.3.2. Root RevID ..................................................................................................................... 23
5.3.3. Root NodeInfo .................................................................................................................. 24
5.4. AFG Node (NID = 0x01) .................................................................................................................. 24
5.4.1. AFG Reset ........................................................................................................................ 24
5.4.2. AFG NodeInfo ................................................................................................................... 25
5.4.3. AFG Type ......................................................................................................................... 25
5.4.4. AFG GrpCap ..................................................................................................................... 25
5.4.5. AFG FrmtCap ................................................................................................................... 26
5.4.6. AFG StreamCap ............................................................................................................... 27
5.4.7. AFG PwrCap .................................................................................................................... 28
5.4.8. AFG GPIOCap .................................................................................................................. 28
5.4.9. AFG OutAmpCap ............................................................................................................. 29
5.4.10. AFG PwrState ................................................................................................................. 30
5.4.11. AFG UnsolResp .............................................................................................................. 30
5.4.12. AFG GPIO ...................................................................................................................... 31
5.4.13. AFG GPIOEn .................................................................................................................. 32
5.4.14. AFG GPIODir .................................................................................................................. 33
5.4.15. AFG GPIOWake ............................................................................................................. 33
5.4.16. AFG GPIOUnsolEn ......................................................................................................... 34
5.4.17. AFG GPIOSticky ............................................................................................................. 35
5.4.18. AFG SysID ...................................................................................................................... 36
5.5. DAC0Cnvtr Node (NID = 0x02) ....................................................................................................... 37
5.5.1. DAC0Cnvtr Frmt ............................................................................................................... 37
5.5.2. DAC0Cnvtr WCap ............................................................................................................ 38
5.5.3. DAC0Cnvtr PwrState ......................................................................................................... 39
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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
5.5.4. DAC0Cnvtr Stream ........................................................................................................... 40
5.6. ADC0Cnvtr Node (NID = 0x03) ...................................................................................................... 40
5.6.1. ADC0Cnvtr Frmt ............................................................................................................... 40
5.6.2. ADC0Cnvtr WCap ............................................................................................................ 41
5.6.3. ADC0Cnvtr ConnLen ........................................................................................................ 42
5.6.4. ADC0Cnvtr ConnLst ......................................................................................................... 43
5.6.5. ADC0Cnvtr ProcState ....................................................................................................... 43
5.6.6. ADC0Cnvtr PwrState ........................................................................................................ 44
5.6.7. ADC0Cnvtr Stream ........................................................................................................... 45
5.7. SPDIFinCnvtr Node (NID = 0x04) ................................................................................................... 45
5.7.1. SPDIFinCnvtr Frmt ........................................................................................................... 45
5.7.2. SPDIFinCnvtr WCap ......................................................................................................... 46
5.7.3. SPDIFinCnvtr FrmtCap ..................................................................................................... 47
5.7.4. SPDIFinCnvtr StreamCap ................................................................................................ 48
5.7.5. SPDIFinCnvtr ConnLen .................................................................................................... 49
5.7.6. SPDIFinCnvtr ConnLst ..................................................................................................... 49
5.7.7. SPDIFinCnvtr Stream ....................................................................................................... 50
5.7.8. SPDIFinCnvtr DigCtl ......................................................................................................... 50
5.8. SPDIFoutCnvtr Node (NID = 0x05) ................................................................................................. 51
5.8.1. SPDIFoutCnvtr Frmt ......................................................................................................... 51
5.8.2. SPDIFoutCnvtr WCap ...................................................................................................... 52
5.8.3. SPDIFoutCnvtr FrmtCap .................................................................................................. 53
5.8.4. SPDIFoutCnvtr StreamCap .............................................................................................. 54
5.8.5. SPDIFoutCnvtr Stream ..................................................................................................... 55
5.8.6. SPDIFoutCnvtr DigCtl ....................................................................................................... 55
5.9. DAC0Mux Node (NID = 0x07) ........................................................................................................ 56
5.9.1. DAC0Mux WCap .............................................................................................................. 56
5.9.2. DAC0Mux ConnLen .......................................................................................................... 57
5.9.3. DAC0Mux ConnSel .......................................................................................................... 58
5.9.4. DAC0Mux ConnLst ........................................................................................................... 58
5.9.5. DAC0Mux LR .................................................................................................................... 58
5.10. DigInPin Node (NID = 0x08) .......................................................................................................... 59
5.10.1. DigInPin WCap ............................................................................................................... 59
5.10.2. DigInPin Cap .................................................................................................................. 60
5.10.3. DigInPin PwrState .......................................................................................................... 61
5.10.4. DigInPin Ctl ...................................................................................................................... 61
5.10.5. DigInPin UnsolResp ....................................................................................................... 62
5.10.6. DigInPin Sense ............................................................................................................... 62
5.10.7. DigInPin EAPD ............................................................................................................... 63
5.10.8. DigInPin Config ............................................................................................................... 63
5.11. DigOutPin Node (NID = 0x09) ....................................................................................................... 64
5.11.1. DigOutPin WCap ............................................................................................................ 64
5.11.2. DigOutPin Cap ................................................................................................................ 65
5.11.3. DigOutPin ConnLen ........................................................................................................ 66
5.11.4. DigOutPin ConnSel ........................................................................................................ 67
5.11.5. DigOutPin ConnLst ......................................................................................................... 67
5.11.6. DigOutPin Ctl .................................................................................................................. 67
5.11.7. DigOutPin Config ............................................................................................................ 68
5.12. ADC0Mux Node (NID = 0x0A) ....................................................................................................... 69
5.12.1. ADC0Mux VolRight ......................................................................................................... 69
5.12.2. ADC0Mux VolLeft ........................................................................................................... 69
5.12.3. ADC0Mux WCap ............................................................................................................ 70
5.12.4. ADC0Mux OutAmpCap .................................................................................................. 71
5.12.5. ADC0Mux ConnLen ........................................................................................................ 71
5.12.6. ADC0Mux ConnLst ......................................................................................................... 72
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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
5.12.7. ADC0Mux LR .................................................................................................................. 72
5.13. MasterVol Node (NID = 0x0B) ....................................................................................................... 73
5.13.1. MasterVol Right .............................................................................................................. 73
5.13.2. MasterVol Left ................................................................................................................ 73
5.13.3. MasterVol WCap ............................................................................................................ 74
5.13.4. MasterVol ConnLen ........................................................................................................ 75
5.13.5. MasterVol ConnLst ......................................................................................................... 75
5.14. InPortMux Node (NID = 0x0C) ...................................................................................................... 76
5.14.1. InPortMux VolRight ......................................................................................................... 76
5.14.2. InPortMux VolLeft ........................................................................................................... 76
5.14.3. InPortMux WCap ............................................................................................................ 77
5.14.4. InPortMux ConnLen ........................................................................................................ 78
5.14.5. InPortMux AmpCap ........................................................................................................ 78
5.14.6. InPortMux ConnSel ........................................................................................................ 79
5.14.7. InPortMux ConnLst0 ....................................................................................................... 79
5.14.8. InPortMux ConnLst4 ....................................................................................................... 79
5.15. PortAPin Node (NID = 0x0D) ......................................................................................................... 80
5.15.1. PortAPin WCap .............................................................................................................. 80
5.15.2. PortAPin Cap .................................................................................................................. 81
5.15.3. PortAPin ConnLen .......................................................................................................... 82
5.15.4. PortAPin ConnLst ........................................................................................................... 82
5.15.5. PortAPin Ctl .................................................................................................................... 82
5.15.6. PortAPin UnsolResp ....................................................................................................... 83
5.15.7. PortAPin Sense .............................................................................................................. 84
5.15.8. PortAPin Config .............................................................................................................. 84
5.16. PortDPin Node (NID = 0x0E) ......................................................................................................... 85
5.16.1. PortDPin WCap .............................................................................................................. 85
5.16.2. PortDPin Cap .................................................................................................................. 86
5.16.3. PortDPin ConnLen .......................................................................................................... 87
5.16.4. PortDPin ConnLst ........................................................................................................... 87
5.16.5. PortDPin Ctl .................................................................................................................... 88
5.16.6. PortDPin UnsolResp ....................................................................................................... 88
5.16.7. PortDPin Sense .............................................................................................................. 89
5.16.8. PortDPin Config .............................................................................................................. 90
5.17. PortCPin Node (NID = 0x0F) ......................................................................................................... 90
5.17.1. PortCPin WCap .............................................................................................................. 90
5.17.2. PortCPin Cap .................................................................................................................. 91
5.17.3. PortCPin ConnLen .......................................................................................................... 92
5.17.4. PortCPin ConnLst ........................................................................................................... 93
5.17.5. PortCPin Ctl .................................................................................................................... 93
5.17.6. PortCPin UnsolResp ....................................................................................................... 94
5.17.7. PortCPin Sense .............................................................................................................. 94
5.17.8. PortCPin Config .............................................................................................................. 95
5.18. PortBPin Node (NID = 0x10) ......................................................................................................... 96
5.18.1. PortBPin WCap .............................................................................................................. 96
5.18.2. PortBPin Cap .................................................................................................................. 97
5.18.3. PortBPin ConnLen .......................................................................................................... 98
5.18.4. PortBPin ConnLst ........................................................................................................... 98
5.18.5. PortBPin Ctl .................................................................................................................... 98
5.18.6. PortBPin UnsolResp ....................................................................................................... 99
5.18.7. PortBPin Sense ............................................................................................................ 100
5.18.8. PortBPin Config ............................................................................................................ 100
5.19. MonoOutPin Node (NID = 0x11) ................................................................................................. 101
5.19.1. MonoOutPin Vol ........................................................................................................... 101
5.19.2. MonoOutPin WCap ....................................................................................................... 102
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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
5.19.3. MonoOutPin Cap .......................................................................................................... 103
5.19.4. MonoOutPin ConnLen .................................................................................................. 103
5.19.5. MonoOutPin ConnLst ................................................................................................... 104
5.19.6. MonoOutPin Ctl ............................................................................................................ 104
5.19.7. MonoOutPin Config ...................................................................................................... 105
5.20. CDPin Node (NID = 0x12) ........................................................................................................... 106
5.20.1. CDPin WCap ................................................................................................................ 106
5.20.2. CDPin Cap .................................................................................................................... 107
5.20.3. CDPin Ctl ...................................................................................................................... 108
5.20.4. CDPin Config ................................................................................................................ 108
5.21. MonoOutMix Node (NID = 0x13) ................................................................................................. 109
5.21.1. MonoOutMix WCap ...................................................................................................... 109
5.21.2. MonoOutMix ConnLen .................................................................................................. 110
5.21.3. MonoOutMix ConnLst ...................................................................................................110
5.22. PCBeep Node (NID = 0x14) ........................................................................................................ 111
5.22.1. PCBeep Vol .................................................................................................................. 111
5.22.2. PCBeep WCap ............................................................................................................. 111
5.22.3. PCBeep OutAmpCap ................................................................................................... 112
5.22.4. PCBeep Gen ................................................................................................................ 113
6. ORDERING INFORMATION ..................................................................................................114
6.1. STAC9200 Family Options and Part Order Numbers .................................................................... 114
7. PIN INFORMATION ...............................................................................................................115
7.1. Pin Out .......................................................................................................................................... 115
7.2. Pin Table for 48-pin LQFP and 32-pad QFN Packages ............................................................... 116
8. PACKAGE DRAWINGS .........................................................................................................118
8.1. 32-pin QFN .................................................................................................................................... 118
8.2. 48-Pin LQFP .................................................................................................................................. 119
9. SOLDER REFLOW PROFILE ...............................................................................................120
9.1. Standard Reflow Profile Data ........................................................................................................ 120
9.2. Pb Free Process - Package Classification Reflow Temperatures ................................................. 121
10. REVISION HISTORY ...........................................................................................................122
List of Figures
Figure 1. Functional Block Diagram ............................................................................................................... 21
Figure 2. Widget Diagram .............................................................................................................................. 23
Figure 3. 32-Pad QFN Package Outline and Package Dimensions ............................................................ 120
Figure 4. 48-Pin LQFP Package Outline and Package Dimensions ........................................................... 121
Figure 5. Solder Reflow Profile ................................................................................................................... 122
List of Tables
Table 1. Digital Power Consumption ............................................................................................................. 13
Table 2. Analog Power Consumption ............................................................................................................ 13
Table 3. High Definition Audio Widget ........................................................................................................... 24
Table 4. Root PnpID Command Verb Format ................................................................................................ 25
Table 5. Root PnpID Command Response Format ....................................................................................... 25
Table 6. Root RevID Command Verb Format ................................................................................................ 25
Table 7. Root RevID Command Response Format ....................................................................................... 25
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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 8. Root NodeInfo Command Verb Format ........................................................................................... 26
Table 9. Root NodeInfo Command Response Format .................................................................................. 26
Table 10. AFG Reset Command Verb Format .............................................................................................. 26
Table 11. AFG Reset Command Response Format ...................................................................................... 26
Table 12. AFG NodeInfo Command Verb Format ......................................................................................... 27
Table 13. AFG NodeInfo Command Response Format ................................................................................. 27
Table 14. AFG Type Command Verb Format ................................................................................................ 27
Table 15. AFG Type Command Response Format ....................................................................................... 27
Table 16. AFG GrpCap Command Verb Format ........................................................................................... 27
Table 17. AFG GrpCap Command Response Format ................................................................................... 28
Table 18. AFG FrmtCap Command Verb Format .......................................................................................... 28
Table 19. AFG FrmtCap Command Response Format ................................................................................. 28
Table 20. AFG StreamCap Command Verb Format ...................................................................................... 29
Table 21. AFG StreamCap Command Response Format ............................................................................. 29
Table 22. AFG PwrCap Command Verb Format ........................................................................................... 30
Table 23. AFG PwrCap Command Response Format .................................................................................. 30
Table 24. AFG GPIOCap Command Verb Format ........................................................................................ 30
Table 25. AFG GPIOCap Command Response Format ................................................................................ 31
Table 26. AFG OutAmpCap Command Verb Format .................................................................................... 31
Table 27. AFG OutAmpCap Command Response Format ........................................................................... 31
Table 28. AFG PwrState Command Verb Format ......................................................................................... 32
Table 29. AFG PwrState Command Response Format ................................................................................. 32
Table 30. AFG UnsolResp Command Verb Format ...................................................................................... 32
Table 31. AFG UnsolResp Command Response Format .............................................................................. 33
Table 32. AFG GPIO Command Verb Format ............................................................................................... 33
Table 33. AFG GPIO Command Response Format ...................................................................................... 33
Table 34. AFG GPIOEn Command Verb Format .......................................................................................... 34
Table 35. AFG GPIOEn Command Response Format .................................................................................. 34
Table 36. AFG GPIODir Command Verb Format .......................................................................................... 35
Table 37. AFG GPIODir Command Response Format .................................................................................. 35
Table 38. AFG GPIOWake Command Verb Format ...................................................................................... 35
Table 39. AFG GPIOWake Command Response Format ............................................................................. 36
Table 40. AFG GPIOUnsolEn Command Verb Format ................................................................................. 36
Table 41. AFG GPIOUnsolEn Command Response Format ......................................................................... 36
Table 42. AFG GPIOSticky Command Verb Format ..................................................................................... 37
Table 43. AFG GPIOSticky Command Response Format ............................................................................. 37
Table 44. AFG SysID Command Verb Format .............................................................................................. 38
Table 45. AFG SysID Command Response Format ...................................................................................... 38
Table 46. DAC0Cnvtr Frmt Command Verb Format ...................................................................................... 39
Table 47. DAC0Cnvtr Frmt Command Response Format ............................................................................. 39
Table 48. DAC0Cnvtr WCap Command Verb Format ................................................................................... 40
Table 49. DAC0Cnvtr WCap Command Response Format .......................................................................... 40
Table 50. DAC0Cnvtr PwrState Command Verb Format .............................................................................. 41
Table 51. DAC0Cnvtr PwrState Command Response Format ...................................................................... 41
Table 52. DAC0Cnvtr Stream Command Verb Format ................................................................................. 42
Table 53. DAC0Cnvtr Stream Command Response Format ......................................................................... 42
Table 54. ADC0Cnvtr Frmt Command Verb Format ...................................................................................... 42
Table 55. ADC0Cnvtr Frmt Command Response Format ............................................................................. 42
Table 56. ADC0Cnvtr WCap Command Verb Format ................................................................................... 43
Table 57. ADC0Cnvtr WCap Command Response Format .......................................................................... 44
Table 58. ADC0Cnvtr ConnLen Command Verb Format .............................................................................. 44
Table 59. ADC0Cnvtr ConnLen Command Response Format ...................................................................... 45
Table 60. ADC0Cnvtr ConnLst Command Verb Format ................................................................................ 45
Table 61. ADC0Cnvtr ConnLst Command Response Format ....................................................................... 45
Table 62. ADC0Cnvtr ProcState Command Verb Format ............................................................................. 45
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 63. ADC0Cnvtr ProcState Command Response Format ..................................................................... 46
Table 64. ADC0Cnvtr PwrState Command Verb Format .............................................................................. 46
Table 65. ADC0Cnvtr PwrState Command Response Format ...................................................................... 46
Table 66. ADC0Cnvtr Stream Command Verb Format ................................................................................. 47
Table 67. ADC0Cnvtr Stream Command Response Format ......................................................................... 47
Table 68. SPDIFinCnvtr Frmt Command Verb Format .................................................................................. 47
Table 69. SPDIFinCnvtr Frmt Command Response Format ......................................................................... 47
Table 70. SPDIFinCnvtr WCap Command Verb Format ............................................................................... 48
Table 71. SPDIFinCnvtr WCap Command Response Format ....................................................................... 48
Table 72. SPDIFinCnvtr FrmtCap Command Verb Format ........................................................................... 49
Table 73. SPDIFinCnvtr FrmtCap Command Response Format ................................................................... 49
Table 74. SPDIFinCnvtr StreamCap Command Verb Format ....................................................................... 50
Table 75. SPDIFinCnvtr StreamCap Command Response Format .............................................................. 51
Table 76. SPDIFinCnvtr ConnLen Command Verb Format ........................................................................... 51
Table 77. SPDIFinCnvtr ConnLen Command Response Format .................................................................. 51
Table 78. SPDIFinCnvtr ConnLst Command Verb Format ............................................................................ 51
Table 79. SPDIFinCnvtr ConnLst Command Response Format ................................................................... 51
Table 80. SPDIFinCnvtr Stream Command Verb Format .............................................................................. 52
Table 81. SPDIFinCnvtr Stream Command Response Format ..................................................................... 52
Table 82. SPDIFinCnvtr DigCtl Command Verb Format ............................................................................... 52
Table 83. SPDIFinCnvtr DigCtl Command Response Format ....................................................................... 52
Table 84. SPDIFoutCnvtr Frmt Command Verb Format ................................................................................ 53
Table 85. SPDIFoutCnvtr Frmt Command Response Format ....................................................................... 53
Table 86. SPDIFoutCnvtr WCap Command Verb Format ............................................................................. 54
Table 87. SPDIFoutCnvtr WCap Command Response Format .................................................................... 55
Table 88. SPDIFoutCnvtr FrmtCap Command Verb Format ......................................................................... 55
Table 89. SPDIFoutCnvtr FrmtCap Command Response Format ................................................................ 56
Table 90. SPDIFoutCnvtr StreamCap Command Verb Format ..................................................................... 56
Table 91. SPDIFoutCnvtr StreamCap Command Response Format ............................................................ 57
Table 92. SPDIFoutCnvtr Stream Command Verb Format ........................................................................... 57
Table 93. SPDIFoutCnvtr Stream Command Response Format ................................................................... 57
Table 94. SPDIFoutCnvtr DigCtl Command Verb Format ............................................................................. 57
Table 95. SPDIFoutCnvtr DigCtl Command Response Format ..................................................................... 58
Table 96. DAC0Mux WCap Command Verb Format ..................................................................................... 58
Table 97. DAC0Mux WCap Command Response Format ............................................................................ 58
Table 98. DAC0Mux ConnLen Command Verb Format ................................................................................ 59
Table 99. DAC0Mux ConnLen Command Response Format ........................................................................ 59
Table 100. DAC0Mux ConnSel Command Verb Format ............................................................................... 60
Table 101. DAC0Mux ConnSel Command Response Format ...................................................................... 60
Table 102. DAC0Mux ConnLst Command Verb Format ............................................................................... 60
Table 103. DAC0Mux ConnLst Command Response Format ....................................................................... 60
Table 104. DAC0Mux LR Command Verb Format ........................................................................................ 60
Table 105. DAC0Mux LR Command Response Format ................................................................................ 61
Table 106. DigInPin WCap Command Verb Format ...................................................................................... 61
Table 107. DigInPin WCap Command Response Format ............................................................................. 61
Table 108. DigInPin Cap Command Verb Format ......................................................................................... 62
Table 109. DigInPin Cap Command Response Format ................................................................................ 62
Table 110. DigInPin PwrState Command Verb Format ................................................................................. 63
Table 111. DigInPin PwrState Command Response Format ........................................................................ 63
Table 112. DigInPin Ctl Command Verb Format ........................................................................................... 63
Table 113. DigInPin Ctl Command Response Format ................................................................................... 63
Table 114. DigInPin UnsolResp Command Verb Format .............................................................................. 64
Table 115. DigInPin UnsolResp Command Response Format ..................................................................... 64
Table 116. DigInPin Sense Command Verb Format ..................................................................................... 64
Table 117. DigInPin Sense Command Response Format ............................................................................. 65
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PC AUDIO
Table 118. DigInPin EAPD Command Verb Format ...................................................................................... 65
Table 119. DigInPin EAPD Command Response Format ............................................................................. 65
Table 120. DigInPin Config Command Verb Format ..................................................................................... 65
Table 121. DigInPin Config Command Response Format ............................................................................. 66
Table 122. DigOutPin WCap Command Verb Format ................................................................................... 66
Table 123. DigOutPin WCap Command Response Format .......................................................................... 67
Table 124. DigOutPin Cap Command Verb Format ...................................................................................... 67
Table 125. DigOutPin Cap Command Response Format .............................................................................. 68
Table 126. DigOutPin ConnLen Command Verb Format .............................................................................. 68
Table 127. DigOutPin ConnLen Command Response Format ...................................................................... 68
Table 128. DigOutPin ConnSel Command Verb Format ............................................................................... 69
Table 129. DigOutPin ConnSel Command Response Format ...................................................................... 69
Table 130. DigOutPin ConnLst Command Verb Format ............................................................................... 69
Table 131. DigOutPin ConnLst Command Response Format ....................................................................... 69
Table 132. DigOutPin Ctl Command Verb Format ........................................................................................ 69
Table 133. DigOutPin Ctl Command Response Format ................................................................................ 70
Table 134. DigOutPin Config Command Verb Format .................................................................................. 70
Table 135. DigOutPin Config Command Response Format .......................................................................... 70
Table 136. ADC0Mux VolRight Command Verb Format ............................................................................... 71
Table 137. ADC0Mux VolRight Command Response Format ....................................................................... 71
Table 138. ADC0Mux VolLeft Command Verb Format .................................................................................. 71
Table 139. ADC0Mux VolLeft Command Response Format ......................................................................... 72
Table 140. ADC0Mux WCap Command Verb Format ................................................................................... 72
Table 141. ADC0Mux WCap Command Response Format .......................................................................... 72
Table 142. ADC0Mux OutAmpCap Command Verb Format ......................................................................... 73
Table 143. ADC0Mux OutAmpCap Command Response Format ................................................................ 73
Table 144. ADC0Mux ConnLen Command Verb Format .............................................................................. 73
Table 145. ADC0Mux ConnLen Command Response Format ...................................................................... 74
Table 146. ADC0Mux ConnLst Command Verb Format ............................................................................... 74
Table 147. ADC0Mux ConnLst Command Response Format ....................................................................... 74
Table 148. ADC0Mux LR Command Verb Format ........................................................................................ 74
Table 149. ADC0Mux LR Command Response Format ................................................................................ 74
Table 150. MasterVol Right Command Verb Format ..................................................................................... 75
Table 151. MasterVol Right Command Response Format ............................................................................ 75
Table 152. MasterVol Left Command Verb Format ....................................................................................... 75
Table 153. MasterVol Left Command Response Format .............................................................................. 76
Table 154. MasterVol WCap Command Verb Format ................................................................................... 76
Table 155. MasterVol WCap Command Response Format .......................................................................... 76
Table 156. MasterVol ConnLen Command Verb Format .............................................................................. 77
Table 157. MasterVol ConnLen Command Response Format ...................................................................... 77
Table 158. MasterVol ConnLst Command Verb Format ................................................................................ 77
Table 159. MasterVol ConnLst Command Response Format ....................................................................... 77
Table 160. InPortMux VolRight Command Verb Format ............................................................................... 78
Table 161. InPortMux VolRight Command Response Format ....................................................................... 78
Table 162. InPortMux VolLeft Command Verb Format .................................................................................. 78
Table 163. InPortMux VolLeft Command Response Format ......................................................................... 78
Table 164. InPortMux WCap Command Verb Format ................................................................................... 79
Table 165. InPortMux WCap Command Response Format .......................................................................... 79
Table 166. InPortMux ConnLen Command Verb Format .............................................................................. 80
Table 167. InPortMux ConnLen Command Response Format ...................................................................... 80
Table 168. InPortMux AmpCap Command Verb Format ............................................................................... 80
Table 169. InPortMux AmpCap Command Response Format ...................................................................... 80
Table 170. InPortMux ConnSel Command Verb Format ............................................................................... 81
Table 171. InPortMux ConnSel Command Response Format ...................................................................... 81
Table 172. InPortMux ConnLst0 Command Verb Format ............................................................................. 81
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
8
STAC9200/9200D
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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 173. InPortMux ConnLst0 Command Response Format ..................................................................... 81
Table 174. InPortMux ConnLst4 Command Verb Format ............................................................................. 81
Table 175. InPortMux ConnLst4 Command Response Format ..................................................................... 82
Table 176. PortAPin WCap Command Verb Format ..................................................................................... 82
Table 177. PortAPin WCap Command Response Format ............................................................................ 82
Table 178. PortAPin Cap Command Verb Format ........................................................................................ 83
Table 179. PortAPin Cap Command Response Format ................................................................................ 83
Table 180. PortAPin ConnLen Command Verb Format ................................................................................ 84
Table 181. PortAPin ConnLen Command Response Format ........................................................................ 84
Table 182. PortAPin ConnLst Command Verb Format .................................................................................. 84
Table 183. PortAPin ConnLst Command Response Format ......................................................................... 84
Table 184. PortAPin Ctl Command Verb Format ........................................................................................... 84
Table 185. PortAPin Ctl Command Response Format .................................................................................. 85
Table 186. PortAPin UnsolResp Command Verb Format ............................................................................. 85
Table 187. PortAPin UnsolResp Command Response Format ..................................................................... 85
Table 188. PortAPin Sense Command Verb Format ..................................................................................... 86
Table 189. PortAPin Sense Command Response Format ............................................................................ 86
Table 190. PortAPin Config Command Verb Format ..................................................................................... 86
Table 191. PortAPin Config Command Response Format ............................................................................ 87
Table 192. PortDPin WCap Command Verb Format ..................................................................................... 87
Table 193. PortDPin WCap Command Response Format ............................................................................ 87
Table 194. PortDPin Cap Command Verb Format ........................................................................................ 88
Table 195. PortDPin Cap Command Response Format ................................................................................ 88
Table 196. PortDPin ConnLen Command Verb Format ................................................................................ 89
Table 197. PortDPin ConnLen Command Response Format ........................................................................ 89
Table 198. PortDPin ConnLst Command Verb Format ................................................................................. 89
Table 199. PortDPin ConnLst Command Response Format ......................................................................... 90
Table 200. PortDPin Ctl Command Verb Format .......................................................................................... 90
Table 201. PortDPin Ctl Command Response Format .................................................................................. 90
Table 202. PortDPin UnsolResp Command Verb Format ............................................................................. 90
Table 203. PortDPin UnsolResp Command Response Format ..................................................................... 91
Table 204. PortDPin Sense Command Verb Format ..................................................................................... 91
Table 205. PortDPin Sense Command Response Format ............................................................................ 91
Table 206. PortDPin Config Command Verb Format .................................................................................... 92
Table 207. PortDPin Config Command Response Format ............................................................................ 92
Table 208. PortCPin WCap Command Verb Format ..................................................................................... 92
Table 209. PortCPin WCap Command Response Format ............................................................................ 93
Table 210. PortCPin Cap Command Verb Format ........................................................................................ 93
Table 211. PortCPin Cap Command Response Format ................................................................................ 94
Table 212. PortCPin ConnLen Command Verb Format ................................................................................ 94
Table 213. PortCPin ConnLen Command Response Format ........................................................................ 94
Table 214. PortCPin ConnLst Command Verb Format ................................................................................. 95
Table 215. PortCPin ConnLst Command Response Format ......................................................................... 95
Table 216. PortCPin Ctl Command Verb Format .......................................................................................... 95
Table 217. PortCPin Ctl Command Response Format .................................................................................. 95
Table 218. PortCPin UnsolResp Command Verb Format ............................................................................. 96
Table 219. PortCPin UnsolResp Command Response Format ..................................................................... 96
Table 220. PortCPin Sense Command Verb Format ..................................................................................... 96
Table 221. PortCPin Sense Command Response Format ............................................................................ 96
Table 222. PortCPin Config Command Verb Format .................................................................................... 97
Table 223. PortCPin Config Command Response Format ............................................................................ 97
Table 224. PortBPin WCap Command Verb Format ..................................................................................... 98
Table 225. PortBPin WCap Command Response Format ............................................................................ 98
Table 226. PortBPin Cap Command Verb Format ........................................................................................ 99
Table 227. PortBPin Cap Command Response Format ................................................................................ 99
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
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STAC9200/9200D
V 1.4 12/06
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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 228. PortBPin ConnLen Command Verb Format .............................................................................. 100
Table 229. PortBPin ConnLen Command Response Format ...................................................................... 100
Table 230. PortBPin ConnLst Command Verb Format ................................................................................ 100
Table 231. PortBPin ConnLst Command Response Format ....................................................................... 100
Table 232. PortBPin Ctl Command Verb Format ......................................................................................... 100
Table 233. PortBPin Ctl Command Response Format ................................................................................ 101
Table 234. PortBPin UnsolResp Command Verb Format ........................................................................... 101
Table 235. PortBPin UnsolResp Command Response Format ................................................................... 101
Table 236. PortBPin Sense Command Verb Format ................................................................................... 102
Table 237. PortBPin Sense Command Response Format .......................................................................... 102
Table 238. PortBPin Config Command Verb Format ................................................................................... 102
Table 239. PortBPin Config Command Response Format .......................................................................... 103
Table 240. MonoOutPin Vol Command Verb Format .................................................................................. 103
Table 241. MonoOutPin Vol Command Response Format ......................................................................... 103
Table 242. MonoOutPin WCap Command Verb Format ............................................................................. 104
Table 243. MonoOutPin WCap Command Response Format ..................................................................... 104
Table 244. MonoOutPin Cap Command Verb Format ................................................................................. 105
Table 245. MonoOutPin Cap Command Response Format ........................................................................ 105
Table 246. MonoOutPin ConnLen Command Verb Format ......................................................................... 105
Table 247. MonoOutPin ConnLen Command Response Format ................................................................ 106
Table 248. MonoOutPin ConnLst Command Verb Format .......................................................................... 106
Table 249. MonoOutPin ConnLst Command Response Format ................................................................. 106
Table 250. MonoOutPin Ctl Command Verb Format ................................................................................... 106
Table 251. MonoOutPin Ctl Command Response Format .......................................................................... 107
Table 252. MonoOutPin Config Command Verb Format ............................................................................. 107
Table 253. MonoOutPin Config Command Response Format .................................................................... 107
Table 254. CDPin WCap Command Verb Format ....................................................................................... 108
Table 255. CDPin WCap Command Response Format .............................................................................. 108
Table 256. CDPin Cap Command Verb Format .......................................................................................... 109
Table 257. CDPin Cap Command Response Format .................................................................................. 109
Table 258. CDPin Ctl Command Verb Format ............................................................................................ 110
Table 259. CDPin Ctl Command Response Format .................................................................................... 110
Table 260. CDPin Config Command Verb Format ...................................................................................... 110
Table 261. CDPin Config Command Response Format .............................................................................. 110
Table 262. MonoOutMix WCap Command Verb Format ............................................................................. 111
Table 263. MonoOutMix WCap Command Response Format .................................................................... 111
Table 264. MonoOutMix ConnLen Command Verb Format ........................................................................ 112
Table 265. MonoOutMix ConnLen Command Response Format ................................................................ 112
Table 266. MonoOutMix ConnLst Command Verb Format ......................................................................... 112
Table 267. MonoOutMix ConnLst Command Response Format ................................................................. 113
Table 268. PCBeep Vol Command Verb Format ......................................................................................... 113
Table 269. PCBeep Vol Command Response Format ................................................................................ 113
Table 270. PCBeep WCap Command Verb Format .................................................................................... 113
Table 271. PCBeep WCap Command Response Format ........................................................................... 114
Table 272. PCBeep OutAmpCap Command Verb Format .......................................................................... 114
Table 273. PCBeep OutAmpCap Command Response Format ................................................................. 114
Table 274. PCBeep Gen Command Verb Format ....................................................................................... 115
Table 275. PCBeep Gen Command Response Format .............................................................................. 115
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
10
STAC9200/9200D
V 1.4 12/06
IDT CONFIDENTIAL
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
1. DESCRIPTION
The STAC9200/9200D is a high quality, 2-channel audio CODEC compatible with the Intel High Definition (HD)
Audio Interface (formerly known as “Azalia”). The STAC9200/9200D provides high quality, HD Audio capability
to notebook and cost sensitive desktop PC applications. The STAC9200/9200D has been designed as a
drop-in replacement for the STAC9772/73 Dual Mode (HD Audio and AC97) 2-channel CODEC once the need
to support AC97 is eliminated.
The STAC9200/9200D incorporates IDT's proprietary SD technology to achieve a DAC SNR in excess of
100dB. The higher performance and quality of IDT’s audio solutions brings consumer device level performance
to the notebook, desktop and media center PCs.
The STAC9200/9200D provides Stereo 24-Bit, full duplex resolution supporting sample rates up to 192 KHz by
the DAC and ADC. The STAC9200/9200D DAC, ADC and SPDIF In/Out support sample rates of 96 KHz,
48 KHz and 44.1 KHz. Additionally, the SPDIF Out supports 32 KHz. The CODEC’s driver supports additional
sample rate options.
The STAC9200/9200D supports all desired two channel configurations, including switchable Headphone Out,
TM
and Universal Jacks
functionality for automatic jack detection sensing and retasking. The SPDIF interface
provides connectivity to Consumer Electronic equipment like Dolby Digital decoders, powered speakers, mini
disk drives or to a home entertainment system. All analog I/O pairs support LINE_IN, LINE_OUT and MIC.
MIC inputs can be programmed with 0/10/20/30/40dB boost. For more advanced configurations, the
STAC9200/9200D has four General Purpose I/O (GPIO) pins. The STAC9200/9200D also provides a single
ended CD input to avoid DRM incompatibility and to support legacy OS issues.
The STAC9200/9200D integrates a headphone amplifier which is available on Ports A and D. The headphone
amplifier is switchable between these two outputs for increased flexibility, enhanced user experience, and
reduced implementation costs.
The Universal Jack capabilities allow the CODEC to detect when audio devices are connected to the CODEC,
sense the type of device (LINE_IN, LINE_OUT, MIC, Headphone) that is inserted, and to allow the CODEC to
be reconfigured to support these devices wherever they are plugged into the system. SPDIF input sensing is
also supported. The fully parametric IDT SoftEQ can be initiated upon headphone jack insertion and removal
for protection of notebook speakers.
The STAC9200/9200D operates with a 3.3V digital supply and is available in either 5V, 4V or 3.3V analog sup-
ply. The +4V Analog voltage is supported by the +5V version of the STAC9200 or STAC9200D appropriate
configuration settings of the driver.
The STAC9200/9200D is available in 48-pin LQFP and 32-pad QFN package options. The 32-pad QFN pack-
age can be co-located inside the standard 48-pin footprint allowing systems to be designed to accept either
version of the STAC9200/9200D or be compatible with existing 48-pin CODECs. Both the 48-pin LQFP and the
32-pad QFN are available in the ROHS compliant Lead (Pb) free package.
The STAC9200/9200D is supported with IDT’s high quality software solutions which include drivers for all
major Windows operating systems from Microsoft Parametric SoftEQ, and Digital Rights Management. Third
party plugin capability is easily achieved with the IDT Kernel Processing Interface, to support high valued third
®
®
®
party technologies like SRS WOW , Knowles Microphone Beam forming, Waves MaxxBASS , Dolby Head-
®
®
®
phone , Dolby ProLogic II and Dolby Virtual Speaker and more.
The STAC9200D is designed to support Dolby Sound Room and Dolby Home Theater levels of Dolby’s PC
Entertainments Experience logo program.
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
11
STAC9200/9200D
V 1.4 12/06
IDT CONFIDENTIAL
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
2. PERFORMANCE
2.1. Audio Fidelity
DAC SNR:
ADC SNR:
100dB
90dB
2.2. Electrical Specifications
2.2.1.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the STAC9200/9200D. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability.
Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Pin
Maximum Rating
Analog maximum supply voltage
Digital maximum supply voltage
VREFOUT output current
Voltage on any pin relative to ground
Operating temperature
AVdd 6 Volts
DVdd 5.5 Volts
5 mA
Vss - 0.3 V to Vdd + 0.3 V
o
o
0 C to +70 C
o
o
Storage temperature
-55 C to +125 C
o
260 C for 10 seconds *
Soldering temperature
Soldering temperature information for all available packages
begins on page 122.
2.2.2.
Recommended Operation Conditions
Parameter
Min.
3.135
3.135
Typ.
3.3
Max.
3.465
3.465
Units
V
Power Supply Voltage
Digital - 3.3 V
Analog - 3.3 V
3.3
V
(Note: The +4V Analog voltage is supported by the
+5V version of the STAC9200 or STAC9200D.)
Analog - 4 V
Analog - 5 V
3.8
4
5
4.2
V
4.75
0
5.25
+70
+90
V
Ambient Operating Temperature
Case Temperature
°C
°C
T
(48-LQFP)
case
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
12
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
ESD: The STAC9200/9200D is an ESD (electrostatic discharge) sensitive device. The human body and test equipment can
accumulate and discharge electrostatic charges up to 4000 Volts without detection. Even though the STAC9200/9200D
implements internal ESD protection circuitry, proper ESD precautions should be followed to avoid damaging the functionality
or performance.
2.3. Power Consumption
2.3.1.
Digital
Table 1. Digital Power Consumption
Power State
Typical
25
Max
29
Units
mA
D0
D1
D2
D3
12
16
mA
12
16
mA
12
16
mA
2.3.2.
Analog
Table 2. Analog Power Consumption
Power State
Typical
36
Max
48
Units
mA
D0
D1
D2
D3
26
35
mA
26
35
mA
26
35
mA
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
13
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
2.4. STAC9200/9200D 5V Analog Performance Characteristics
(T
= 25 ºC, AVdd = 5.0V ± 5%, DVdd = 3.3V ± 5%, AVss=DVss=0V; 1 KHz input sine wave; Sample Frequency =
ambient
48 KHz; 0 dB = 1 VRMS, 10 KW/50pF load, Testbench Characterization BW: 20 Hz – 20 KHz, 0 dB settings on all gain
stages)
Min and Max performance targets are not included here, as specific system characteristics, such as layout, routing and
external CODEC component selection, influence the performance of the CODEC. To receive min/max levels for your
system, please send us a unit and IDT will perform a full audio test suite and provide you with the results. Contact IDT
for more information.
Parameter
Full Scale Input Voltage:
Min
Typ
Max
Unit
-
-
1.00
0.03
-
-
Vrms
Vrms
All Analog Inputs with out boost
All Analog Inputs with boost (Note 1)
Full Scale Output:
-
-
1.00
50
-
-
Vrms
mW
PCM (DAC) to All Analog Outputs
HEADPHONE_OUT (32 Ω load) per channel (peak)
Dynamic Range: -60dB signal level (Note 2)
PCM to All Analog Outputs
-
-
95
85
-
-
dB
dB
Hz
All Analog Inputs to A/D (1VRMS Input Referenced)
Analog Frequency Response (Note 3)
Total Harmonic Distortion + Noise (-3dB): (Note 4)
PCM to All Analog Outputs
-
10
30,000
-
-
-
-
-90
-85
-85
-88
-
-
-
-
dB
dB
dB
dB
All Analog Inputs to A/D (-3dBV input Level)
HEADPHONE_OUT (32 Ω load)
HEADPHONE_OUT (10 KΩ load)
SNR (idle channel) (Note 5)
DAC to All Analog Outputs
-
100
-
dB
dB
Hz
Hz
Hz
dB
dB
ms
dB
dB
dB
-
85
-
All Analog Inputs to A/D with High Pass Filter enabled
A/D & D/A Digital Filter Pass Band (Note 6)
A/D & D/A Digital Filter Transition Band
A/D & D/A Digital Filter Stop Band
20
-
19,200
19,200
-
28,800
28,800
-
-
-
-
-100
A/D & D/A Digital Filter Stop Band Rejcn (Note 7)
DAC Out-of-Band Rejection (Note 8)
Group Delay (48 KHz sample rate)
-55
-
-
-
-
-
-
1
-
-70
-40
-100
Power Supply Rejection Ratio (1 KHz)
Power Supply Rejection Ratio (20 KHz)
Any Analog Input to DAC (1 KHz Signal Frequency) Crosstalk
-
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
14
IDT CONFIDENTIAL
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V 1.4 12/06
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Parameter
Any Analog Input to ADC (10 KHz Signal Frequency) Crosstalk
Any Analog Input to ADC (1 KHz Signal Frequency) Crosstalk
Spurious Tone Rejection
Min
Typ
Max
Unit
dB
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-85
-
-80
-
dB
-100
-
dB
1.5
-
dB
Attenuation, Gain Step Size ANALOG
Attenuation, Gain Step Size DIGITAL
Input Impedance
0.75
-
dB
50
-
KΩ
pF
15
-
-
Input Capacitance
0.5 X AVdd
V
VREFout
VREF
0.45X AVdd
0.5
0.5
-
V
-
-
dB
Interchannel Gain Mismatch ADC
Interchannel Gain Mismatch DAC
Gain Drift
dB
100
5
-
ppm/ºC
mV
deg.
KΩ
pF
10
1
DAC Offset Voltage
10
10
-
Deviation from Linear Phase
All Analog Outputs Load Resistance
All Analog Outputs Load Capacitance
HEADPHONE_OUT Load Resistance
HEADPHONE_OUT Load Capacitance
Mute Attenuation
-
50
-
32
100
-
W
-
pF
-
dB
96
100
200
300
μsec
psec
PLL lock time
PLL (or Azalia Bit CLK) 24.576 MHz clock jitter
1. With +30 dB Boost on, 1.00 Vrms with Boost off.
2. Ratio of Full Scale signal to noise output with -60dB signal, measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth.
3. ± 1dB limits for Line Output & 0 dB gain, at -20dBV
4. Ratio of Full Scale signal to THD+N output with -3dB signal, measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth. Sample Frequency = 48 KHz.
5. Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth. (AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
6. Peak-to-Peak Ripple over Passband meets ± 0.25dB limits, 48 KHz Sample Frequency.
7. Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
8. The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a
bandwidth 28.8 to 100 KHz, with respect to a 1 Vrms DAC output.
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
15
STAC9200/9200D
V 1.4 12/06
IDT CONFIDENTIAL
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
2.5. STAC9200/9200D 4V Analog Performance Characteristics
(T
= 25 ºC, AVdd = 4.0V ± 5%, DVdd = 3.3V ± 5%, AVss=DVss=0V; 1 KHz input sine wave; Sample Frequency =
ambient
48 KHz; 0 dB = 1 VRMS, 10 KW/50 pF load, Testbench Characterization BW: 20 Hz – 20 Hz, 0 dB settings on all gain
stages)
Min and Max performance targets are not included here, as specific system characteristics, such as layout, routing and
external CODEC component selection, influence the performance of the CODEC. To receive min/max levels for your
system, please send us a unit and IDT will perform a full audio test suite and provide you with the results. Contact IDT
for more information.
Parameter
Min
Typ
Max
Unit
Full Scale Input Voltage:
-
-
1.00
0.03
-
-
Vrms
Vrms
All Analog Inputs with out boost
All Analog Inputs with boost (Note 1)
Full Scale Output:
-
-
1.00
50
-
-
Vrms
mW
PCM (DAC) to All Analog Outputs
HEADPHONE_OUT (32 Ω load) per channel (peak)
Dynamic Range: -60dB signal level (Note 2)
PCM to All Analog Outputs
-
-
95
85
-
-
dB
dB
Hz
All Analog Inputs to A/D (1VRMS Input Referenced)
Analog Frequency Response (Note 3)
Total Harmonic Distortion + Noise (-3dB): (Note 4)
PCM to All Analog Outputs
-
10
30,000
-
-
-
-
-90
-85
-85
-88
-
-
-
-
dB
dB
dB
dB
All Analog Inputs to A/D (-3dBV input Level)
HEADPHONE_OUT (32 Ω load)
HEADPHONE_OUT (10 KΩ load)
SNR (idle channel) (Note 5)
DAC to All Analog Outputs
-
100
-
dB
dB
Hz
Hz
Hz
dB
dB
ms
dB
dB
dB
-
85
-
All Analog Inputs to A/D with High Pass Filter enabled
A/D & D/A Digital Filter Pass Band (Note 6)
A/D & D/A Digital Filter Transition Band
A/D & D/A Digital Filter Stop Band
20
-
19,200
19,200
-
-
28,800
28,800
-
-
-100
-
A/D & D/A Digital Filter Stop Band Rejcn (Note 7)
DAC Out-of-Band Rejection (Note 8)
Group Delay (48 KHz sample rate)
-55
-
-
-
-
-
-
-
1
-
-70
-40
-85
Power Supply Rejection Ratio (1 Hz)
Power Supply Rejection Ratio (20 Hz)
Any Analog Input to ADC (10 KHz Signal Frequency) Crosstalk
-
-
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
16
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Parameter
Any Analog Input to ADC (1 KHz Signal Frequency) Crosstalk
Spurious Tone Rejection
Min
Typ
Max
Unit
dB
-
-
-
-
-
-
-
-
-
-
-80
-
-100
-
dB
1.5
-
dB
Attenuation, Gain Step Size ANALOG
Attenuation, Gain Step Size DIGITAL
Input Impedance
0.75
-
dB
50
-
KΩ
pF
Input Capacitance
15
-
-
0.5 X AVdd
V
VREFout
0.45X AVdd
0.5
0.5
-
V
VREF
Interchannel Gain Mismatch ADC
Interchannel Gain Mismatch DAC
Gain Drift
-
-
dB
dB
100
5
-
ppm/ºC
mV
deg.
KΩ
pF
DAC Offset Voltage
-
-
-
-
-
10
1
10
10
-
Deviation from Linear Phase
All Analog Outputs Load Resistance
All Analog Outputs Load Capacitance
HEADPHONE_OUT Load Resistance
HEADPHONE_OUT Load Capacitance
Mute Attenuation
-
50
-
32
-100
-
W
-
pF
-
-
-
-
dB
96
100
200
300
μsec
psec
PLL lock time
PLL (or Azalia Bit CLK) 24.576 MHz clock jitter
1. With +30dB Boost on, 1.00 Vrms with Boost off.
2. Ratio of Full Scale signal to noise output with -60dB signal, measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth.
3. ± 1dB limits for Line Output & 0 dB gain, at -20dBV
4. Ratio of Full Scale signal to THD+N output with -3dB signal, measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth. Sample Frequency = 48 KHz.
5. Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth. (AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
6. Peak-to-Peak Ripple over Passband meets ± 0.25dB limits, 48 KHz Sample Frequency.
7. Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
8. The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a
bandwidth 28.8 to 100 KHz, with respect to a 1 Vrms DAC output.
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2.6. STAC9200/9200D 3.3V Analog Performance Characteristics
(T
= 25 ºC, AVdd = 3.3V ± 5%, DVdd = 3.3V ± 5%, AVss=DVss=0V; 1 KHz input sine wave; Sample Frequency =
ambient
48 KHz; 0 dB = 1 VRMS, 10 KW/50 pF load, Testbench Characterization BW: 20 Hz – 20 KHz, 0 dB settings on all gain
stages)
Min and Max performance targets are not included here, as specific system characteristics, such as layout, routing and
external CODEC component selection, influence the performance of the CODEC. To receive min/max levels for your
system, please send us a unit and IDT will perform a full audio test suite and provide you with the results. Contact IDT
for more information.
Parameter
Min
Typ
Max
Unit
Full Scale Input Voltage:
-
-
0.7
-
-
Vrms
Vrms
All Analog Inputs with out boost
0.03
All Analog Inputs with boost (Note 1)
Full Scale Output:
-
-
1.00
50
-
-
Vrms
mW
PCM (DAC) to All Analog Outputs
HEADPHONE_OUT (32 Ω load) per channel (peak)
Dynamic Range: -60dB signal level (Note 2)
PCM to All Analog Outputs
-
-
95
80
-
-
dB
dB
Hz
All Analog Inputs to A/D (1VRMS Input Referenced)
Analog Frequency Response (Note 3)
Total Harmonic Distortion + Noise (-3dB): (Note 4)
PCM to All Analog Outputs
-
10
30,000
-
-
-
-
-90
-75
-85
-88
-
-
-
-
dB
dB
dB
dB
All Analog Inputs to A/D (-3dBV input Level)
HEADPHONE_OUT (32 Ω load)
HEADPHONE_OUT (10 KΩ load)
SNR (idle channel) (Note 5)
DAC to All Analog Outputs
-
100
-
dB
dB
Hz
Hz
Hz
dB
dB
ms
dB
dB
dB
-
85
-
All Analog Inputs to A/D with High Pass Filter enabled
A/D & D/A Digital Filter Pass Band (Note 6)
A/D & D/A Digital Filter Transition Band
A/D & D/A Digital Filter Stop Band
20
-
19,200
19,200
-
-
28,800
28,800
-
-
-100
-
A/D & D/A Digital Filter Stop Band Rejcn (Note 7)
DAC Out-of-Band Rejection (Note 8)
Group Delay (48 KHz sample rate)
-55
-
-
-
-
-
-
-
1
-
-70
-40
-85
Power Supply Rejection Ratio (1 KHz)
Power Supply Rejection Ratio (20 KHz)
Any Analog Input to ADC (10 KHz Signal Frequency) Crosstalk
-
-
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Parameter
Any Analog Input to ADC (1 KHz Signal Frequency) Crosstalk
Spurious Tone Rejection
Min
Typ
Max
Unit
dB
-
-
-
-
-
-
-
-
-
-
-75
-
-100
-
dB
1.5
-
dB
Attenuation, Gain Step Size ANALOG
Attenuation, Gain Step Size DIGITAL
Input Impedance
0.75
-
dB
50
-
KΩ
pF
Input Capacitance
15
-
-
0.5 X AVdd
V
VREFout
0.45X AVdd
0.5
0.5
-
V
VREF
Interchannel Gain Mismatch ADC
Interchannel Gain Mismatch DAC
Gain Drift
-
-
dB
dB
100
5
-
ppm/ºC
mV
deg.
KΩ
pF
DAC Offset Voltage
-
-
-
-
-
-
-
-
-
10
1
10
10
-
Deviation from Linear Phase
All Analog Outputs Load Resistance
All Analog Outputs Load Capacitance
HEADPHONE_OUT Load Resistance
HEADPHONE_OUT Load Capacitance
Mute Attenuation
-
50
-
32
100
-
W
-
pF
-
dB
96
100
200
300
μsec
psec
PLL lock time
PLL (or Azalia Bit CLK) 24.576 MHz clock jitter
1. With +30 dB Boost on, 1.00 Vrms with Boost off.
2. Ratio of Full Scale signal to noise output with -60dB signal, measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth.
3. ± 1dB limits for Line Output & 0 dB gain, at -20dBV
4. Ratio of Full Scale signal to THD+N output with -3dB signal, measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth. Sample Frequency = 48 KHz.
5. Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 KHz
bandwidth. (AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
6. Peak-to-Peak Ripple over Passband meets ± 0.25dB limits, 48 KHz Sample Frequency.
7. Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
8. The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a
bandwidth 28.8 to 100 KHz, with respect to a 1 Vrms DAC output.
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3. EXTENDED FEATURE EXPLANATION
3.1. SPDIF Input
SPDIF IN can run at 44.1 KHz, 48 KHz and 96 KHz, and has internal Jack Sensing.
A sophisticated digital PLL allows automatic rate detection and accurate data recovery. The ability to
directly accept consumer SPDIF voltage levels eliminates the need for costly external receiver ICs.
Advanced features such as record slot select and SPDIF_IN routing to the DAC allows for simulta-
neous record and play.
3.2. SPDIF Output
SPDIF Output can run at 44.1 KHz, 48 KHz, and 96 KHz at bit rates up to 24 bits, as defined in the
Intel High Definition Audio Specification. This insures compatibility with all consumer audio gear and
allows for convenient integration into home theater systems and multi-media centers.
TM
3.3. Universal Jacks
TM
IDT’s Universal Jacks technology allows for the greatest flexibility in board design and implemen-
tation.
TM
For the STAC9200/9200D the Universal Jacks capabilities are as follows
•
All of the STAC9200/9200D ports support:
• Line Out
• Line In
• Mic with 0/10/20/30/40 dB Mic Boost
•
Ports A and D also support
1
• Headphone Out
1
Headphone capabilities are available on pins 39/41 and 35/36, but one should not put headphone
loads on both sets of pins at the same time.
Note: On the STAC9200/9200D only one function can be selected at a time, you cannot have an
input and output at the same time on the same set of pins. This function can be changed at any
time.
3.4. Audio Jack Presence Detect
Sense_A pin is used to detect the presence of plugs in ports A, B, C, and D. Refer to the reference
design for port detect circuitry. Select the precision of the resistors used as follows:
AVDD Nominal Voltage
(+- 5%)
Resistor Tolerance
(If Port D is used)
Resistor Tolerance
(If Port D is not used)
5V
4.5V
4V
1%
1%
1%
1%
1%
1%
0.50%
0.10%
3.3V
Includes pull-up resistors on Sense A and series resistors between jack switch and Sense A.
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4. BLOCK DIAGRAMS AND TYPICAL HOOKUPS
4.1. Functional Block Diagram
Figure 1. Functional Block Diagram
Pin 47
SPDIF IN
SPDIF
Receiver
Stream/
Channel
Select
SD0
Pin 5
PCM to
SPDIF
OUT
Pin 48
SPDIF
BIT_CLK Pin 6
Stream/
Channel
Select
SDI
Pin 8
SYNC
Pin 10
-6dB
MONO_OUT
Pin 37
Reset # Pin 11
+0 dB
vol mute
Σ
Stream/
Channel
Select
Loop 1
HP
Out
DAC A
Analog
Pin Complex
Pins 39/41
DAC A
Digital
vol mute
Port A
Port D
Stream/
Channel
Select
DAC BYPASS MODE
Single Bit Loopback
HP
Out
(Loop 3)
Pin Complex
Pins 35/36
Digital
PC Beep
Line
Out
Pin Complex
Pins 23/24
Port C
Port B
Analog PC
Beep
Line
Out
Pin Complex
Pins 21/22
Σ
Pin 12
STEREO
ADC
MIC
Boost
+22 dB
mute vol
CD In
Pin Complex
Pins 18/20
CD
Loop 1
Pin 13: Sense A
Pin 27: VREF In
Pin 28: VREF Out (switchable Mic Bias)
Pin 32: CAP 2
Pin 33: GPIO0
Pin 34: GPIO1
Pin 45: GPIO2
Pin 47: GPIO3
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4.2. STAC9200/9200D Typical Connection Diagram for 48-pin LQFP
Please see the reference design for this information.
4.3. STAC9200/9200D Split Independent Power Supply for 48-pin LQFP
Please see the reference design for this information.
4.4. STAC9200/9200D Typical Connection Diagram for 32-pad QFN
Please see the reference design for this information.
4.5. STAC9200/9200D Split Independent Power Supply for 32-pad QFN
Please see the reference design for this information.
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5. WIDGET INFORMATION
5.1. Widget Diagram
Figure 2. Widget Diagram
Digital
Analog
ST
0, 10, 20, 30,
40dB Amp
4h
8h
Ch
HP:
0
Stereo Input
SPDIF In
Dh
Port A
SPDIF In
Pin
SD0 Pin 5
Bit CLK Pin 6
SDI Pin 8
Actual
Pin
SPDIF IN
Pin
0 to +22.5
HP Out, LineOut,
LineIn, MIC
HP Out
47
Universal JackTM
Ah
Actual Pins
39/41
3h
2h
Stereo
ADC Input
ADC
Mux
SYNC Pin 10
HP:
0
Eh
Port D
LR Swap
Reset # Pin 11
Pin
7
h
HP Out, LineOut,
LineIn, MIC
Line Out
2
0
1
Loop 3
Universal JackTM
Actual Pins
35/36
Stereo
DAC Output
Bh
DAC
Master
LR Swap
Volume
Mixer
5h
Port C
Fh
Stereo
0 to -46.5
SPDIF Output
Pin
LineOut, LineIn,
MIC
Line In
Analog PC Beep
Pin 12
1
0
Universal JackTM
Actual Pins
23/24
9h
SPDIF Out
Pin
6h
Vendor Specific
Port B
10h
SPDIFOut
Pin
LineOut, LineIn,
MIC
Actual
Pin
48
MIC
Universal JackTM
Actual Pins
21/22
Pin 13: Sense A
Pin 27: VREF In
Pin 28: VREF Out (switchable Mic Bias)
Pin 32: CAP 2
13h
11h
Pin 33: GPIO0
Pin 34: GPIO1
Pin 45: GPIO2
Pin 47: GPIO3
Mono
Mix
Pin
MONO Out
MONO Out
Actual
Pin
37
14h
Digital PC Beep
12h
Pin
CD In
CD
Actual Pins
18/20
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5.2. STAC9200/9200D Widget List
Table 3. High Definition Audio Widget
Description
ID
1h
Widget Name
Audio Function Group
DAC0
Audio Function Group
Stereo Output to DAC
2h
3h
ADC0
Stereo Input Mux from ADC
Stereo Input for SPDIF_In
Stereo Output for SPDIF_Out
Reserved: Unused
4h
SPDIF_IN
SPDIF_OUT
Reserved
5h
6h
7h
DAC0Mux
SPDIF-In Pin
SPDIF-Out Pin
Mic
Digital Mux for DAC
8h
Pin Widget for SPDIF_In Pin 47
Pin Widget for SPDIF_Out Pin 48
9h
10h
11h
12h
13h
14h
15h-19h
Ah
Mic Pin Widget pins 21/22 (can also act as Line Out and Line In)
Mono Out Volume Controls and Capabilities for pin 37
CD Pin Widget pins 18/20
Mono Out
CD
Mono Mix
Combines the Two Stereo Channels into one Mono Signal
Digital PC Beep
Digital PC Beep
Reserved
Reserved: Unused
ADC0Mux
Master Volume
Input Mux
Headphone
Line Out
ADC Mux and Volume Control for inputs to ADC
Master Volume Controls
Bh
Ch
Input Mux to ADC for Widgets Dh, Eh, Fh, 10h, and 12h
Headphone Pin Widget pins 39/41 (can also act as Line In, Line Out ,or Mic)
Line Out Pin Widget pins 35/36 (can also act as HP, Line In, or Mic)
Line In Pin Widget pins 23/24 (can also act as Mic or Line Out)
Dh
Eh
Fh
Line In
Note: All widgets in this document are applicable to theSTAC9200/9200D B1 Revision. For
widgets pertaining to the STAC9200/9200D A1 Revision, see STAC9200/9200D Datasheet
Revision 0.8.
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5.3. Root Node (NID = 0x00)
5.3.1.
Root PnpID
Table 4. Root PnpID Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
00
Table 5. Root PnpID Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:16]
Vendor
R
0x8384
Vendor ID STAC9200/9200D = 8384h
Device ID: STAC9200 = 7690h
Device ID: STAC9200D = 7691h
[15.:0]
Device
R
0x7690
5.3.2.
Root RevID
Table 6. Root RevID Command Verb Format
Verb ID
Payload
Response
Get
F00
02
See bitfield table
Table 7. Root RevID Command Response Format
Bit
Bitfield Name
Rsvd
RW
R
Reset
0x00
0x1
Description
[31.:24]
[23.:20]
[19.:16]
Reserved
Major
R
Major rev number of compliant Azalia spec.
Minor rev number of compliant Azalia spec.
Minor
R
0x0
Vendor rev number for this device ID:
STAC9200/9200D = xxh
[15.:8]
[7.:0]
Vendor
R
R
0x22
0x01
Vendor stepping number within the given
Vendor RevID: STAC9200/9200D = xxh
Stepping
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5.3.3.
Root NodeInfo
Table 8. Root NodeInfo Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
04
Table 9. Root NodeInfo Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:24]
Rsvd2
R
0x00
Reserved
Starting node number (NID) of first function
group
[23.:16]
StartNID
R
0x01
[15.:8]
[7.:0]
Rsvd1
R
R
0x00
0x01
Reserved
TotalNodes
Total number of nodes
5.4. AFG Node (NID = 0x01)
5.4.1.
AFG Reset
Table 10. AFG Reset Command Verb Format
Verb ID
7FF
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
7FF
See bits [7:0] of bitfield table
Table 11. AFG Reset Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:0]
Response
R
0x0
Reserved. Overlaps Execute.
Function Reset. Function Group reset is
executed when the Set verb 7FF is written with
8-bit payload of 00h. The CODEC should issue
a response to acknowledge receipt of the verb,
and then reset the affected Function Group and
all associated widgets to their power-on reset
values. Some controls such as Configuration
Default controls should not be reset. Overlaps
Response.
[0]
Execute
W
0x0
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5.4.2.
AFG NodeInfo
Table 12. AFG NodeInfo Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
04
Table 13. AFG NodeInfo Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:24]
Rsvd2
R
0x0
Reserved
Starting node number for function group
subordinate nodes.
[23.:16]
StartNID
R
0x02
[15.:8]
[7.:0]
Rsvd1
R
R
0x0
Reserved
TotalNodes
0x13
Total number of nodes.
5.4.3.
AFG Type
Table 14. AFG Type Command Verb Format
Verb ID
Payload
Response
Get
F00
05
See bitfield table
Table 15. AFG Type Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:9]
Rsvd
R
0x0
Reserved
This node is capable of generating an
[8]
Unsol
R
R
0x1
unsolicited response, and will respond to the
Unsolicited Response verb (Verb ID 708h).
[7.:0]
NodeType
0x01
Node type = Audio Function Group
5.4.4.
AFG GrpCap
Table 16. AFG GrpCap Command Verb Format
Verb ID
Payload
Response
Get
F00
08
See bitfield table
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Table 17. AFG GrpCap Command Response Format
Bit
Bitfield Name
Rsvd3
RW
R
Reset
0x0
Description
[31.:17]
[16]
Reserved
BeepGen
Rsvd2
R
0x1
Optional Beep Generator is present
Reserved
[15.:12]
R
0x0
Typical latency = 13 frames. Number of
samples between when the sample is received
as an analog signal at the pin and when the
digital representation is transmitted on the
Azalia link.
[11.:8]
InputDelay
R
0xD
[7.:4]
[3.:0]
Rsvd1
R
R
0x0
Reserved
Typical latency = 13 frames. Number of
samples between when the signal is received
from the Azalia link and when it appears as an
analog signal at the pin.
OutputDelay
0xD
5.4.5.
AFG FrmtCap
Table 18. AFG FrmtCap Command Verb Format
Verb ID
Payload
Response
Get
F00
0A
See bitfield table
Table 19. AFG FrmtCap Command Response Format
Bit
[31.:21]
[20]
Bitfield Name
RW
R
Reset
0x0
0x0
0x1
0x1
0x1
0x0
0x0
Description
Rsvd2
B32
Reserved
R
32 bit audio formats are NOT supported
24 bit audio formats are supported
20 bit audio formats are supported
16 bit audio formats are supported
8 bit audio formats are NOT supported
Reserved
[19]
B24
R
[18]
B20
R
[17]
B16
R
[16]
B8
R
[15.:12]
Rsvd1
R
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Table 19. AFG FrmtCap Command Response Format
Bit
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bitfield Name
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x1
0x1
0x1
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
Description
R12
R11
R10
R9
384 KHz rate (8/1*48 KHz) NOT supported
192.0 KHz rate (4/1*48 KHz) supported
176.4 KHz rate (4/1*44.1 KHz) supported
96.0 KHz rate (2/1*48 KHz) supported
88.2KHz rate (2/1*44.1KHz) supported
48.0 KHz rate supported (REQUIRED)
44.1 KHz rate supported
R8
R7
R6
R5
32.0 KHz rate (2/3*48 KHz) NOT supported
22.05 KHz rate (1/2*44.1 KHz) NOT supported
16.0 KHz rate (1/3*48 KHz) NOT supported
11.025 KHz rate (1/4*44.0 KHz) NOT supported
8.0 KHz rate (1/6*48 KHz) NOT supported
R4
R3
R2
R1
5.4.6.
AFG StreamCap
Table 20. AFG StreamCap Command Verb Format
Verb ID
Payload
Response
Get
F00
0B
See bitfield table
Table 21. AFG StreamCap Command Response Format
Bit
[31.:3]
[2]
Bitfield Name
RW
R
Reset
0x0
Description
Rsvd
NonPCM
Float32
PCM
Reserved
R
0x0
No support for non-PCM (AC3) data.
No support for single-precision floating-point data.
PCM-formatted data supported.
[1]
R
0x0
[0]
R
0x1
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5.4.7.
AFG PwrCap
Table 22. AFG PwrCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
0F
Table 23. AFG PwrCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
Power State D3 is supported. Allows for lowest
possible power consuming state under software
control (and still properly respond to a
[3]
[2]
D3
R
R
0x1
0x1
subsequent Power State command).
Power State D2 is supported. Allows for lowest
possible power consuming state from which it
can return to fully on state within 10 ms.
D2
Power State D1 is supported. Allows for lowest
possible power consuming state from which it
can return to fully on state within 10 ms,
excepting analog pass-through circuits which
must remain fully on.
[1]
D1
D0
R
R
0x1
0x1
Power State D0 is supported. Node power state
is fully on.
[0]
5.4.8.
AFG GPIOCap
Table 24. AFG GPIOCap Command Verb Format
Verb ID
Payload
Response
Get
F00
11
See bitfield table
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Table 25. AFG GPIOCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Wake capability. Assuming the Wake Enable
Mask controls are enabled, GPIOs configured
as inputs can cause a wake (generate a Status
Change event on the link) when there is a
change in level on the pin.
[31]
GPIWake
R
0x1
Unsolicited Response capability. Assuming the
Unsolicited Enable Mask controls are enabled,
GPIOs configured as inputs can generate an
Unsolicited Response on the link when there is
a change in level on the pin.
[30]
GPIUnsol
R
0x1
[29.:24]
[23.:16]
[15.:8]
[7.:0]
Rsvd
R
R
R
R
0x0
Reserved
NumGPIs
NumGPOs
NumGPIOs
0x00
0x00
0x04
Number of GPI pins supported
Number of GPO pins supported
Number of GPIO pins supported
5.4.9.
AFG OutAmpCap
Table 26. AFG OutAmpCap Command Verb Format
Verb ID
Payload
Response
Get
F00
12
See bitfield table
Table 27. AFG OutAmpCap Command Response Format
Bit
[31]
Bitfield Name
RW
R
Reset
0x1
Description
Mute
Rsvd3
Amplifier is capable of muting
Reserved
[30.:23]
[22.:16]
[15]
R
0x0
StepSize
Rsvd2
R
0x05
0x0
Size of each step in the gain range = 1.5dB
Reserved
R
Number of steps in the gain range = 32
(-46.5dB to +0dB)
[14.:8]
NumSteps
R
0x1F
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Table 27. AFG OutAmpCap Command Response Format
Bit
[7]
Bitfield Name
Rsvd1
RW
R
Reset
0x0
Description
Reserved
0dB-step is programmed with this offset
[6.:0]
Offset
R
0x1F
5.4.10. AFG PwrState
Table 28. AFG PwrState Command Verb Format
Verb ID
F05
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
705
See bits [7:0] of bitfield table
Table 29. AFG PwrState Command Response Format
Bit
Bitfield Name
RW
R
Reset
0x0
Description
[31.:8]
[7.:4]
[3.:2]
Rsvd2
Act
Reserved
R
0x2
PS-Act: Actual power state of referenced node.
Reserved
Rsvd1
R
0x0
PS-Set: Current power setting of referenced node.
0: All Powered-On
1: D1 => PR0, PR1
[1.:0]
Set
RW
0x2
2: D2 => PR0, PR1, PR2, PR6, EAPD
3: D3 => PR6, PR5, PR3, PR2, PR1, PR0, EAPD
Note: PR4 is not mapped in Azalia
5.4.11. AFG UnsolResp
Table 30. AFG UnsolResp Command Verb Format
Verb ID
F08
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
708
See bits [7:0] of bitfield table
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Table 31. AFG UnsolResp Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
En
RW
R
0x0
Allow generation of Unsolicited Responses.
Reserved
[6]
Rsvd1
0x0
Software programmable field returned in top
six bits (31:26) of every Unsolicited
Response generated by this node.
[5.:0]
Tag
RW
0x0
5.4.12. AFG GPIO
Table 32. AFG GPIO Command Verb Format
Verb ID
F15
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
715
See bits [7:0] of bitfield table
Table 33. AFG GPIO Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
Data for GPIO3 (Pin 47/EAPD). If this GPIO bit
is configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
[3]
[2]
Data3
Data2
RW
RW
0x0
0x0
Data for GPIO2 (Pin 45). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
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Table 33. AFG GPIO Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Data for GPIO1 (Pin 34). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
[1]
Data1
RW
0x0
Data for GPIO0 (Pin 33). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
[0]
Data0
RW
0x0
5.4.13. AFG GPIOEn
Table 34. AFG GPIOEn Command Verb Format
Verb ID
F16
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
716
See bits [7:0] of bitfield table
Table 35. AFG GPIOEn Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
Enable for GPIO3:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
[3]
[2]
[1]
[0]
Mask3
RW
RW
RW
RW
0x0
0x0
0x0
0x0
Enable for GPIO2:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Mask2
Mask1
Mask0
Enable for GPIO1:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
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5.4.14. AFG GPIODir
Table 36. AFG GPIODir Command Verb Format
Verb ID
F17
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
717
See bits [7:0] of bitfield table
Table 37. AFG GPIODir Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
Direction control for GPIO3
[3]
[2]
[1]
[0]
Control3
Control2
Control1
Control0
RW
RW
RW
RW
0x0
0x0
0x0
0x0
0= GPIO signal is configured as input
1= GPIO signal is configured as output
Direction control for GPIO2
0= GPIO signal is configured as input
1= GPIO signal is configured as output
Direction control for GPIO1
0= GPIO signal is configured as input
1= GPIO signal is configured as output
Direction control for GPIO0
0= GPIO signal is configured as input
1= GPIO signal is configured as output
5.4.15. AFG GPIOWake
Table 38. AFG GPIOWake Command Verb Format
Verb ID
F18
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
718
See bits [7:0] of bitfield table
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Table 39. AFG GPIOWake Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
Wake enable for GPIO3:
0 = wake-up event is disabled;
[3]
[2]
[1]
[0]
En3
En2
En1
En0
RW
RW
RW
RW
0x0
0x0
0x0
0x0
1= when Azalia link is powered down (RST# is
asserted), a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO2:
0 = wake-up event is disabled;
1= when Azalia link is powered down (RST# is
asserted), a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO1:
0 = wake-up event is disabled;
1= when Azalia link is powered down (RST# is
asserted), a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO0:
0 = wake-up event is disabled;
1= when Azalia link is powered down (RST# is
asserted), a wake-up event will trigger a Status
Change Request event on the link.
5.4.16. AFG GPIOUnsolEn
Table 40. AFG GPIOUnsolEn Command Verb Format
Verb ID
F19
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
719
See bits [7:0] of bitfield table
Table 41. AFG GPIOUnsolEn Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
Unsolicited enable mask for GPIO3. If set, and the
Unsolicited Response control for this widget has been
enabled, an unsolicited response will be sent when
GPIO3 is configured as input and changes state.
[3]
Mask3
RW
0x0
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Table 41. AFG GPIOUnsolEn Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Unsolicited enable mask for GPIO2. If set, and the
Unsolicited Response control for this widget has been
enabled, an unsolicited response will be sent when
GPIO2 is configured as input and changes state.
[2]
Mask2
RW
0x0
Unsolicited enable mask for GPIO1. If set, and the
Unsolicited Response control for this widget has been
enabled, an unsolicited response will be sent when
GPIO1 is configured as input and changes state.
[1]
[0]
Mask1
Mask0
RW
RW
0x0
0x0
Unsolicited enable mask for GPIO0. If set, and the
Unsolicited Response control for this widget has been
enabled, an unsolicited response will be sent when
GPIO0 is configured as input and changes state.
5.4.17. AFG GPIOSticky
Table 42. AFG GPIOSticky Command Verb Format
Verb ID
F1A
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
71A
See bits [7:0] of bitfield table
Table 43. AFG GPIOSticky Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:4]
Rsvd
R
0x0
Reserved
GPIO3 input type (when configured as input):
0= Non-Sticky (level-sensitive);
1= Sticky (edge-sensitive).
[3]
[2]
Mask3
RW
RW
0x0
0x0
Sticky inputs are cleared by writing zero to
corresponding bit of GPIO Data register.
GPIOPolarity determines rising or falling edge
sensitivity.
GPIO2 input type (when configured as input):
0= Non-Sticky (level-sensitive);
1= Sticky (edge-sensitive).
Sticky inputs are cleared by writing zero to
corresponding bit of GPIO Data register.
GPIOPolarity determines rising or falling edge
sensitivity.
Mask2
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Table 43. AFG GPIOSticky Command Response Format
Bit
Bitfield Name
RW
Reset
Description
GPIO1 input type (when configured as input):
0= Non-Sticky (level-sensitive);
1= Sticky (edge-sensitive).
[1]
Mask1
RW
0x0
Sticky inputs are cleared by writing zero to
corresponding bit of GPIO Data register.
GPIOPolarity determines rising or falling edge
sensitivity.
GPIO0 input type (when configured as input):
0= Non-Sticky (level-sensitive);
1= Sticky (edge-sensitive).
[0]
Mask0
RW
0x0
Sticky inputs are cleared by writing zero to
corresponding bit of GPIO Data register.
GPIOPolarity determines rising or falling edge
sensitivity.
5.4.18. AFG SysID
Table 44. AFG SysID Command Verb Format
Verb ID
F20
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
720
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
721
722
723
Table 45. AFG SysID Command Response Format
Bit
Bitfield Name
Subsystem3
Subsystem2
Subsystem1
RW
RW
RW
RW
Reset
0x00
0x00
0x01
Description
[31.:24]
[23.:16]
[15.:8]
Subsystem ID. (Any non-zero value)
Assembly ID. (Not applicable to CODEC
vendors)
[7.:0]
Assembly
RW
0x00
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5.5. DAC0Cnvtr Node (NID = 0x02)
5.5.1.
DAC0Cnvtr Frmt
Table 46. DAC0Cnvtr Frmt Command Verb Format
Verb ID
Payload
0000
Response
Get
A
2
See bitfield table
0000_0000h
Set1
See bits [15:0] of bitfield table
Table 47. DAC0Cnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:16]
Rsvd2
R
0x0
Reserved
Stream Type: only PCM streams are supported
by this widget.
[15]
[14]
StrmType
R
0x0
0x0
Sample Base Rate
0= 48 KHz
1= 44.1 KHz
RateBase
RateMult
RW
Sample Base Rate Multiple
000= 48 KHz / 44.1 KHz or less
001= x2
010= Reserved (x3)
011= x4
[13.:11]
RW
0x0
100-111= Reserved
Sample Base Rate Divisor
000= Divide by 1
001= Divide by 2
010= Divide by 3
011= Divide by 4
100= Divide by 5
101= Divide by 6
110= Divide by 7
111= Divide by 8
[10.:8]
RateDiv
Rsvd1
RW
0x0
0x0
[7]
R
Reserved
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Table 47. DAC0Cnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Bits per Sample
000= 8 bits
001= 16 bits
010= 20 bits
011= 24 bits
[6.:4]
NumBits
RW
0x3
100-111= Reserved
Number of Channels in each frame of the
stream.
0000= 1 channel
0001 = 2 channels
...
[3.:0]
NumChan
RW
0x1
1111= 16 channels
5.5.2.
DAC0Cnvtr WCap
Table 48. DAC0Cnvtr WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 49. DAC0Cnvtr WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x0
0xD
0x0
0x0
0x1
0x0
0x0
0x0
0x0
Description
Reserved
Type
R
Widget type = Audio Output
Delay
R
Number of sample delays through widget
Reserved
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
R
No left/right channel swap capability
Power State control is supported
Widget supports an Analog stream
No connection list is present
[10]
R
[9]
R
[8]
R
[7]
R
No support for Unsolicited Response
No Processing Controls parameter
[6]
R
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Table 49. DAC0Cnvtr WCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
No support for striping
[5]
Stripe
R
0x0
No format info; use default format parameters
from Audio Function node instead
[4]
[3]
FormatOvrd
R
R
0x0
0x0
No amplifier info; use default amplifier
parameters from Audio Function node instead
AmpParamOvrd
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.5.3.
DAC0Cnvtr PwrState
Table 50. DAC0Cnvtr PwrState Command Verb Format
Verb ID
F05
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
705
See bits [7:0] of bitfield table
Table 51. DAC0Cnvtr PwrState Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:8]
[7.:4]
[3.:2]
Reserved
Act
R
0x3
PS-Act: Actual power state of referenced node.
Reserved
Rsvd1
R
0x0
PS-Set: Current power setting of referenced
node.
00 - Fully on.
01 - Fully on.
10 - Fully on.
11 - Powered down.
[1.:0]
Set
RW
0x3
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5.5.4.
DAC0Cnvtr Stream
Table 52. DAC0Cnvtr Stream Command Verb Format
Verb ID
F06
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
706
See bits [7:0] of bitfield table
Table 53. DAC0Cnvtr Stream Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved
Software-programmable integer representing
link stream ID used by the converter widget. By
convention stream 0 is reserved as unused.
[7.:4]
[3.:0]
ID
RW
RW
0x0
0x0
Integer representing lowest channel used by
converter.
Ch
5.6.
ADC0Cnvtr Node (NID = 0x03)
5.6.1.
ADC0Cnvtr Frmt
Table 54. ADC0Cnvtr Frmt Command Verb Format
Verb ID
Payload
0000
Response
See bitfield table
0000_0000h
Get
A
2
Set1
See bits [15:0] of bitfield table
Table 55. ADC0Cnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:16]
Rsvd2
R
0x0
Reserved
Stream Type
0= PCM
[15]
StrmType
RW
0x0
1= Non-PCM
(remaining bits in this verb have other
meanings)
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Table 55. ADC0Cnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Sample Base Rate
[14]
RateBase
RW
0x0
0= 48 KHz
1= 44.1 KHz
Sample Base Rate Multiple
000= 48 KHz / 44.1 KHz or less
001= x2
010= Reserved (x3)
011= x4
[13.:11]
RateMult
RW
0x0
100-111= Reserved
Sample Base Rate Divisor
000= Divide by 1
001= Divide by 2
010= Divide by 3
011= Divide by 4
100= Divide by 5
101= Divide by 6
110= Divide by 7
111= Divide by 8
[10.:8]
RateDiv
RW
0x0
[7]
Rsvd1
R
0x0
0x3
Reserved
Bits per Sample
000= 8 bits
001= 16 bits
[6.:4]
NumBits
RW
010= 20 bits
011= 24 bits
100-111= Reserved
Number of Channels in each frame of the
stream.
0000= 1 channel
0001 = 2 channels
...
[3.:0]
NumChan
RW
0x1
1111= 16 channels
5.6.2.
ADC0Cnvtr WCap
Table 56. ADC0Cnvtr WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
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Table 57. ADC0Cnvtr WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x1
0xD
0x0
0x0
0x1
0x0
0x1
0x0
Description
Reserved
Widget type = Audio Input
Type
R
Delay
R
Number of sample delays through widget
Reserved
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
R
No left/right channel swap capability
Power State control is supported
Widget supports an Analog stream
Connection list is present
[10]
R
[9]
R
[8]
R
[7]
R
No support for Unsolicited Response
Software should query the Processing Controls
parameter for this widget.
[6]
[5]
[4]
ProcWidget
Stripe
R
R
R
0x1
0x0
0x0
No support for striping
No format info; use default format parameters
from Audio Function node instead
FormatOvrd
No amplifier info; use default amplifier
parameters from Audio Function node instead
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.6.3.
ADC0Cnvtr ConnLen
Table 58. ADC0Cnvtr ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
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Table 59. ADC0Cnvtr ConnLen Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved.
Connection list uses short-form (7-bit) NID
entries.
[7]
LongForm
N
R
R
0x0
[6.:0]
0x01
Number of NID entries in connection list.
5.6.4.
ADC0Cnvtr ConnLst
Table 60. ADC0Cnvtr ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 61. ADC0Cnvtr ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x0A
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
ADC Mux widget.
Entry2
R
Entry1
R
Entry0
R
5.6.5.
ADC0Cnvtr ProcState
Table 62. ADC0Cnvtr ProcState Command Verb Format
Verb ID
F03
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
703
See bits [7:0] of bitfield table
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 63. ADC0Cnvtr ProcState Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x0
Reserved
High Pass Filter Offset Calculation Disable
0 = Calculation enabled.
1 = Calculation disabled.
[7]
HPFOffsetDis
Rsvd1
RW
R
0x0
0x0
[6.:2]
Reserved
Processing State = 00 (OFF): bypass the ADC
high pass filter;
Processing State = 01, 10, 11 (ON or BENIGN):
ADC high pass filter is enabled.
[1.:0]
HPFByp
RW
0x1
5.6.6.
ADC0Cnvtr PwrState
Table 64. ADC0Cnvtr PwrState Command Verb Format
Verb ID
F05
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
705
See bits [7:0] of bitfield table
Table 65. ADC0Cnvtr PwrState Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:8]
[7.:4]
[3.:2]
Reserved
Act
R
0x3
PS-Act: Actual power state of referenced node.
Reserved
Rsvd1
R
0x0
PS-Set: Current power setting of referenced
node.
00 - Fully on.
01 - Fully on.
[1.:0]
Set
RW
0x3
10 - Fully on.
11 - Powered down (default powered down)
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PC AUDIO
5.6.7.
ADC0Cnvtr Stream
Table 66. ADC0Cnvtr Stream Command Verb Format
Verb ID
F06
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
706
See bits [7:0] of bitfield table
Table 67. ADC0Cnvtr Stream Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved
Software-programmable integer representing
link stream ID used by the converter widget. By
convention stream 0 is reserved as unused.
[7.:4]
[3.:0]
ID
RW
RW
0x0
0x0
Integer representing lowest channel used by
converter
Ch
5.7. SPDIFinCnvtr Node (NID = 0x04)
5.7.1.
SPDIFinCnvtr Frmt
Table 68. SPDIFinCnvtr Frmt Command Verb Format
Verb ID
Payload
0000
Response
See bitfield table
0000_0000h
Get
A
2
Set1
See bits [15:0] of bitfield table
Table 69. SPDIFinCnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:16]
Rsvd2
R
0x0
Reserved
N/A. (Stream Type)
0= PCM
1= Non-PCM
[15]
[14]
StrmType
RateBase
RW
RW
0x0
0x0
Sample Base Rate
0= 48 KHz
1= 44.1 KHz
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 69. SPDIFinCnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Sample Base Rate Multiple
000= 48 KHz / 44.1 KHz or less
001= x2
[13.:11]
RateMult
RW
0x0
010= Reserved (x3)
011= x4 100-111= Reserved
Sample Base Rate Divisor
000= Divide by 1
001= Divide by 2
010= Divide by 3
011= Divide by 4
100= Divide by 5
101= Divide by 6
110= Divide by 7
111= Divide by 8
[10.:8]
RateDiv
RW
0x0
[7]
Rsvd1
R
0x0
0x3
Reserved
Bits per Sample
000= 8 bits
001= 16 bits
[6.:4]
NumBits
RW
010= 20 bits
011= 24 bits
100-111= Reserved
Number of Channels in each frame of the
stream.
0000= 1 channel
0001 = 2 channels
...
[3.:0]
NumChan
RW
0x1
1111= 16 channels
5.7.2.
SPDIFinCnvtr WCap
Table 70. SPDIFinCnvtr WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 71. SPDIFinCnvtr WCap Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:24]
[23.:20]
Reserved
Type
R
0x1
Widget type = Audio Input
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 71. SPDIFinCnvtr WCap Command Response Format
Bit
[19.:16]
[15.:12]
[11]
[10]
[9]
Bitfield Name
Delay
RW
R
Reset
0x4
0x0
0x0
0x0
0x1
0x1
0x0
0x0
0x0
0x1
Description
Number of sample delays through widget
Reserved
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
R
No left/right channel swap capability
No support for Power State control
Widget supports a Digital stream
Connection list is present
R
R
[8]
R
[7]
R
No support for Unsolicited Response
No Processing Controls parameter
No support for striping
[6]
R
[5]
R
[4]
FormatOvrd
R
Widget contains format info; software should query
No amplifier info; use default amplifier parameters
from Audio Function node instead
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.7.3.
SPDIFinCnvtr FrmtCap
Table 72. SPDIFinCnvtr FrmtCap Command Verb Format
Verb ID
Payload
Response
Get
F00
0A
See bitfield table
Table 73. SPDIFinCnvtr FrmtCap Command Response Format
Bit
[31.:21]
[20]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
32 bit audio formats are NOT supported
B32
R
0x0
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 73. SPDIFinCnvtr FrmtCap Command Response Format
Bit
[19]
[18]
[17]
[16]
[15.:12]
[11]
[10]
[9]
Bitfield Name
B24
B20
B16
B8
RW
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x1
0x1
0x0
0x0
0x0
0x0
0x0
Description
24 bit audio formats are supported
20 bit audio formats are supported
16 bit audio formats are supported
8 bit audio formats are NOT supported
Reserved
Rsvd1
R12
R11
R10
R9
384 KHz rate (8/1*48 KHz) NOT supported
192.0 KHz rate (4/1*48 KHz) NOT supported
176.4 KHz rate (4/1*44.1 KHz) NOT supported
96.0 KHz rate (2/1*48 KHz) supported
88.2 KHz rate (2/1*44.1 KHz) NOT supported
48.0 KHz rate supported (REQUIRED)
44.1 KHz rate supported
[8]
[7]
R8
[6]
R7
[5]
R6
[4]
R5
32.0 KHz rate (2/3*48 KHz) NOT supported
22.05 KHz rate (1/2*44.1 KHz) NOT supported
16.0 KHz rate (1/3*48 KHz) NOT supported
11.025 KHz rate (1/4*44.0 KHz) NOT supported
8.0 KHz rate (1/6*48 KHz) NOT supported
[3]
R4
[2]
R3
[1]
R2
[0]
R1
5.7.4.
SPDIFinCnvtr StreamCap
Table 74. SPDIFinCnvtr StreamCap Command Verb Format
Verb ID
Payload
Response
Get
F00
0B
See bitfield table
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 75. SPDIFinCnvtr StreamCap Command Response Format
Bit
[31.:3]
[2]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved
NonPCM
Float32
PCM
R
0x1
Non-PCM data supported.
No support for Float32 data.
PCM-formatted data supported.
[1]
R
0x0
[0]
R
0x1
5.7.5.
SPDIFinCnvtr ConnLen
Table 76. SPDIFinCnvtr ConnLen Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
0E
Table 77. SPDIFinCnvtr ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved.
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
5.7.6.
SPDIFinCnvtr ConnLst
Table 78. SPDIFinCnvtr ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 79. SPDIFinCnvtr ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
Description
[31.:24]
[23.:16]
Unused list entry.
Unused list entry.
Entry2
R
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PC AUDIO
Table 79. SPDIFinCnvtr ConnLst Command Response Format
Bit
Bitfield Name
Entry1
RW
R
Reset
0x00
0x08
Description
[15.:8]
[7.:0]
Unused list entry.
SPDIF-In Pin widget.
Entry0
R
5.7.7.
SPDIFinCnvtr Stream
Table 80. SPDIFinCnvtr Stream Command Verb Format
Verb ID
F06
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
706
See bits [7:0] of bitfield table
Table 81. SPDIFinCnvtr Stream Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved
Software-programmable integer representing link
stream ID used by the converter widget. By convention
stream 0 is reserved as unused.
[7.:4]
[3.:0]
ID
RW
RW
0x0
0x0
Ch
Integer representing lowest channel used by converter
5.7.8.
SPDIFinCnvtr DigCtl
Table 82. SPDIFinCnvtr DigCtl Command Verb Format
Verb ID
F0D
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
Set2
70D
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
70E
0000_0000h
Table 83. SPDIFinCnvtr DigCtl Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:15]
[14.:8]
Reserved
CC[6:0] - Category Code
CC
R
0x00
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 83. SPDIFinCnvtr DigCtl Command Response Format
Bit
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bitfield Name
L
RW
R
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Description
L - Generation Level
PRO - Professional
/AUDIO - Non-Audio
COPY - Copyright
PRE - Preemphasis
PRO
R
AUDIO
COPY
PRE
R
R
R
Rsvd1
V
R
Reserved (VCFG bit applies only to output streams)
V - Validity
R
DigEn
RW
DigEn - Digital Enable
5.8. SPDIFoutCnvtr Node (NID = 0x05)
5.8.1.
SPDIFoutCnvtr Frmt
Table 84. SPDIFoutCnvtr Frmt Command Verb Format
Verb ID
Payload
0000
Response
See bitfield table
0000_0000h
Get
A
2
Set1
See bits [15:0] of bitfield table
Table 85. SPDIFoutCnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:16]
Rsvd2
R
0x0
Reserved
Stream Type
0= PCM
[15]
[14]
StrmType
RateBase
RW
RW
0x0
0x0
1= Non-PCM
(remaining bits in this verb have other
meanings)
Sample Base Rate
0= 48 KHz
1= 44.1 KHz
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 85. SPDIFoutCnvtr Frmt Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Sample Base Rate Multiple:
000= 48 KHz / 44.1 KHz or less;
001= x2;
010= Reserved (x3);
011= x4;
[13.:11]
RateMult
RW
0x0
100-111= Reserved
Sample Base Rate Divisor
000= Divide by 1
001= Divide by 2
010= Divide by 3
011= Divide by 4
100= Divide by 5
101= Divide by 6
110= Divide by 7
111= Divide by 8
[10.:8]
RateDiv
RW
0x0
[7]
Rsvd1
R
0x0
0x3
Reserved
Bits per Sample
000= 8 bits
001= 16 bits
[6.:4]
NumBits
RW
010= 20 bits
011= 24 bits
100-111= Reserved
Number of Channels in each frame of the
stream.
0000= 1 channel
0001 = 2 channels
...
[3.:0]
NumChan
RW
0x1
1111= 16 channels
5.8.2.
SPDIFoutCnvtr WCap
Table 86. SPDIFoutCnvtr WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
54
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 87. SPDIFoutCnvtr WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x0
0x4
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x0
Description
Reserved
Widget type = Audio Output
Type
R
Delay
R
Number of sample delays through widget
Reserved
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
R
No left/right channel swap capability
No support for Power State control
Widget supports a Digital stream
No connection list is present
No support for Unsolicited Response
No Processing Controls parameter
No support for striping
[10]
R
[9]
R
[8]
R
[7]
R
[6]
R
[5]
R
Widget contains format info; software should
query
[4]
[3]
FormatOvrd
R
R
0x1
0x0
No amplifier info; use default amplifier parameters
from Audio Function node instead
AmpParamOvrd
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.8.3.
SPDIFoutCnvtr FrmtCap
Table 88. SPDIFoutCnvtr FrmtCap Command Verb Format
Verb ID
Payload
Response
Get
F00
0A
See bitfield table
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
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V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 89. SPDIFoutCnvtr FrmtCap Command Response Format
Bit
[31.:21]
[20]
[19]
[18]
[17]
[16]
[15.:12]
[11]
[10]
[9]
Bitfield Name
Rsvd2
B32
B24
B20
B16
B8
RW
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x0
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
Description
Reserved
32 bit audio formats are NOT supported
24 bit audio formats are supported
20 bit audio formats are supported
16 bit audio formats are supported
8 bit audio formats are NOT supported
Reserved
Rsvd1
R12
R11
R10
R9
384 KHz rate (8/1*48 KHz) NOT supported
192.0 KHz rate (4/1*48 KHz) NOT supported
176.4 KHz rate (4/1*44.1 KHz) NOT supported
96.0 KHz rate (2/1*48 KHz) supported
88.2 KHz rate (2/1*44.1 KHz) supported
48.0 KHz rate supported (REQUIRED)
44.1 KHz rate supported
[8]
[7]
R8
[6]
R7
[5]
R6
[4]
R5
32.0 KHz rate (2/3*48 KHz) NOT supported
22.05 KHz rate (1/2*44.1 KHz) NOT supported
16.0 KHz rate (1/3*48 KHz) NOT supported
11.025 KHz rate (1/4*44.0 KHz) NOT supported
8.0 KHz rate (1/6*48 KHz) NOT supported
[3]
R4
[2]
R3
[1]
R2
[0]
R1
5.8.4.
SPDIFoutCnvtr StreamCap
Table 90. SPDIFoutCnvtr StreamCap Command Verb Format
Verb ID
Payload
Response
Get
F00
0B
See bitfield table
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
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V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 91. SPDIFoutCnvtr StreamCap Command Response Format
Bit
[31.:3]
[2]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved
NonPCM
Float32
PCM
R
0x1
Non-PCM data supported.
No support for Float32 data.
PCM-formatted data supported.
[1]
R
0x0
[0]
R
0x1
5.8.5.
SPDIFoutCnvtr Stream
Table 92. SPDIFoutCnvtr Stream Command Verb Format
Verb ID
F06
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
706
See bits [7:0] of bitfield table
Table 93. SPDIFoutCnvtr Stream Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved
Software-programmable integer representing
link stream ID used by the converter widget. By
convention stream 0 is reserved as unused.
[7.:4]
[3.:0]
ID
RW
RW
0x0
0x0
Integer representing lowest channel used by
converter
Ch
5.8.6.
SPDIFoutCnvtr DigCtl
Table 94. SPDIFoutCnvtr DigCtl Command Verb Format
Verb ID
F0D
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
Set2
70D
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
70E
0000_0000h
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
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STAC9200/9200D
V 1.4 12/06
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 95. SPDIFoutCnvtr DigCtl Command Response Format
Bit
[31.:16]
[15]
[14.:8]
[7]
Bitfield Name
Rsvd2
Rsvd1
CC
RW
R
Reset
0x0
0x0
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Description
Reserved
Reserved
R
RW
RW
RW
RW
RW
RW
RW
RW
RW
CC[6:0] - Category Code
L - Generation Level
PRO - Professional
/AUDIO - Non-Audio
COPY - Copyright
PRE - Preemphasis
VCFG - Validity Config
V - Validity
L
[6]
PRO
[5]
AUDIO
COPY
PRE
[4]
[3]
[2]
VCFG
V
[1]
[0]
DigEn
DigEn - Digital Enable
5.9.
DAC0Mux Node (NID = 0x07)
5.9.1.
DAC0Mux WCap
Table 96. DAC0Mux WCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
09
Table 97. DAC0Mux WCap Command Response Format
Bit
Bitfield Name
RW
R
Reset
0x0
Description
[31.:24]
[23.:20]
[19.:16]
[15.:12]
Rsvd2
Type
Reserved
R
0x3
Widget type = Audio Selector
Number of sample delays through widget
Reserved
Delay
Rsvd1
R
0x0
R
0x0
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 97. DAC0Mux WCap Command Response Format
Bit
[11]
[10]
[9]
Bitfield Name
SwapCap
PwrCntrl
RW
R
Reset
0x1
0x0
0x0
0x1
0x0
0x0
0x0
Description
Left and right channels can be swapped
No support for Power State control
Widget supports an Analog stream
Connection list is present
R
DigitalStrm
ConnList
R
[8]
R
[7]
UnsolCap
ProcWidget
Stripe
R
No support for Unsolicited Response
No Processing Controls parameter.
No support for striping
[6]
R
[5]
R
No format info; use default format parameters
from Audio Function node instead
[4]
[3]
FormatOvrd
R
R
0x0
0x0
No amplifier info; use default amplifier
parameters from Audio Function node instead
AmpParamOvrd
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.9.2.
DAC0Mux ConnLen
Table 98. DAC0Mux ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
Table 99. DAC0Mux ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved.
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x03
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5.9.3.
DAC0Mux ConnSel
Table 100. DAC0Mux ConnSel Command Verb Format
Verb ID
F01
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
701
See bits [7:0] of bitfield table
Table 101. DAC0Mux ConnSel Command Response Format
Bit
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
[31.:2]
[1.:0]
Reserved
Connection select control index.
Index
RW
0x0
5.9.4.
DAC0Mux ConnLst
Table 102. DAC0Mux ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 103. DAC0Mux ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x0A
0x08
0x02
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
ADC Mux widget.
Entry2
R
Entry1
R
SPDIF-In Pin widget.
DAC Analog converter widget.
Entry0
R
5.9.5.
DAC0Mux LR
Table 104. DAC0Mux LR Command Verb Format
Verb ID
F0C
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
70C
See bits [7:0] of bitfield table
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Table 105. DAC0Mux LR Command Response Format
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
SwapEn
Rsvd1
RW
R
0x0
1= swap left and right channels of this Widget.
Reserved
[1.:0]
0x0
5.10. DigInPin Node (NID = 0x08)
5.10.1. DigInPin WCap
Table 106. DigInPin WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 107. DigInPin WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x4
0x3
0x0
0x0
0x1
0x1
0x0
0x1
0x0
0x0
0x0
Description
Reserved
Type
Widget type = Pin Complex
Number of sample delays through widget
Reserved
Delay
Rsvd1
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
No left/right channel swap capability
Power State control is supported
Widget supports a Digital stream
No connection list is present
Unsolicited Response is supported
No Processing Controls parameter
No support for striping
[10]
[9]
[8]
[7]
[6]
[5]
[4]
FormatOvrd
N/A for pin complex
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Table 107. DigInPin WCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
No amplifier info; use default amplifier
parameters from Audio Function node instead
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.10.2. DigInPin Cap
Table 108. DigInPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
Table 109. DigInPin Cap Command Response Format
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
0x0
Description
Rsvd2
EapdCap
VRefCntrl
Rsvd1
Reserved
R
0x1
This widget controls EAPD pin
VRef generation not supported by this pin complex.
Reserved
[15.:8]
[7]
R
0x00
0x0
R
[6]
BalancedIO
InCap
R
0x0
Pin complex does not have balanced pins.
Pin complex is input capable.
[5]
R
0x1
Pin complex is not output capable.
(EAPD not equal to output stream)
[4]
OutCap
R
0x0
[3]
[2]
[1]
[0]
HPhnDrvCap
PresDtctCap
TrigRqd
R
R
R
R
0x0
0x1
0x0
0x0
Pin does not have a headphone amplifier.
Pin complex can perform Presence Detect.
N/A
ImpSenseCap
Pin complex does not support impedance sense.
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5.10.3. DigInPin PwrState
Table 110. DigInPin PwrState Command Verb Format
Verb ID
F05
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
705
See bits [7:0] of bitfield table
Table 111. DigInPin PwrState Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:8]
[7.:4]
[3.:2]
Reserved
Act
R
0x3
PS-Act: Actual power state of referenced node.
Reserved
Rsvd1
R
0x0
PS-Set: Current power setting of referenced
node.
00 - Fully on.
01 - Fully on.
[1.:0]
Set
RW
0x3
10 - Fully on.
11 - Powered down (default powered down)
5.10.4. DigInPin Ctl
Table 112. DigInPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
707
See bits [7:0] of bitfield table
Table 113. DigInPin Ctl Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:6]
Rsvd2
R
0x0
Reserved
1= (CODEC) input path of Pin Widget is
enabled
[5]
InEn
RW
R
0x0
0x0
[4.:0]
Rsvd1
Reserved
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5.10.5. DigInPin UnsolResp
Table 114. DigInPin UnsolResp Command Verb Format
Verb ID
F08
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
708
See bits [7:0] of bitfield table
Table 115. DigInPin UnsolResp Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x00
Reserved
Allow generation of Unsolicited Responses.
Unsolicited response events occur upon lock or
loss-of-lock by SPDIF-in clock recovery circuit.
[7]
[6]
En
Rsvd1
Tag
RW
R
0x0
0x0
Reserved.
Software programmable field returned in top six
bits (31:26) of every Unsolicited Response
generated by this node.
[5.:0]
RW
0x00
5.10.6. DigInPin Sense
Table 116. DigInPin Sense Command Verb Format
Verb ID
F09
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
Set2
709
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
709
0000_0000h
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Table 117. DigInPin Sense Command Response Format
Bit
Bitfield Name
RW
Reset
Description
1= something is plugged into jack associated
with Pin Complex. For this widget, Presence
Detect indicates that the SPDIF-in clock
recovery circuit has locked onto a valid
SPDIF-in sampling frequency. Any change in
status will generate an Unsolicited Response, if
enabled with verb 708.
[31]
Present
R
0x0
Reserved. Impedance sense not supported for
this Pin Complex.
[30.:0]
Rsvd
R
0x0
5.10.7. DigInPin EAPD
Table 118. DigInPin EAPD Command Verb Format
Verb ID
F0C
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
70C
See bits [7:0] of bitfield table
Table 119. DigInPin EAPD Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:2]
Rsvd2
Data
R
0x0
Reserved
EAPD value reflected on the EAPD pin.
0= power down external amp;
1= power up external amp if PwrState < 0x2.
If PwrState >= 0x2, Pin47 is Hi-Z. An external
pull-down is required if EAPD must be low
when Pin Widget is powered down.
[1]
[0]
RW
R
0x0
0x0
Rsvd1
Reserved
5.10.8. DigInPin Config
Table 120. DigInPin Config Command Verb Format
Verb ID
F1C
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
71C
See bits [7:0] of bitfield table
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Table 120. DigInPin Config Command Verb Format
Verb ID
71D
Payload
Response
Set2
Set3
Set4
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
0000_0000h
0000_0000h
0000_0000h
71E
71F
Table 121. DigInPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
External Port Connectivity of the Pin Complex.
0 = Port Complex is connected to a jack
[31.:30]
Port
RW
0x0
Physical location of the jack. Optical jack at
mainboard rear.
[29.:24]
[23.:20]
Location
Device
RW
RW
0x01
0xC
Default Device, indicating intended use of jack.
C = SPDIF In
[19.:16]
[15.:12]
[11.:8]
Connection
Color
RW
RW
RW
0x5
0xE
0x0
Connection Type. 5 = optical
Color of physical jack. E = White
Misc[0] == Jack Detect override.
Misc
Default Association for Pin Complex groups.
Reserved value 0000b should not be used.
Value 1111b indicates lowest priority.
[7.:4]
[3.:0]
Assoc
RW
RW
0x3
0x0
All Widgets in an association must have unique
sequence number.
Sequence
5.11. DigOutPin Node (NID = 0x09)
5.11.1. DigOutPin WCap
Table 122. DigOutPin WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
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Table 123. DigOutPin WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x4
0x0
0x0
0x0
0x0
0x1
0x1
0x0
0x0
0x0
0x0
Description
Reserved
Widget type = Pin Complex
Type
Delay
Number of sample delays through widget
Reserved
Rsvd1
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
No left/right channel swap capability
No support for Power State control
Widget supports a Digital stream
Connection list is present
[10]
[9]
[8]
[7]
No support for Unsolicited Response
No Processing Controls parameter
No support for striping
[6]
[5]
[4]
FormatOvrd
N/A for pin complex
No amplifier info; use default amplifier
parameters from Audio Function node instead
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.11.2. DigOutPin Cap
Table 124. DigOutPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
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Table 125. DigOutPin Cap Command Response Format
Bit
[31.:17]
[16]
[15.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x0
0x00
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x0
Description
Reserved
This widget does not control EAPD pin
EapdCap
VRefCntrl
Rsvd1
R
R
VRef generation N/A since pin complex is not input capable.
Reserved
R
[6]
BalancedIO
InCap
R
Pin complex does not have balanced pins.
Pin complex is not input capable.
Pin complex is output capable.
[5]
R
[4]
OutCap
R
[3]
HPhnDrvCap
PresDtctCap
TrigRqd
R
Pin does not have a headphone amplifier.
Pin complex cannot perform Presence Detect.
N/A
[2]
R
[1]
R
[0]
ImpSenseCap
R
Pin complex does not support impedance sense.
5.11.3. DigOutPin ConnLen
Table 126. DigOutPin ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
Table 127. DigOutPin ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved.
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x02
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5.11.4. DigOutPin ConnSel
Table 128. DigOutPin ConnSel Command Verb Format
Verb ID
F01
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
701
See bits [7:0] of bitfield table
Table 129. DigOutPin ConnSel Command Response Format
Bit
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
[31.:2]
[1.:0]
Reserved
Connection select control index.
Index
RW
0x0
5.11.5. DigOutPin ConnLst
Table 130. DigOutPin ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 131. DigOutPin ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x0A
0x05
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
ADC Mux widget.
Entry2
R
Entry1
R
Entry0
R
SPDIF Out converter widget.
5.11.6. DigOutPin Ctl
Table 132. DigOutPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
707
See bits [7:0] of bitfield table
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Table 133. DigOutPin Ctl Command Response Format
Bit
[31.:7]
[6]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
OutEn
RW
R
0x0
1= (CODEC) output path of Pin Widget is enabled
Reserved
[5.:0]
Rsvd1
0x0
5.11.7. DigOutPin Config
Table 134. DigOutPin Config Command Verb Format
Verb ID
F1C
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
Table 135. DigOutPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
External Port Connectivity of the Pin Complex.
0 = Port Complex is connected to a jack
[31.:30]
Port
RW
0x0
Physical location of the jack. Optical jack at
mainboard rear.
[29.:24]
[23.:20]
Location
Device
RW
RW
0x01
0x4
Default Device, indicating intended use of jack.
4 = SPDIF Out
[19.:16]
[15.:12]
[11.:8]
Connection
Color
RW
RW
RW
0x5
0x1
0x0
Connection Type. 5 = optical
Color of physical jack. 1 = Black
Misc[0] == Jack Detect override.
Misc
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Table 135. DigOutPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Default Association for Pin Complex groups.
Reserved value 0000b should not be used.
Value 1111b indicates lowest priority.
[7.:4]
Assoc
RW
0x1
All Widgets in an association must have unique
sequence number.
[3.:0]
Sequence
RW
0x2
5.12. ADC0Mux Node (NID = 0x0A)
5.12.1. ADC0Mux VolRight
Table 136. ADC0Mux VolRight Command Verb Format
Verb ID
B80
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
390
See bits [7:0] of bitfield table
Table 137. ADC0Mux VolRight Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
Mute
RW
R
0x1
1= mute is active
Reserved
[6.:4]
[3.:0]
Rsvd1
0x0
Gain
RW
0x0
Amplifier gain step number
5.12.2. ADC0Mux VolLeft
Table 138. ADC0Mux VolLeft Command Verb Format
Verb ID
BA0
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
3A0
See bits [7:0] of bitfield table
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Table 139. ADC0Mux VolLeft Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
Mute
RW
R
0x1
1= mute is active
Reserved
[6.:4]
[3.:0]
Rsvd1
0x0
Gain
RW
0x0
Amplifier gain step number
5.12.3. ADC0Mux WCap
Table 140. ADC0Mux WCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
09
Table 141. ADC0Mux WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
RW
R
Reset
0x0
0x3
0x0
0x0
0x1
0x0
0x0
0x1
0x0
0x0
0x0
Description
Rsvd2
Type
Reserved
Widget type = Audio Selector
R
Delay
R
Number of sample delays through widget
Reserved
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
R
Left and right channels can be swapped
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
R
[9]
R
[8]
R
[7]
R
No support for Unsolicited Response
No Processing Controls parameter.
No support for striping
[6]
R
[5]
R
No format info; use default format parameters from
Audio Function node instead
[4]
FormatOvrd
R
0x0
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Table 141. ADC0Mux WCap Command Response Format
Bit
[3]
[2]
[1]
[0]
Bitfield Name
AmpParamOvrd
OutAmpPrsnt
InAmpPrsnt
Stereo
RW
R
Reset
0x1
Description
This widget contains its own amplifier parameters.
Output amp is present
R
0x1
R
0x0
No input amp
R
0x1
Stereo widget
5.12.4. ADC0Mux OutAmpCap
Table 142. ADC0Mux OutAmpCap Command Verb Format
Verb ID
Payload
Response
Get
F00
12
See bitfield table
Table 143. ADC0Mux OutAmpCap Command Response Format
Bit
[31]
Bitfield Name
Mute
RW
R
Reset
0x1
Description
Amplifier is capable of muting
Reserved
[30.:23]
[22.:16]
[15]
Rsvd3
R
0x0
StepSize
Rsvd2
R
0x05
0x0
Size of each step in the gain range = 1.5dB
Reserved
R
[14.:8]
[7]
NumSteps
Rsvd1
R
0x0F
0x0
Number of steps in the gain range = 16 (0dB to +22.5dB)
Reserved
R
[6.:0]
Offset
R
0x00
0dB-step is programmed with this offset
5.12.5. ADC0Mux ConnLen
Table 144. ADC0Mux ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
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Table 145. ADC0Mux ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
5.12.6. ADC0Mux ConnLst
Table 146. ADC0Mux ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 147. ADC0Mux ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x0C
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
Entry2
R
Entry1
R
Entry0
R
Input Port (UnivJack) Mux widget.
5.12.7. ADC0Mux LR
Table 148. ADC0Mux LR Command Verb Format
Verb ID
F0C
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
70C
See bits [7:0] of bitfield table
Table 149. ADC0Mux LR Command Response Format
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:3]
R
0x0
Reserved
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Table 149. ADC0Mux LR Command Response Format
Bit
[2]
Bitfield Name
SwapEn
RW
RW
R
Reset
0x0
Description
1= swap left and right channels of this Widget.
Reserved
[1.:0]
Rsvd1
0x0
5.13. MasterVol Node (NID = 0x0B)
5.13.1. MasterVol Right
Table 150. MasterVol Right Command Verb Format
Verb ID
B80
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
390
See bits [7:0] of bitfield table
Table 151. MasterVol Right Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
Mute
RW
R
0x1
1= mute is active
Reserved
[6.:5]
[4.:0]
Rsvd1
0x0
Gain
RW
0x1F
Amplifier gain step number
5.13.2. MasterVol Left
Table 152. MasterVol Left Command Verb Format
Verb ID
BA0
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
3A0
See bits [7:0] of bitfield table
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Table 153. MasterVol Left Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
Mute
RW
R
0x1
1= mute is active
Reserved
[6.:5]
[4.:0]
Rsvd1
0x0
Gain
RW
0x1F
Amplifier gain step number
5.13.3. MasterVol WCap
Table 154. MasterVol WCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
09
Table 155. MasterVol WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
RW
R
Reset
0x0
0x3
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x0
0x0
Description
Rsvd2
Type
Reserved
R
Widget type = Audio Selector
Number of sample delays through widget
Reserved
Delay
R
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
R
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
R
[9]
R
[8]
R
[7]
R
No support for Unsolicited Response
No Processing Controls parameter.
No support for striping
[6]
R
[5]
R
No format info; use default format parameters
from Audio Function node instead
[4]
FormatOvrd
R
0x0
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Table 155. MasterVol WCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
No amplifier info; use default amplifier
parameters from Audio Function node instead
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x1
0x0
0x1
Output amp is present
No input amp
Stereo widget
5.13.4. MasterVol ConnLen
Table 156. MasterVol ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
Table 157. MasterVol ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
5.13.5. MasterVol ConnLst
Table 158. MasterVol ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 159. MasterVol ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
Description
[31.:24]
[23.:16]
Unused list entry.
Unused list entry.
Entry2
R
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Table 159. MasterVol ConnLst Command Response Format
Bit
Bitfield Name
Entry1
RW
R
Reset
0x00
0x07
Description
[15.:8]
[7.:0]
Unused list entry.
DAC Mux widget.
Entry0
R
5.14. InPortMux Node (NID = 0x0C)
5.14.1. InPortMux VolRight
Table 160. InPortMux VolRight Command Verb Format
Verb ID
B80
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
390
See bits [7:0] of bitfield table
Table 161. InPortMux VolRight Command Response Format
Bit
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
[31.:3]
[2.:0]
Reserved
Amplifier gain step number
Gain
RW
0x0
5.14.2. InPortMux VolLeft
Table 162. InPortMux VolLeft Command Verb Format
Verb ID
BA0
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
3A0
See bits [7:0] of bitfield table
Table 163. InPortMux VolLeft Command Response Format
Bit
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
[31.:3]
[2.:0]
Reserved
Gain
RW
0x0
Amplifier gain step number
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5.14.3. InPortMux WCap
Table 164. InPortMux WCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
09
Table 165. InPortMux WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x3
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x0
0x0
Description
Reserved
Type
R
Widget type = Audio Selector
Number of sample delays through widget
Reserved
Delay
R
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
R
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
R
[9]
R
[8]
R
[7]
R
No support for Unsolicited Response
No Processing Controls parameter.
No support for striping
[6]
R
[5]
R
No format info; use default format parameters from
Audio Function node instead
[4]
FormatOvrd
R
0x0
[3]
[2]
[1]
[0]
AmpParamOvrd
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
R
0x1
0x1
0x0
0x1
This widget contains its own amplifier parameters.
Output amp is present
No input amp
Stereo widget
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5.14.4. InPortMux ConnLen
Table 166. InPortMux ConnLen Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
0E
Table 167. InPortMux ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x05
5.14.5. InPortMux AmpCap
Table 168. InPortMux AmpCap Command Verb Format
Verb ID
Payload
Response
Get
F00
12
See bitfield table
Table 169. InPortMux AmpCap Command Response Format
Bit
[31]
Bitfield Name
Mute
RW
R
Reset
0x0
Description
No mute capability
Reserved
[30.:23]
[22.:16]
[15]
Rsvd3
R
0x0
StepSize
Rsvd2
R
0x27
0x0
Size of each step in the gain range = 10dB
Reserved
R
[14.:8]
[7]
NumSteps
Rsvd1
R
0x04
0x0
Number of steps in the gain range = 5 (0dB to +40dB)
Reserved
R
[6.:0]
Offset
R
0x00
0dB-step is programmed with this offset
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5.14.6. InPortMux ConnSel
Table 170. InPortMux ConnSel Command Verb Format
Verb ID
F01
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
701
See bits [7:0] of bitfield table
Table 171. InPortMux ConnSel Command Response Format
Bit
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
[31.:3]
[2.:0]
Reserved
Connection select control index.
Index
RW
0x0
5.14.7. InPortMux ConnLst0
Table 172. InPortMux ConnLst0 Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 173. InPortMux ConnLst0 Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x0D
0x0E
0x0F
0x10
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Port A pin widget.
Port D pin widget.
Port C pin widget.
Port B pin widget.
Entry2
R
Entry1
R
Entry0
R
5.14.8. InPortMux ConnLst4
Table 174. InPortMux ConnLst4 Command Verb Format
Verb ID
Payload
Response
Get
F02
04
See bitfield table
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Table 175. InPortMux ConnLst4 Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x12
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
CDin pin widget.
Entry2
R
Entry1
R
Entry0
R
5.15. PortAPin Node (NID = 0x0D)
5.15.1. PortAPin WCap
Table 176. PortAPin WCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
09
Table 177. PortAPin WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x4
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x0
0x0
Description
Reserved
Type
R
Widget type = Pin Complex
Number of sample delays through widget
Reserved
Delay
R
Rsvd1
R
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
R
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
R
[9]
R
[8]
R
[7]
R
Unsolicited Response is supported
No Processing Controls parameter
No support for striping
[6]
R
[5]
R
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Table 177. PortAPin WCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
N/A for pin complex
[4]
FormatOvrd
R
0x0
No amplifier info; use default amplifier
parameters from Audio Function node instead.
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.15.2. PortAPin Cap
Table 178. PortAPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
Table 179. PortAPin Cap Command Response Format
Bit
[31.:17]
[16]
[15.:8]
[7]
Bitfield Name
RW
R
Reset
0x0
0x0
0x00
0x0
0x0
0x1
0x1
0x1
0x1
0x1
0x1
Description
Rsvd2
EapdCap
VRefCntrl
Rsvd1
Reserved
R
This widget does not control EAPD pin
VRef generation not supported by this pin complex.
Reserved
R
R
[6]
BalancedIO
InCap
R
Pin complex does not have balanced pins.
Pin complex is input capable.
[5]
R
[4]
OutCap
R
Pin complex is output capable.
[3]
HPhnDrvCap
PresDtctCap
TrigRqd
R
Pin complex has headphone amplifier.
Pin complex can perform Presence Detect.
Trigger is required for impedance measurement
Pin complex supports impedance sense.
[2]
R
[1]
R
[0]
ImpSenseCap
R
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5.15.3. PortAPin ConnLen
Table 180. PortAPin ConnLen Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
0E
Table 181. PortAPin ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved.
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
5.15.4. PortAPin ConnLst
Table 182. PortAPin ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 183. PortAPin ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x0B
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
Entry2
R
Entry1
R
Entry0
R
Master Volume widget.
5.15.5. PortAPin Ctl
Table 184. PortAPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
707
See bits [7:0] of bitfield table
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Table 185. PortAPin Ctl Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x0
Reserved
1= enable the low impedance amplifier associated
with the output
[7]
HPhnEn
RW
0x0
[6]
[5]
OutEn
InEn
RW
RW
R
0x0
0x0
0x0
1= (CODEC) output path of Pin Widget is enabled
1= (CODEC) input path of Pin Widget is enabled
Reserved
[4.:0]
Rsvd1
5.15.6. PortAPin UnsolResp
Table 186. PortAPin UnsolResp Command Verb Format
Verb ID
F08
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
708
See bits [7:0] of bitfield table
Table 187. PortAPin UnsolResp Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x00
Reserved
Allow generation of Unsolicited Responses.
Unsolicited response events occur upon
jack-insertion OR completion of a Jack-Sense
cycle.
[7]
En
RW
0x0
[6]
Rsvd1
Tag
R
0x0
Reserved
Software programmable field returned in top six
bits (31:26) of every Unsolicited Response
generated by this node.
[5.:0]
RW
0x00
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5.15.7. PortAPin Sense
Table 188. PortAPin Sense Command Verb Format
Verb ID
F09
Payload
00
Response
Get
Set1
Set2
See bitfield table
0000_0000h
709
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
709
0000_0000h
Table 189. PortAPin Sense Command Response Format
Bit
Bitfield Name
RW
Reset
Description
1= something is plugged into jack associated
with Pin Complex.
[31]
Present
R
0x0
Measured impedance of the widget. A value of
all 1's indicates that a valid sense reading is not
available, or the sense measurement is busy if
it has been recently triggered. Overlaps
RightCh.
[30.:0]
Impedance
R
0x7FFF_FFFF
Set 1= perform impedance sensing on right
channel or ring of the connector
[0]
[0]
RightCh
LeftCh
W
W
0x0
0x0
Set 0= perform impedance sensing on left
channel or tip of the connector
5.15.8. PortAPin Config
Table 190. PortAPin Config Command Verb Format
Verb ID
F1C
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
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Table 191. PortAPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
External Port Connectivity of the Pin Complex. 0 = Port
Complex is connected to a jack
[31.:30]
Port
RW
0x0
[29.:24]
[23.:20]
[19.:16]
[15.:12]
[11.:8]
Location
Device
RW
RW
RW
RW
RW
0x02
0x2
0x1
0x4
0x0
Physical location of the jack. 02h = Mainboard, Front
Default Device, indicating intended use of jack. 2 = HP Out
Connection Type. 1 = 1/8 inch jack
Connection
Color
Color of physical jack. 4 = Green
Misc
Misc[0] = Jack Detect override.
Default Association for Pin Complex groups. Reserved
value 0000b should not be used. Value 1111b indicates
lowest priority.
[7.:4]
[3.:0]
Assoc
RW
RW
0x1
0x1
All Widgets in an association must have unique sequence
number.
Sequence
5.16. PortDPin Node (NID = 0x0E)
5.16.1. PortDPin WCap
Table 192. PortDPin WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 193. PortDPin WCap Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Reserved
Type
R
0x4
Widget type = Pin Complex
Number of sample delays through widget
Reserved
Delay
R
0x0
Rsvd1
R
0x0
SwapCap
R
0x0
No left/right channel swap capability
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Table 193. PortDPin WCap Command Response Format
Bit
[10]
[9]
Bitfield Name
PwrCntrl
RW
R
Reset
0x0
0x0
0x1
0x1
0x0
0x0
0x0
Description
No support for Power State control
Widget supports an Analog stream
Connection list is present
DigitalStrm
ConnList
R
[8]
R
[7]
UnsolCap
ProcWidget
Stripe
R
Unsolicited Response is supported
No Processing Controls parameter
No support for striping
[6]
R
[5]
R
[4]
FormatOvrd
R
N/A for pin complex
No amplifier info; use default amplifier
parameters from Audio Function node instead.
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.16.2. PortDPin Cap
Table 194. PortDPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
Table 195. PortDPin Cap Command Response Format
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
0x0
Description
Rsvd2
EapdCap
VRefCntrl
Rsvd1
Reserved2
R
0x0
This widget does not control EAPD pin
VRef generation not supported by this pin complex.
Reserved
[15.:8]
[7]
R
0x00
0x0
R
[6]
BalancedIO
R
0x0
Pin complex does not have balanced pins.
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Table 195. PortDPin Cap Command Response Format
Bit
[5]
[4]
[3]
[2]
[1]
[0]
Bitfield Name
InCap
RW
R
Reset
0x1
0x1
0x1
0x1
0x1
0x1
Description
Pin complex is input capable.
OutCap
R
Pin complex is output capable.
Pin complex has headphone amplifier.
HPhnDrvCap
PresDtctCap
TrigRqd
R
R
Pin complex can perform Presence Detect.
Trigger is required for impedance measurement
Pin complex supports impedance sense.
R
ImpSenseCap
R
5.16.3. PortDPin ConnLen
Table 196. PortDPin ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
Table 197. PortDPin ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved.
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
5.16.4. PortDPin ConnLst
Table 198. PortDPin ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
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Table 199. PortDPin ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x0B
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
Entry2
R
Entry1
R
Entry0
R
Master Volume widget.
5.16.5. PortDPin Ctl
Table 200. PortDPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
707
See bits [7:0] of bitfield table
Table 201. PortDPin Ctl Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x0
Reserved
1= enable the low impedance amplifier
associated with the output
[7]
[6]
HPhnEn
RW
RW
0x0
0x0
1= (CODEC) output path of Pin Widget is
enabled
OutEn
1= (CODEC) input path of Pin Widget is
enabled
[5]
InEn
RW
R
0x0
0x0
[4.:0]
Rsvd1
Reserved
5.16.6. PortDPin UnsolResp
Table 202. PortDPin UnsolResp Command Verb Format
Verb ID
F08
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
708
See bits [7:0] of bitfield table
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Table 203. PortDPin UnsolResp Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x00
Reserved
Allow generation of Unsolicited Responses. Unsolicited
response events occur upon jack-insertion OR completion
of a Jack-Sense cycle.
[7]
En
RW
0x0
[6]
Rsvd1
Tag
R
0x0
Reserved
Software programmable field returned in top six bits (31:26)
of every Unsolicited Response generated by this node.
[5.:0]
RW
0x00
5.16.7. PortDPin Sense
Table 204. PortDPin Sense Command Verb Format
Verb ID
F09
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
Set2
709
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
709
0000_0000h
Table 205. PortDPin Sense Command Response Format
Bit
Bitfield Name
RW
Reset
Description
1= something is plugged into jack associated
with Pin Complex.
[31]
Present
R
0x0
Measured impedance of the widget. A value of
all 1's indicates that a valid sense reading is not
available, or the sense measurement is busy if
it has been recently triggered. Overlaps
RightCh.
[30.:0]
Impedance
R
0x7FFF_FFFF
Set 1= perform impedance sensing on right
channel or ring of the connector
[0]
[0]
RightCh
LeftCh
W
W
0x0
0x0
Set 0= perform impedance sensing on left
channel or tip of the connector
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5.16.8. PortDPin Config
Table 206. PortDPin Config Command Verb Format
Verb ID
F1C
Payload
Response
Get
Set1
Set2
Set3
Set4
00
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
Table 207. PortDPin Config Command Response Format
Bit
Bitfield Name
Port
RW
RW
RW
RW
Reset
0x0
Description
External Port Connectivity of the Pin Complex.
0 = Port Complex is connected to a jack
[31.:30]
[29.:24]
[23.:20]
Location
Device
0x01
0x0
Physical location of the jack. 01h = Mainboard, Rear
Default Device, indicating intended use of jack.
0 = Line Out
[19.:16]
[15.:12]
[11.:8]
Connection
Color
RW
RW
RW
0x1
0x4
0x0
Connection Type. 1 = 1/8 inch jack
Color of physical jack. 4 = Green
Misc[0] = Jack Detect override.
Misc
Default Association for Pin Complex groups.
Reserved value 0000b should not be used. Value
1111b indicates lowest priority.
[7.:4]
[3.:0]
Assoc
RW
RW
0x1
0x0
All Widgets in an association must have unique
sequence number.
Sequence
5.17. PortCPin Node (NID = 0x0F)
5.17.1. PortCPin WCap
Table 208. PortCPin WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
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Table 209. PortCPin WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x4
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x0
0x0
0x0
Description
Reserved
Widget type = Pin Complex
Type
Delay
Number of sample delays through widget
Reserved
Rsvd1
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
[9]
[8]
[7]
Unsolicited Response is supported
No Processing Controls parameter
No support for striping
[6]
[5]
[4]
FormatOvrd
N/A for pin complex
No amplifier info; use default amplifier
parameters from Audio Function node instead.
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.17.2. PortCPin Cap
Table 210. PortCPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
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PC AUDIO
Table 211. PortCPin Cap Command Response Format
Bit
[31.:17]
[16]
[15.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
0x0
0x00
0x0
0x0
0x1
0x1
0x0
0x1
0x1
0x1
Description
Reserved2
This widget does not control EAPD pin
EapdCap
VRefCntrl
Rsvd1
R
R
VRef generation not supported by this pin complex.
Reserved
R
[6]
BalancedIO
InCap
R
Pin complex does not have balanced pins.
Pin complex is input capable.
[5]
R
[4]
OutCap
R
Pin complex is output capable.
[3]
HPhnDrvCap
PresDtctCap
TrigRqd
R
Pin does not have a headphone amplifier.
Pin complex can perform Presence Detect.
Trigger is required for impedance measurement
Pin complex supports impedance sense.
[2]
R
[1]
R
[0]
ImpSenseCap
R
5.17.3. PortCPin ConnLen
Table 212. PortCPin ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
Table 213. PortCPin ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
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5.17.4. PortCPin ConnLst
Table 214. PortCPin ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 215. PortCPin ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x0B
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
Entry2
R
Entry1
R
Entry0
R
Master Volume widget.
5.17.5. PortCPin Ctl
Table 216. PortCPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
707
See bits [7:0] of bitfield table
Table 217. PortCPin Ctl Command Response Format
Bit
[31.:7]
[6]
Bitfield Name
RW
R
Reset
0x0
Description
Rsvd2
OutEn
InEn
Reserved
RW
RW
R
0x0
1= (CODEC) output path of Pin Widget is enabled
1= (CODEC) input path of Pin Widget is enabled
Reserved
[5]
0x1
[4.:0]
Rsvd1
0x0
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5.17.6. PortCPin UnsolResp
Table 218. PortCPin UnsolResp Command Verb Format
Verb ID
F08
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
708
See bits [7:0] of bitfield table
Table 219. PortCPin UnsolResp Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x00
Reserved
Allow generation of Unsolicited Responses.
Unsolicited response events occur upon jack-insertion
OR completion of a Jack-Sense cycle.
[7]
[6]
En
Rsvd1
Tag
RW
R
0x0
0x0
Reserved
Software programmable field returned in top six bits
(31:26) of every Unsolicited Response generated by
this node.
[5.:0]
RW
0x00
5.17.7. PortCPin Sense
Table 220. PortCPin Sense Command Verb Format
Verb ID
F09
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
Set2
709
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
709
0000_0000h
Table 221. PortCPin Sense Command Response Format
Bit
Bitfield Name
RW
Reset
Description
1= something is plugged into jack associated
with Pin Complex.
[31]
Present
R
0x0
Measured impedance of the widget. A value of
all 1's indicates that a valid sense reading is not
available, or the sense measurement is busy if
it has been recently triggered. Overlaps
RightCh.
[30.:0]
Impedance
R
0x7FFF_FFFF
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Table 221. PortCPin Sense Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Set 1= perform impedance sensing on right
channel or ring of the connector
[0]
RightCh
W
0x0
Set 0= perform impedance sensing on left
channel or tip of the connector
[0]
LeftCh
W
0x0
5.17.8. PortCPin Config
Table 222. PortCPin Config Command Verb Format
Verb ID
F1C
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
Table 223. PortCPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
External Port Connectivity of the Pin Complex.
0 = Port Complex is connected to a jack
[31.:30]
Port
RW
0x0
Physical location of the jack.
03h = Mainboard, Rear
[29.:24]
[23.:20]
Location
Device
RW
RW
0x01
0x8
Default Device, indicating intended use of jack.
8 = Line In
[19.:16]
[15.:12]
[11.:8]
Connection
Color
RW
RW
RW
0x1
0x3
0x0
Connection Type. 1 = 1/8 inch jack
Color of physical jack. 3 = Blue
Misc[0] = Jack Detect override.
Misc
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Table 223. PortCPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Default Association for Pin Complex groups.
Reserved value 0000b should not be used.
Value 1111b indicates lowest priority.
[7.:4]
Assoc
RW
0x2
All Widgets in an association must have unique
sequence number.
[3.:0]
Sequence
RW
0x1
5.18. PortBPin Node (NID = 0x10)
5.18.1. PortBPin WCap
Table 224. PortBPin WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 225. PortBPin WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x4
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x0
0x0
0x0
Description
Reserved
Type
Widget type = Pin Complex
Number of sample delays through widget
Reserved
Delay
Rsvd1
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
[9]
[8]
[7]
Unsolicited Response is supported
No Processing Controls parameter
No support for striping
[6]
[5]
[4]
FormatOvrd
N/A for pin complex
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Table 225. PortBPin WCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
No amplifier info; use default amplifier
parameters from Audio Function node instead.
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.18.2. PortBPin Cap
Table 226. PortBPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
Table 227. PortBPin Cap Command Response Format
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
0x0
Description
Rsvd2
Reserved
EapdCap
R
0x0
This widget does not control EAPD pin
VRef generation is supported by this pin complex, and
the following voltages can be produced on the
associated VRef pin: 80% Avdd; 50% Avdd; GND; Hi-Z
(required since pin complex is output capable)
[15.:8]
VRefCntrl
R
0x17
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Rsvd1
BalancedIO
InCap
R
R
R
R
R
R
R
R
0x0
0x0
0x1
0x1
0x0
0x1
0x1
0x1
Reserved
Pin complex does not have balanced pins.
Pin complex is input capable.
OutCap
Pin complex is output capable.
HPhnDrvCap
PresDtctCap
TrigRqd
Pin does not have a headphone amplifier.
Pin complex can perform Presence Detect.
Trigger is required for impedance measurement
Pin complex supports impedance sense.
ImpSenseCap
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5.18.3. PortBPin ConnLen
Table 228. PortBPin ConnLen Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
0E
Table 229. PortBPin ConnLen Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Description
Reserved.
LongForm
N
R
0x0
Connection list uses short-form (7-bit) NID entries.
Number of NID entries in connection list.
[6.:0]
R
0x01
5.18.4. PortBPin ConnLst
Table 230. PortBPin ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 231. PortBPin ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x0B
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
Entry2
R
Entry1
R
Entry0
R
Master Volume widget.
5.18.5. PortBPin Ctl
Table 232. PortBPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
707
See bits [7:0] of bitfield table
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Table 233. PortBPin Ctl Command Response Format
Bit
[31.:7]
[6]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
OutEn
RW
RW
R
0x0
1= (CODEC) output path of Pin Widget is enabled
1= (CODEC) input path of Pin Widget is enabled
Reserved
[5]
InEn
0x1
[4.:3]
Rsvd1
0x0
VRefEn: Selects one of the possible states for the
VRef signal associated with the Pin Widget. If the
value written to this control does not correspond to a
supported value defined in the VRefCntrl field of the
Pin Capabilities parameter (0C), then this control will
take the value of 000b (Hi-Z).
[2.:0]
VRefSelect
RW
0x0
5.18.6. PortBPin UnsolResp
Table 234. PortBPin UnsolResp Command Verb Format
Verb ID
F08
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
708
See bits [7:0] of bitfield table
Table 235. PortBPin UnsolResp Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd2
R
0x00
Reserved
Allow generation of Unsolicited Responses.
Unsolicited response events occur upon
jack-insertion OR completion of a Jack-Sense cycle.
[7]
[6]
En
Rsvd1
Tag
RW
R
0x0
0x0
Reserved
Software programmable field returned in top six bits
(31:26) of every Unsolicited Response generated by
this node.
[5.:0]
RW
0x00
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5.18.7. PortBPin Sense
Table 236. PortBPin Sense Command Verb Format
Verb ID
F09
Payload
00
Response
Get
Set1
Set2
See bitfield table
0000_0000h
709
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
709
0000_0000h
Table 237. PortBPin Sense Command Response Format
Bit
Bitfield Name RW
Reset
Description
1= something is plugged into jack associated with Pin
Complex.
[31]
Present
R
R
0x0
Measured impedance of the widget. A value of all 1's indicates
that a valid sense reading is not available, or the sense
measurement is busy if it has been recently triggered.
Overlaps RightCh.
[30.:0]
Impedance
0x7FFF_FFFF
Set 1= perform impedance sensing on right channel or ring of
the connector
[0]
[0]
RightCh
LeftCh
W
W
0x0
0x0
Set 0= perform impedance sensing on left channel or tip of the
connector
5.18.8. PortBPin Config
Table 238. PortBPin Config Command Verb Format
Verb ID
F1C
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
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Table 239. PortBPin Config Command Response Format
Bit
Bitfield Name RW Reset
Description
External Port Connectivity of the Pin Complex.
0 = Port Complex is connected to a jack
[31.:30]
Port
RW
0x0
[29.:24]
[23.:20]
[19.:16]
[15.:12]
[11.:8]
Location
Device
RW
RW
RW
RW
RW
0x02
0xA
0x1
0x9
0x0
Physical location of the jack. 02h = Mainboard, Front
Default Device, indicating intended use of jack. A = Mic In
Connection Type. 1 = 1/8 inch jack
Connection
Color
Color of physical jack. 9 = Pink
Misc
Misc[0] = Jack Detect override.
Default Association for Pin Complex groups. Reserved value 0000b
should not be used. Value 1111b indicates lowest priority.
[7.:4]
[3.:0]
Assoc
RW
RW
0x2
0x0
Sequence
All Widgets in an association must have unique sequence number.
5.19. MonoOutPin Node (NID = 0x11)
5.19.1. MonoOutPin Vol
Table 240. MonoOutPin Vol Command Verb Format
Verb ID
BA0
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
3A0
See bits [7:0] of bitfield table
Table 241. MonoOutPin Vol Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
Mute
RW
R
0x1
1= mute is active
Reserved
[6.:5]
[4.:0]
Rsvd1
0x0
Gain
RW
0x1F
Mono (left) amplifier gain step number
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5.19.2. MonoOutPin WCap
Table 242. MonoOutPin WCap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
09
Table 243. MonoOutPin WCap Command Response Format
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
Bitfield Name
Rsvd2
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x4
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x0
Description
Reserved
Type
Widget type = Pin Complex
Number of sample delays through widget
Reserved
Delay
Rsvd1
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
Connection list is present
[10]
[9]
[8]
[7]
No support for Unsolicited Response
No Processing Controls parameter
No support for striping
[6]
[5]
[4]
FormatOvrd
N/A for pin complex
No amplifier info; use default amplifier
parameters from Audio Function node instead.
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x1
0x0
0x0
Output amp is present
No input amp
Mono widget
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5.19.3. MonoOutPin Cap
Table 244. MonoOutPin Cap Command Verb Format
Verb ID
Payload
Response
See bitfield table
Get
F00
0C
Table 245. MonoOutPin Cap Command Response Format
Bit
[31.:17]
[16]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
EapdCap
R
0x0
This widget does not control EAPD pin
VRef generation N/A since pin complex is not
input capable.
[15.:8]
VRefCntrl
R
0x00
[7]
[6]
[5]
[4]
[3]
[2]
[1]
Rsvd1
BalancedIO
InCap
R
R
R
R
R
R
R
0x0
0x0
0x0
0x1
0x0
0x0
0x0
Reserved
Pin complex does not have balanced pins.
Pin complex is not input capable.
Pin complex is output capable.
Pin does not have a headphone amplifier.
Pin complex cannot perform Presence Detect.
N/A
OutCap
HPhnDrvCap
PresDtctCap
TrigRqd
Pin complex does not support impedance
sense.
[0]
ImpSenseCap
R
0x0
5.19.4. MonoOutPin ConnLen
Table 246. MonoOutPin ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
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Table 247. MonoOutPin ConnLen Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved
Connection list uses short-form (7-bit) NID
entries.
[7]
LongForm
N
R
R
0x0
[6.:0]
0x01
Number of NID entries in connection list.
5.19.5. MonoOutPin ConnLst
Table 248. MonoOutPin ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
Table 249. MonoOutPin ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x13
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
Entry2
R
Entry1
R
Entry0
R
MonoOut Mix widget.
5.19.6. MonoOutPin Ctl
Table 250. MonoOutPin Ctl Command Verb Format
Verb ID
F07
Payload
00
Response
See bitfield table
0000_0000h
Get
Set1
707
See bits [7:0] of bitfield table
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Table 251. MonoOutPin Ctl Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:7]
Rsvd2
R
0x0
Reserved
1= (CODEC) output path of Pin Widget is
enabled
[6]
OutEn
Rsvd1
RW
R
0x0
0x0
[5.:0]
Reserved
5.19.7. MonoOutPin Config
Table 252. MonoOutPin Config Command Verb Format
Verb ID
F1C
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
Table 253. MonoOutPin Config Command Response Format
Bit
Bitfield Name
Port
RW
RW
RW
RW
Reset
0x1
Description
External Port Connectivity of the Pin Complex.
1 = no physical connection
[31.:30]
[29.:24]
[23.:20]
Location
Device
0x10
0x1
Physical location of the jack. 10h = Internal, N/A
Default Device, indicating intended use of jack.
1 = Speaker
[19.:16]
[15.:12]
[11.:8]
Connection
Color
RW
RW
RW
0x7
0x0
0x0
Connection Type. 7 = Other Analog
Color of physical jack. 0 = Unknown
Misc[0] = Jack Detect override.
Misc
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Table 253. MonoOutPin Config Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Default Association for Pin Complex groups.
Reserved value 0000b should not be used.
Value 1111b indicates lowest priority.
[7.:4]
Assoc
RW
0x1
All Widgets in an association must have unique
sequence number.
[3.:0]
Sequence
RW
0x3
5.20. CDPin Node (NID = 0x12)
5.20.1. CDPin WCap
Table 254. CDPin WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 255. CDPin WCap Command Response Format
Bitfield Name Description
Bit
[31.:24]
[23.:20]
[19.:16]
[15.:12]
[11]
RW
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0x0
0x4
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Rsvd2
Type
Reserved
Widget type = Pin Complex
Number of sample delays through widget
Reserved
Delay
Rsvd1
SwapCap
PwrCntrl
DigitalStrm
ConnList
UnsolCap
ProcWidget
Stripe
No left/right channel swap capability
No support for Power State control
Widget supports an Analog stream
No connection list is present
No support for Unsolicited Response
No Processing Controls parameter
No support for striping
[10]
[9]
[8]
[7]
[6]
[5]
[4]
FormatOvrd
N/A for pin complex
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Table 255. CDPin WCap Command Response Format
Bit
Bitfield Name
RW
Reset
Description
No amplifier info; use default amplifier
parameters from Audio Function node instead.
[3]
AmpParamOvrd
R
0x0
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x1
No output amp
No input amp
Stereo widget
5.20.2. CDPin Cap
Table 256. CDPin Cap Command Verb Format
Verb ID
Payload
Response
Get
F00
0C
See bitfield table
Table 257. CDPin Cap Command Response Format
Bit
[31.:17]
[16]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
EapdCap
R
0x0
This widget does not control EAPD pin
VRef generation not supported by this pin
complex.
[15.:8]
VRefCntrl
R
0x00
[7]
[6]
[5]
[4]
[3]
[2]
[1]
Rsvd1
BalancedIO
InCap
R
R
R
R
R
R
R
0x0
0x0
0x1
0x0
0x0
0x0
0x0
Reserved
Pin complex does not have balanced pins.
Pin complex is input capable.
Pin complex is not output capable.
Pin does not have a headphone amplifier.
Pin complex cannot perform Presence Detect.
N/A
OutCap
HPhnDrvCap
PresDtctCap
TrigRqd
Pin complex does not support impedance
sense.
[0]
ImpSenseCap
R
0x0
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5.20.3. CDPin Ctl
Table 258. CDPin Ctl Command Verb Format
Verb ID
Payload
00
Response
Get
F07
707
See bitfield table
0000_0000h
Set1
See bits [7:0] of bitfield table
Table 259. CDPin Ctl Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:6]
Rsvd2
R
0x0
Reserved
1= (CODEC) input path of Pin Widget is
enabled (un-muted)
[5]
InEn
RW
R
0x1
0x0
[4.:0]
Rsvd1
Reserved
5.20.4. CDPin Config
Table 260. CDPin Config Command Verb Format
Verb ID
F1C
Payload
Response
See bitfield table
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Get
Set1
Set2
Set3
Set4
00
71C
See bits [7:0] of bitfield table
See bits [15:8] of bitfield table
See bits [23:16] of bitfield table
See bits [31:24] of bitfield table
71D
71E
71F
Table 261. CDPin Config Command Response Format
Bit
Bitfield Name
RW
RW
RW
RW
Reset
0x2
Description
External Port Connectivity of the Pin Complex.
2 = fixed function device
[31.:30]
[29.:24]
[23.:20]
Port
Location
Device
0x10
0x3
Physical location of the jack. 10h = Internal, N/A
Default Device, indicating intended use of jack.
3 = CD
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Table 261. CDPin Config Command Response Format
Bit
Bitfield Name
Connection
Color
RW
RW
RW
RW
Reset
0x3
Description
[19.:16]
[15.:12]
[11.:8]
Connection Type. 3 = ATAPI internal
Color of physical jack. 0 = Unknown
Misc[0] = Jack Detect override.
0x0
Misc
0x0
Default Association for Pin Complex groups.
Reserved value 0000b should not be used.
Value 1111b indicates lowest priority.
[7.:4]
[3.:0]
Assoc
RW
RW
0x2
0x2
All Widgets in an association must have unique
sequence number.
Sequence
5.21. MonoOutMix Node (NID = 0x13)
5.21.1. MonoOutMix WCap
Table 262. MonoOutMix WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
Table 263. MonoOutMix WCap Command Response Format
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
[31.:24]
[23.:20]
[19.:16]
[15.:12]
Reserved
Widget type = Audio Mixer
Type
R
0x2
Delay
R
0x0
Number of sample delays through widget
Reserved
Rsvd1
R
0x0
Swapping of left and right channels not
supported
[11]
SwapCap
R
0x0
[10]
[9]
PwrCntrl
DigitalStrm
ConnList
R
R
R
R
0x0
0x0
0x1
0x0
No support for Power State control
Widget supports an Analog stream
Connection list is present
[8]
[7]
UnsolCap
No support for Unsolicited Response
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Table 263. MonoOutMix WCap Command Response Format
Bit
[6]
[5]
Bitfield Name
ProcWidget
Stripe
RW
R
Reset
0x0
Description
No Processing Controls parameter.
No support for striping
R
0x0
No format info; use default format parameters
from Audio Function node instead
[4]
[3]
FormatOvrd
R
R
0x0
0x0
No amplifier info; use default amplifier
parameters from Audio Function node instead
AmpParamOvrd
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x0
0x0
0x0
No output amp
No input amp
Mono widget
5.21.2. MonoOutMix ConnLen
Table 264. MonoOutMix ConnLen Command Verb Format
Verb ID
Payload
Response
Get
F00
0E
See bitfield table
Table 265. MonoOutMix ConnLen Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved.
Connection list uses short-form (7-bit) NID
entries.
[7]
LongForm
N
R
R
0x0
[6.:0]
0x01
Number of NID entries in connection list.
5.21.3. MonoOutMix ConnLst
Table 266. MonoOutMix ConnLst Command Verb Format
Verb ID
Payload
Response
Get
F02
00
See bitfield table
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Table 267. MonoOutMix ConnLst Command Response Format
Bit
Bitfield Name
Entry3
RW
R
Reset
0x00
0x00
0x00
0x07
Description
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Unused list entry.
Unused list entry.
Unused list entry.
DAC Mux widget.
Entry2
R
Entry1
R
Entry0
R
5.22. PCBeep Node (NID = 0x14)
5.22.1. PCBeep Vol
Table 268. PCBeep Vol Command Verb Format
Verb ID
BA0
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
3A0
See bits [7:0] of bitfield table
Table 269. PCBeep Vol Command Response Format
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0x0
Description
Reserved
Mute
RW
R
0x1
1= mute is active
Reserved
[6.:2]
[1.:0]
Rsvd1
0x0
Gain
RW
0x3
Mono (left) amplifier gain step number
5.22.2. PCBeep WCap
Table 270. PCBeep WCap Command Verb Format
Verb ID
Payload
Response
Get
F00
09
See bitfield table
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Table 271. PCBeep WCap Command Response Format
Bit
Bitfield Name
Rsvd3
RW
R
Reset
0x0
Description
[31.:24]
[23.:20]
[19.:4]
Reserved
Type
R
0x7
Widget type = Beep Generator
Reserved
Rsvd2
R
0x0
This widget contains its own amplifier
parameters.
[3]
AmpParamOvrd
R
0x1
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0x1
0x0
0x0
Output amp is present
N/A
Mono widget
5.22.3. PCBeep OutAmpCap
Table 272. PCBeep OutAmpCap Command Verb Format
Verb ID
Payload
Response
Get
F00
12
See bitfield table
Table 273. PCBeep OutAmpCap Command Response Format
Bit
[31]
Bitfield Name
Mute
RW
R
Reset
0x1
Description
Amplifier is capable of muting
Reserved
[30.:23]
[22.:16]
[15]
Rsvd3
R
0x0
StepSize
Rsvd2
R
0x17
0x0
Size of each step in the gain range = 6 dB
Reserved
R
[14.:8]
[7]
NumSteps
Rsvd1
R
0x03
0x0
Number of steps in the gain range = 4 (-18dB to 0dB)
Reserved
R
[6.:0]
Offset
R
0x03
0dB-step is programmed with this offset
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5.22.4. PCBeep Gen
Table 274. PCBeep Gen Command Verb Format
Verb ID
F0A
Payload
00
Response
Get
See bitfield table
0000_0000h
Set1
70A
See bits [7:0] of bitfield table
Table 275. PCBeep Gen Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31.:8]
Rsvd
R
0x0
Reserved
Enable internal PC-Beep generation.
Divider = 00h disables internal PC Beep
generation and enables normal operation of the
CODEC.
Divider not equal to 00h generates the beep
tone on all Pin Complexes that are currently
configured as outputs.
The Azalia spec states that the beep tone
frequency = (48 KHz Azalia SYNC rate) /
(4*Divider), producing tones from 47 Hz to
12 KHz (logarithmic scale). Instead, this part
generates tones with frequency = 48000 * (257
- Divider) / 1024, yielding a linear range from
12 KHz to 93.75 Hz in steps of 46.875 Hz. If
JackSenseVSR[Rate2x], then the beep tones
generated have frequency = 48000 * (513 -
Divider) / 1024, yielding a range of 24 KHz to
12093.75 Hz in steps of 46.875 Hz.
[7.:0]
Divider
RW
0x00
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6. ORDERING INFORMATION
6.1. STAC9200 Family Options and Part Order Numbers
The +4V Analog voltage is supported by the +5 V version of the STAC9200 or STAC9200D.
*Dolby requires the 5 V version of this part except for Dolby Digital Live (DDL).
Part Order Number
STAC9200D5TAEyy
STAC9200D5NAEyy
STAC9200X5TAEyy
STAC9200X5NAEyy
STAC9200D3TAEyy
STAC9200D3NAEyy
STAC9200X3TAEyy
STAC9200X3NAEyy
Voltage
5 V
DAC SNR
100dB
100dB
100dB
100dB
100dB
100dB
100dB
100dB
Dolby*
Yes
Pkg Pins
48 LQFP
32 QFN
48 LQFP
32 QFN
48 LQFP
32 QFN
48 LQFP
32 QFN
5 V
Yes
5 V
No
5 V
No
3.3 V
3.3 V
3.3 V
3.3 V
Yes (DDL)
Yes (DDL)
No
No
NOTE: When ordering these parts the “yy” will be replaced with the CODEC revision. Add an “R” to the end of any of
these part numbers for delivery on Tape and Reel. The minimum order quantity for Tape and Reel is 2,000 units for
both package options.
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7. PIN INFORMATION
7.1. Pin Out
MONO_OUT 25
AVDD2 26
HP_L 27
16 LINE_IN_R
15 LINE_IN_L
14 MIC 2
13 MIC 1
12 CD_R
HP_R 28
AVSS 29
32 pad QFN
GPIO2 30
11 N.C.
SPDIF_IN/EAPD/GPIO3
SPDIF_OUT
CD_L
SENSE_A
31
32
10
9
MONO_OUT 37
AVDD2 38
24 LINE_IN_R
23 LINE_IN_L
22 MIC_R
21 MIC_L
20 CD_R
19 N.C.
HP_OUT_L 39
N.C. 40
HP_OUT_R 41
AVSS2 42
48 pin LQFP
N.C. 43
N.C. 44
18 CD_L
17 N.C.
GPIO2 45
16 N.C.
N.C. 46
15 N.C.
SPDIF_IN/EAPD/GPIO3 47
SPDIF_OUT 48
14 N.C.
13 SENSE_A
N.C. = No Connect
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7.2. Pin Table for 48-pin LQFP and 32-pad QFN Packages
Internal
Pull-up/
LQFP
48-pin
QFN
32-pin
Pin Name
Pin Function
I/O
Pull-down
Location
Location
NC
NC
NC
NC
No Connect
No Connect
No Connect
No Connect
-
-
-
-
-
-
-
-
1
2
3
4
-
1
-
-
High Definition Audio “Azalia” Serial Data
output (inbound stream)
SDATA_OUT
I/O (Digital)
None
5
2
BIT_CLK
DVSS
High Definition Audio “Azalia” Bit Clock
Digital Ground
I(Digital)
I(Digital)
Pull-down
None
6
7
3
4
High Definition Audio “Azalia” Serial Data input
(outbound stream)
SDATA_IN
O(Digital)
Pull-down
8
5
DVDD_CORE3
SYNC
RESET#
PC Beep
Sense A
NC
Digital Vdd = 3.3 V
High Definition Audio “Azalia”Frame Sync
High Definition Audio “Azalia” Reset
PC Beep
I(Digital)
None
9
6
7
I(Digital)
Pull-down
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I(Digital)
Pull-down
8
I(Analog)
-
-
Jack insertion detection Ports A, B, C, D
No Connect
I(Analog)
None
9
-
-
-
NC
No Connect
-
-
-
NC
No Connect
-
-
-
NC
No Connect
-
-
-
CD-L
CD Audio Left Channel
No Connect
I(Analog)
-
None
-
10
11
12
13
14
15
16
-
NC
CD-R
CD Audio Right Channel
Analog I/O
I(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
-
None
None
None
None
None
-
Port B-L
Port B-R
Port C-L
Port C-R
NC
Analog I/O
Analog I/O
Analog I/O
No Connect
AVSS1
VREF IN
VREFOUT
NC
Analog Ground
I(Analog)
I(Analog)
O(Analog)
-
None
None
None
-
17
18
19
-
Reference Voltage In drive
Reference Voltage Out drive
No Connect
NC
No Connect
-
-
-
NC
No Connect
-
-
-
CAP2
ADC reference Cap
O(Analog)
None
20
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Internal
Pull-up/
LQFP
48-pin
QFN
32-pin
Pin Name
Pin Function
I/O
Pull-down
Location
Location
GPIO0*
GPIO1*
Port D-L
Port D-R
MONO
AVDD2
Port A-L
NC
General Purpose I/O/Mic Bias
General Purpose I/O/Mic Bias
Analog I/O with HP support
Analog I/O with HP support
Mono Out from DAC
Analog Vdd = 5.0 V or 3.3 V
Analog I/O with HP support
No Connect
I/O(Analog) Pull-up 50 KΩ
I/O(Analog) Pull-up 50 KΩ
33
34
35
36
37
38
39
40
41
42
43
44
45
46
21
22
23
24
25
26
27
-
I/O(Analog)
I/O(Analog)
O(Analog)
I(Analog)
I/O(Analog)
-
None
None
None
None
None
-
Port A-R
AVSS2
NC
Analog I/O with HP support
Analog Ground
I/O(Analog)
I(Analog)
-
None
28
29
-
None
No Connect
-
NC
No Connect
-
-
-
GPIO2*
NC
General Purpose I/O /Mic Bias
No Connect
I/O(Digital)
-
Pull-up 50 KΩ
30
-
-
S/PDIFIN/EAPD/ SPDIF Input, External Amplifier Power Down,
I/O(Digital)
O(Digital)
None
47
48
31
32
GPIO3*
General Purpose I/O /Mic Bias
SPDIF digital output
(50 KΩ internal pull-down)
50 KΩ internal
S/PDIF-OUT
pull-down
* GPIO Pins can also be used for Microphone Bias.
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8. PACKAGE DRAWINGS
8.1. 32-pin QFN
Figure 3. 32-Pad QFN Package Outline and Package Dimensions
QFN Dimensions in mm
Key
Min
Nom
0.80
Max
0.90
0.05
A
A1
A3
b
-
0
0.02
0.20 REF.
0.25
0.18
0.30
D
5.00 BSC
3.50 BSC
5.00 BSC
3.50 BSC
0.50 BSC
0.40
D1
E
E1
e
L
0.30
3.20
3.20
0.50
3.60
3.60
D2
E2
ZD
ZE
R
3.50
3.50
0.75 BSC
0.75 BSC
0.20~0.25
NOTE: For more information on the QFN please see IDT QFN Application Note.
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8.2. 48-Pin LQFP
Figure 4. 48-Pin LQFP Package Outline and Package Dimensions
A2
LQFP Dimensions in mm
Key
A
Min
1.40
0.05
1.35
8.80
6.90
8.80
6.90
0.45
Nom
1.50
0.10
1.40
9.00
7.00
9.00
7.00
0.60
0.50
-
Max
1.60
0.15
1.45
9.20
7.10
9.20
7.10
0.75
D
A
A1
D1
A1
A2
D
b
D1
E
48 pin LQFP
E1
L
e
e
Pin 1
C
0.09
0.17
0.20
0.27
b
0.22
c
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9. SOLDER REFLOW PROFILE
9.1. Standard Reflow Profile Data
Note: These devices can be hand soldered at 360 oC for 3 to 5 seconds.
FROM: IPC / JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface
Mount Devices” (www.jedec.org/download).
Profile Feature
Pb Free Assembly
o
Average Ramp-Up Rate (Ts
- Tp)
3 C / second max
max
o
Temperature Min (Ts
Temperature Max (Ts
)
)
)
150 C
min
o
Preheat
200 C
max
max
Time (ts
- ts
60 - 180 seconds
min
o
Temperature (T )
217 C
L
Time maintained above
Time (t )
60 - 150 seconds
L
See “Package Classification Reflow Temperatures”
on page 123.
Peak / Classification Temperature (Tp)
o
Time within 5 C of actual Peak Temperature (tp)
20 - 40 seconds
o
Ramp-Down rate
6 C / second max
o
Time 25 C to Peak Temperature
8 minutes max
Note: All temperatures refer to topside of the package, measured on the package body surface.
Figure 5. Solder Reflow Profile
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9.2. Pb Free Process - Package Classification Reflow Temperatures
Package Type
LQFP 48-pin
QFN 32-pad
MSL
Reflow Temperature
3
3
260 oC*
260 oC*
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10.REVISION HISTORY
Revision
Date
Description of Change
For STAC9200/9200D Revision CA1
0.5
0.6
0.7
0.8
September 2004
November 2004
November 2004
December 2004
Initial release.
Updated the Connection Diagrams
Added Widget Tables
Added 5V Analog Performance Characteristics Table
FOR STAC9200/9200D Revision CB1
Updated LQFP Package Drawing. Updated QFN Drawing. Updated Reflow profile
information. Updated Widget Information- This is for the B1 revision of STAC9200/9200D.
0.9
January 2005
February 2005
0.91
Added Ordering Information. Updated Reflow profile.
Added Dolby part numbers, description and differences section, Added 5V Analog
Performance Numbers with note about min/max, Added Power Consumption, Added 4V
Analog supply information, Added comment for allowing GPIO to be used as microphone
bias
0.92
0.93
April 2005
July 2005
Added in 3.3V Analog performance numbers. Added in 4V performance numbers.
Replaced reflow profile- this was only for visual purposes. No changes were made to the
Data.
1.0
1.1
1.2
1.3
1.4
Updated logo
Removed “Preliminary”. Added Section 7.4 “Audio Jack Presence Detect.”
Updated 32-pad Package Drawing
Released in IDT format.
June 2006
10 October 2006
December 2006
Updated AIDD Max spec
Corrected 32QFN diagram, removed typical connection diagrams as the reference design should be
used instead. Updated table of contents, list of tables and figures.
1.5
April 2007
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Innovate with IDT audio for high fidelity. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
HA.CM@idt.com
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Integrated Device Technology, Inc.
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+44 1372 363 339
+408 284 8200 (outside U.S.)
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