XUM730125I
更新时间:2024-09-18 23:20:41
品牌:IDT
描述:XU Family of Low Phase Noise Quartz-based PLL Oscillators
XUM730125I 概述
XU Family of Low Phase Noise Quartz-based PLL Oscillators
XUM730125I 数据手册
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PDF下载XU Family of Low Phase Noise
Quartz-based PLL Oscillators
XU
Datasheet
Description
Features
The XU devices are low phase noise quartz-based PLL oscillators
supporting a large range of frequencies and output interface
types. These devices are designed to operate at three different
power supplies and are available in multiple package sizes as well
as temperature grades.
▪ Frequency range: 0.016MHz to 1500MHz
▪ Output types: LVDS, LVPECL, HCSL, LVCMOS
▪ Supply voltage options: 1.8V, 2.5V, or 3.3V
▪ Phase jitter (1.875MHz to 20MHz): 100fs typical
▪ Phase jitter (12kHz to 20MHz): 300fs typical
▪ Package options:
With a patented one-time program (OTP) allowing for infinite
memory shelf life, the XU devices can be programmed to generate
an output frequency from 16kHz to 1500MHz with a resolution as
low as 1Hz accuracy. The configuration capability of this family of
devices allows for fast delivery times for both sample and large
production orders.
— 5.0 × 3.2 × 1.2 mm
— 7.0 × 5.0 × 1.3 mm
▪ Operating temperature: -20°C to +70°C
— Frequency stability options: ±20, ±25, ±50, or ±100 ppm
▪ Operating temperature: -40°C to +85°C
— Frequency stability options: ±25, ±50, or ±100 ppm
▪ Operating temperature: -40°C to +105°C
— Frequency stability options: ±50 or ±100 ppm
Pin Assignments
E/D 1
NC
4 VDD
NC
E/D / NC 1
VDD
OUT2
OUT
6
5
4
NC / E/D
GND
2
3
GND
2
3 OUT
Table 1. 6-pin Package
Table 2. 4-pin Package
Pin # Pin Name
Description
Pin # Pin Name
Description
E/D
NC
Enable/Disable [a,b]
No connect
1
2
3
4
E/D
GND
OUT
VDD
Enable/Disable [a,b]
Connect to ground
Output
1
NC
E/D
No connect
2
Enable/Disable [a,b]
Supply voltage
3
4
5
6
GND
OUT
OUT2
VDD
Connect to ground
Output
[a] Pulled high internally = output enabled.
[b] Low = output disabled.
Complementary output
Supply voltage
See Ordering Information for more details.
©2018 Integrated Device Technology, Inc.
1
June 25, 2018
XU Datasheet
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the device. These ratings, which are standard values for IDT
commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Table 3. Absolute Maximum Ratings
Item
Rating
VDD
E/D
-0.5 to +5.0V
-0.5V to VDD + 0.5V
-0.5V to VDD + 0.5V
-55°C to 125°C
125°C
OUT
Storage Temperature
Maximum Junction Temperature
Core Current
65mA maximum
Theta JA
75.9 °C/W
48.6°C/W
89.6 °C/W
54.3 °C/W
JU6
JS6
Theta JB
ESD Compliance
Table 4. ESD Compliance
Human Body Model (HBM)
1000V
Mechanical Testing
Table 5. Mechanical Testing *
Parameter
Test Method
Mechanical Shock
Half-sine wave with 0.3ms 3000G. X, Y, Z each direction 1 time.
Frequency: 10 to 55MHz amplitude: 1.5mm.
Frequency: 55–2000Hz peak value: 20G.
Mechanical Vibration
Duration time: 4H for each X,Y,Z axis; total 12hours.
High Temp Operating Life (HTOL) 2000 hours at 125°C (under power).
Hermetic Seal
Gross leak (air leak test). Fine leak (Helium leak test) He-pressure: 6kgf/cm² 2 hours.
* MSL level does not apply.
Solder Reflow Profile
tP
10 seconds Max within5°C of
260°C peak
260°C
Ramp up 3°C/s Max
225°C
180°C
Ramp down not to
exceed 6°C/s
50 ±10 seconds
above 225°C
reflow area
160°C
120 ±20 seconds in
pre-heating area
25°C
400 seconds Max from+25°C to 260°C peak
©2018 Integrated Device Technology, Inc.
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June 25, 2018
XU Datasheet
DC Electrical Characteristics
Note for all DC Electrical Characteristics tables: A pull-up resistor from VDD to E/D enables output when pin 1 is left open.
Table 6. 3.3V IDD DC Electrical Characteristics
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Output Type
Conditions
Minimum
Typical
Maximum
Units
0.016MHz to 400MHz.
400.000+MHz to 1.5GHz.
0.016MHz to 212.5MHz.
212.5+MHz to 400MHz.
400+MHz to 670MHz.
0.016MHz to 670MHz.
0.016MHz to 62.5MHz.
62.5+MHz to 167MHz.
97
LVDS
122
115
128
142
145
98
LVPECL
IDD
Current Consumption
mA
HCSL
LVCMOS
108
Table 7. 2.5V IDD DC Electrical Characteristics
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Output Type
Conditions
Minimum
Typical
Maximum
Units
0.016MHz to 400MHz.
400.000+MHz to 1.35GHz.
0.016MHz to 156.25MHz.
156.25+MHz to 400MHz.
400+MHz to 670MHz.
90
103
102
112
118
102
112
80
LVDS
LVPECL
HCSL
IDD
Current Consumption
mA
0.016MHz to 400MHz.
400.000+MHz to 670MHz.
0.016MHz to 62.5MHz.
LVCMOS 62.5+MHz to 125MHz.
125+MHz to 167MHz.
85
92
©2018 Integrated Device Technology, Inc.
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June 25, 2018
XU Datasheet
Table 8. 1.8V IDD DC Electrical Characteristics
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Output Type
Conditions
Minimum
Typical
Maximum
Units
0.016MHz to 400MHz.
400.000+MHz to 1.0GHz.
0.016MHz to 250MHz.
250.000+MHz to 670MHz.
0.016MHz to 400MHz.
400.000+MHz to 670MHz.
0.016MHz to 125MHz.
65
72
75
97
68
77
58
LVDS
LVPECL
IDD
Current Consumption
mA
HCSL
LVCMOS
Table 9. LVDS DC Electrical Characteristics
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard
frequencies.
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
Units
VOD
VOS
VIH
Differential Output Voltage
Output Offset Voltage
0.25
1
0.4
0.5
1.17
1.375
V
Enable/Disable Input High Voltage
Enable/Disable Input Low Voltage
70%VDD
VIL
30%VDD
Table 10. LVPECL DC Electrical Characteristics
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard
frequencies.
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
Units
V
DD = 3.3V ±5%.
1.85
1.1
2.3
1.45
0.8
VOH
Output High Voltage
VDD = 2.5V ±5%.
VDD = 1.8V ±5%.
0.5
V
DD = 3.3V ±5%.
1.1
1.65
0.85
0.25
V
VOL
Output Low Voltage
VDD = 2.5V ±5%.
VDD = 1.8V ±5%.
0.35
0
VIH
VIL
Enable/Disable Input High Voltage
Enable/Disable Input Low Voltage
70%VDD
30%VDD
©2018 Integrated Device Technology, Inc.
4
June 25, 2018
XU Datasheet
Table 11. HCSL DC Electrical Characteristics
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard
frequencies.
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
Units
V
DD = 3.3V ±5%.
0.6
0.55
1.1
0.95
0.7
VOH
Output High Voltage
VDD = 2.5V ±5%.
VDD = 1.8V ±5%.
0.45
V
VOL
VIH
VIL
Output Low Voltage
0
0.2
Enable/Disable Input High Voltage
Enable/Disable Input Low Voltage
70%VDD
30%VDD
Table 12. LVCMOS DC Electrical Characteristics
VDD = 3.3V, 2.5V, 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard
frequencies.
Symbol
Parameter
Differential Output Voltage
Output Offset Voltage
Conditions
Minimum
Typical
Maximum
10%VDD
30%VDD
Units
VOH
VOL
VIH
VIL
90%VDD
V
Enable/Disable Input High Voltage
Enable/Disable Input Low Voltage
70%VDD
©2018 Integrated Device Technology, Inc.
5
June 25, 2018
XU Datasheet
AC Electrical Characteristics
Table 13. 3.3V AC Electrical Characteristics
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Test Condition
Minimum
Typical Maximum Units
LVDS.
0.016
0.016
0.016
±20
1500
F
Output Frequency Range
LVPECL, HCSL.
670
167
MHz
LVCMOS.
Temperature = -20°C to +70°C.
Temperature = -40°C to +85°C.
Temperature = -40°C to +105°C.
TA = 25°C.
±100
±100
±100
±3
ppm
ppm
ppm
Frequency Stability
±25
±50
Aging (1st year)
Aging (10 years)
TA = 25°C.
±10
LVDS.
Differential.
VDD - 2.0V.
To GND.
100
50
LVPECL.
HCSL.
Ω
Output Load
50
LVCMOS.
To GND.
15
pF
Output valid time after VDD meets minimum
specified level.
TST
Start-up Time
Output Rise Time
10
ms
LVDS.
275
275
380
400
330
3
LVPECL.
HCSL.
20% to 80% Vpk-pk.
10% to 90% VDD.
80% to 20% Vpk-pk.
90% to 10% VDD.
ps
ns
ps
ns
tR
LVCMOS.
LVDS.
380
400
330
3
LVPECL.
HCSL.
tF
Output Fall Time
LVCMOS.
LVDS.
45
45
40
45
45
40
55
FOUT < 312.5MHz.
FOUT > 312.5MHz.
55
LVPECL.
HCSL.
60
ODC
Output Clock Duty Cycle
%
55
FOUT < 62.5MHz.
FOUT > 62.5MHz.
55
LVCMOS.
60
TOE
Output Enable/ Disable Time
100
400
400
400
400
ns
LVDS.
300
300
300
300
LVPECL.
HCSL.
Phase Jitter
(12kHz–20MHz)
fJITTER
fsec
LVCMOS.
FOUT = 100MHz.
6
©2018 Integrated Device Technology, Inc.
June 25, 2018
XU Datasheet
Table 14. 2.5V AC Electrical Characteristics
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Test Condition
Minimum
Typical Maximum Units
LVDS.
0.016
0.75
0.016
0.016
±20
1350
LVPECL.
HCSL.
670
MHz
670
F
Output Frequency Range
LVCMOS.
167
Temperature = -20°C to +70°C.
Temperature = -40°C to +85°C.
Temperature = -40°C to +105°C.
TA = 25°C.
±100
±100
±100
±3
ppm
ppm
ppm
Frequency Stability
±25
±50
Aging (1st year)
Aging (10 years)
TA = 25°C.
±10
LVDS.
Differential.
VDD - 2.0V.
To GND.
100
50
LVPECL.
HCSL.
Ω
Output Load
50
LVCMOS.
To GND.
15
pF
Output valid time after VDD meets minimum
specified level.
TST
Start-up Time
Output Rise Time
10
ms
LVDS.
300
250
400
630
315
3
LVPECL.
HCSL.
20% to 80% Vpk-pk.
10% to 90% VDD.
80% to 20% Vpk-pk.
90% to 10% VDD.
ps
ns
ps
ns
tR
LVCMOS.
LVDS.
300
360
400
630
315
3
LVPECL.
HCSL.
tF
Output Fall Time
LVCMOS.
LVDS.
45
45
40
45
45
40
55
FOUT < 156.25MHz.
FOUT < 156.25MHz.
55
LVPECL.
HCSL.
60
ODC
Output Clock Duty Cycle
%
55
FOUT < 62.5MHz.
FOUT > 62.5MHz.
55
LVCMOS.
60
TOE
Output Enable/ Disable Time
100
500
500
500
500
ns
LVDS.
400
350
350
350
LVPECL.
HCSL.
Phase Jitter
(12kHz–20MHz)
fJITTER
fsec
LVCMOS.
FOUT = 100MHz.
©2018 Integrated Device Technology, Inc.
7
June 25, 2018
XU Datasheet
Table 15. 1.8V AC Electrical Characteristics
VDD = 1.8V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Test Condition
Minimum
Typical Maximum Units
LVDS.
0.016
0.016
0.016
±20
1000
F
Output Frequency Range
LVPECL, HCSL.
670
125
MHz
LVCMOS.
Temperature = -20°C to +70°C.
Temperature = -40°C to +85°C.
Temperature = -40°C to +105°C.
TA = 25°C.
±100
±100
±100
±3
ppm
ppm
ppm
Frequency Stability
±25
±50
Aging (1st year)
Aging (10 years)
TA = 25°C.
±10
LVDS.
Differential.
To GND.
100
50
Ω
Output Load
LVPECL, HCSL.
LVCMOS.
To GND.
10
pF
Output valid time after VDD meets minimum
specified level.
TST
Start-up Time
10
ms
LVDS.
250
250
315
350
320
LVPECL.
HCSL.
20% to 80% Vpk-pk.
10% to 90% VDD.
ps
ns
ps
ns
tR
Output Rise Time
Output Fall Time
LVCMOS.
LVDS.
5
250
250
315
350
320
LVPECL.
HCSL.
80% to 20% Vpk-pk.
tF
LVCMOS.
90% to 10% VDD.
FOUT < 156.25MHz.
FOUT < 156.25MHz.
FOUT < 312.5MHz.
FOUT > 312.5MHz.
5
45
40
45
40
40
45
40
55
60
LVDS.
55
LVPECL.
HCSL.
ODC
Output Clock Duty Cycle
60
%
60
FOUT < 62.5MHz.
FOUT > 62.5MHz.
55
LVCMOS.
60
TOE
Output Enable/ Disable Time
100
1200
1200
1200
1200
ns
LVDS.
800
750
100
800
LVPECL.
HCSL.
Phase Jitter
(12kHz–20MHz)
fJITTER
fsec
LVCMOS.
FOUT = 100MHz.
©2018 Integrated Device Technology, Inc.
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June 25, 2018
XU Datasheet
Notes for all AC Electrical Characteristics tables:
1 A pull-up resistor from VDD to E/D enables output when pin 1 is left open.
2 Installation should include a 0.01μF bypass capacitor placed between VDD and GND to minimize power supply line noise.
3 Stability is inclusive of 25°C tolerance, operating temperature range, input voltage change, load change, aging, shock and vibration.
4 Standard LVCMOS frequencies include 10MHz, 12MHz, 12.288MHz, 16MHz, 20MHz, 24MHz, 24.576MHz, 25MHz, 33.333MHz, 40MHz, 48MHz,
50MHz, 100MHz, 125MHz and 156.25MHz.
5 Standard differential frequencies include 100MHz, 106.25MHz, 125MHz, 150MHz, 155.52MHz, 156.25MHz, 200MHz, 212.5MHz, 250MHz, 300MHz,
312.5MHz and 400MHz.
Output Waveforms
Figure 1. LVDS Output Waveforms
Output Levels/Rise Time/Fall Time Measurements
TF
TR
OUTPUT 2
20% to 80%
VOS
VOD
OUTPUT 1
OUTPUT 2
Oscillator Symmetry
VOH
OUTPUT 1
VOL
½ Period
Period
©2018 Integrated Device Technology, Inc.
9
June 25, 2018
XU Datasheet
Figure 2. LVPECL Output Waveforms
Rise Time/Fall Time Measurements
TF
TR
VOH
OUTPUT 2
20% to 80%
OUTPUT 1
OUTPUT 2
VOL
Oscillator Symmetry
VOH
OUTPUT 1
VOL
½ Period
Period
Figure 3. HCSL Output Waveforms
Rise Time/Fall Time Measurements
TF
TR
VOH
OUTPUT 2
20% to 80%
OUTPUT 1
OUTPUT 2
VOL
Oscillator Symmetry
VOH
OUTPUT 1
VOL
½ Period
Period
©2018 Integrated Device Technology, Inc.
10
June 25, 2018
XU Datasheet
Figure 4. LVCMOS Output Waveforms
Rise Time/Fall Time Measurements
10% to 90%
20% to 80%
0V to VDD
80% to 20%
Fall Time
10% to 90%
Rise Time
20% to 80%
Rise Time
90% to 10%
Fall Time
Oscillator Symmetry
On Time
½ Period
Off Time
½ Period
50% VDD
Period
Package Outline Draw ings
The package outline drawings are appended at the end of this document and are accessible from the links below. The package
information is the most current data available.
www.idt.com/document/psc/js6-package-outline-50-x-32-mm-body-11-mm-thick
www.idt.com/document/psc/ju6-package-outline-70-x-50-mm-body-13-mm-thick
www.idt.com/document/psc/js4-package-outline-50-x-32-mm-body-11-mm-thick
www.idt.com/document/psc/ju4-package-outline-70-x-50-mm-body-13-mm-thick
©2018 Integrated Device Technology, Inc.
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June 25, 2018
XU Datasheet
Ordering Information
XU
Family and ASIC
L
5
3
5
125.000000
I
Output Type
Package
Voltage
Precision
Frequency
Temperature Range
I: Industrial range– 40to +85°C
K: Extended industrial range– 40to +105°C
X: Extended commercial range– 20to +70 °C
1: 1.8 VDC ±5%
2: 2.5 VDC ±5%
3: 3.3 VDC ±5%
5: 5.0 x 3.2 mm
7: 7.0 x 5.0 mm
125.000000 Listed in MHz to6 digits
000.016000MHz to 999.999999MHz
H: HCMOS Enable/DisablePin1
J: HCMOS Enable/DisablePin2
L: LVDS Enable/DisablePin1
M: LVDS Enable/DisablePin 2
P: LVPECL Enable/DisablePin 1
Q: LVPECL Enable/DisablePin2
N: HCSL Enable/Disable Pin 1
O: HCSL Enable/Disable Pin2
A00.000000 to A99.999999 1000MHz to 1099.999MHz
B00.000000 to B99.999999 1100MHz to 1199.999MHz
C00.000000 to C99.999999 1200MHz to 1299.999MHz
D00.000000 to D99.999999 1300MHz to 1399.999 MHz
E00.000000 to E99.999999 1400MHz to 1499.999MHz
F00.000000 1500MHz
X: XHCMOS Comp HCMOS Enable/DisablePin1
Y: XHCMOS Comp HCMOS Enable/DisablePin 2
0: ±100 ppm**
5: ±50 ppm **
6: ±25 ppm
XU: 400fs jitter
8: ±20 ppm *
* ±20ppm for X (‐20°C to +70°C) only.
** ±100ppm and ±50ppm for K (‐40°C to +105°C) only.
©2018 Integrated Device Technology, Inc.
12
June 25, 2018
XU Datasheet
Revision History
Revision Date
Description of Change
▪ Updated Package Outline Drawings section.
June 25, 2018
November 22, 2017
▪ Updated Theta JA and JB in Absolute Maximum Ratings table.
▪ Added MSL statement under Mechanical Testing table.
▪ Updated ordering information.
October 19, 2017
▪ Updated document title.
▪ Updated Features bullets.
▪ Updated Absolute Maximum Ratings and ESD Compliance tables.
▪ Added -40°C to +105°C rating to all electrical tables.
▪ Removed phase noise charts.
▪ Updated Ordering Information table.
May 12, 2017
▪ Reformatted embedded tables.
▪ Removed “Jitter Performance” tables and moved the “Phase Jitter (12kHz–20MHz)” parameter to its
respective AC Electrical Characteristics table.
▪ Updated all Output Waveform drawings.
December 1, 2016
Initial release
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Sales
Tech Support
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www.IDT.com
1-800-345-7015 or 408-284-8200
Fax: 408-284-2775
www.IDT.com/go/sales
www.IDT.com/go/support
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herein referred to as “IDT”) reserve the right to modify the products and/or specifications described herein at any time,
without notice, at IDT’s sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same
way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability
of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not
convey any license under intellectual property rights of IDT or any third parties.
IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be rea-
sonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property
of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. Integrated Device Technology, Inc. All rights reserved.
©2018 Integrated Device Technology, Inc.
13
June 25, 2018
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