IN74HC4015AN
更新时间：2024-09-18 07:29:29
品牌：IKSEMICON
描述：Dual 4-Bit Shift Register High-Performance Silicon-Gate CMOS
概述
数据手册IN74HC4015AN 概述
Dual 4-Bit Shift Register High-Performance Silicon-Gate CMOS 双4位移位寄存器高性能硅栅CMOS
IN74HC4015AN 数据手册
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PDF下载TECHNICAL DATA
IN74HC4015A
Dual 4-Bit Shift Register
High-Performance Silicon-Gate CMOS
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two identical independent 4-stage serial-
input/parallel-output registers. Each register has independent Clock and
Reset inputs as well as a single serial Data input. “Q” outputs are
available from each of the four stages on both registers. All register stages
are D-type, master-slave flip-flops. The logic level present at the Data
input is transferred into the first register stage and shifted over one stage
at each positive-going clock transition. Resetting of all stages is
accomplished by a high level on the reset line.
ORDERING INFORMATION
IN74HC4015AN Plastic
IN74HC4015AD SOIC
TA = -55° to 125° C for all packages
•
•
•
•
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 μA
High Noise Immunity Characteristic of CMOS Devices
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Data
L
Outputs
Clock
X
Reset
Q0
Qn
L
L
L
H
L
H
Qn-1
Qn-1
H
PIN 16 = VCC
PIN 8 = GND
*
*
X
Q0
L
Qn
X
L
* = No Change
X = don’t care
Rev. 00
IN74HC4015A
MAXIMUM RATINGS*
Symbol
Parameter
Value
-0.5 to +7.0
-1.5 to VCC +1.5
-0.5 to VCC +0.5
±20
Unit
V
VCC
VIN
VOUT
IIN
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
V
V
mA
mA
mA
mW
IOUT
ICC
DC Output Current, per Pin
±25
DC Supply Current, VCC and GND Pins
±50
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
Tstg
TL
Storage Temperature
-65 to +150
260
°C
°C
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Min
2.0
0
Max
6.0
Unit
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
VIN, VOUT
TA
VCC
+125
V
-55
°C
ns
tr, tf
Input Rise and Fall Time (Figure 1)
VCC =2.0 V
VCC =4.5 V
VCC =6.0 V
0
0
0
1000
500
400
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or
VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
Rev. 00
IN74HC4015A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC
V
Guaranteed Limit
Symbol
VIH
Parameter
Test Conditions
Unit
V
25 °C
to
≤85 ≤125
°C
°C
-55°C
Minimum High-
Level Input Voltage
VOUT= 0.1 V or VCC-0.1 V
⎢IOUT⎢≤ 20 μA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
VIL
Maximum Low -
Level Input Voltage
VOUT=0.1 V or VCC-0.1 V
⎢IOUT⎢ ≤ 20 μA
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
VOH
Minimum High-
Level Output Voltage
VIN=VIH or VIL
⎢IOUT⎢ ≤ 20 μA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
VIN= VIH or VIL
⎢IOUT⎢ ≤ 4.0 mA
⎢IOUT⎢ ≤ 5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
VOL
Maximum Low-
Level Output Voltage
VIN=VIH or VIL
⎢IOUT⎢ ≤ 20 μA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
VIN= VIH or VIL
⎢IOUT⎢ ≤ 4.0 mA
⎢IOUT⎢ ≤ 5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
IIN
Maximum Input
Leakage Current
VIN=VCC or GND
6.0
±0.1
±1.0 ±1.0
μA
μA
ICC
Maximum Quiescent
Supply Current
(per Package)
VIN=VCC or GND
IOUT=0μA
6.0
8.0
80 160
Rev. 00
IN74HC4015A
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns)
VCC
V
Guaranteed Limit
Symbol
fmax
Parameter
Unit
25 °C to ≤85°C ≤125°C
-55°C
Maximum Clock Frequency (50% Duty Cycle)
(Figure 2)
2.0
4.5
6.0
6
30
35
4.8
24
28
4
20
24
MHz
tPLH, tPHL Maximum Propagation Delay, Clock to Q
(Figures 2 and 5)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
ns
ns
pF
tPHL
Maximum Propagation Delay, Reset to Q
(Figures 1 and 5)
2.0
4.5
6.0
205
41
35
255
51
43
310
62
53
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 3 and 5)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
CIN
Maximum Input Capacitance
-
10
10
10
Power Dissipation Capacitance (Per Latch)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption: PD=CPDVCC2f+ICCVCC
140
pF
TIMING REQUIREMENTS(CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
tsu
Parameter
V
Unit
ns
25 °C to
-55°C
≤85°C
≤125°C
Minimum Setup Time, D to Clock
(Figure 4)
2.0
4.5
6.0
50
10
9.0
65
13
11
75
15
13
th
trec
tw
Minimum Hold Time, Clock to D
(Figure 4)
2.0
4.5
6.0
5
5
5
5
5
5
5
5
5
ns
ns
ns
ns
ns
Minimum Recovery Time, Reset to
Clock (Figure 1)
2.0
4.5
6.0
5
5
5
5
5
5
5
5
5
Minimum Pulse Width, Reset (Figure
1)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
tw
Minimum Pulse Width, Clock
(Figure 4)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
tr, tf
Maximum Input Rise and Fall Times
(Figure 1)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
Rev. 00
IN74HC4015A
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Switching Waveforms
Figure 5. Test Circuit
Rev. 00
IN74HC4015A
EXPANDED LOGIC DIAGRAM
Rev. 00
IN74HC4015A
N SUFFIX PLASTIC DIP
(MS - 001BB)
A
Dimension, mm
9
8
16
1
Symbol
MIN
18.67
6.1
MAX
19.69
7.11
B
A
B
C
D
F
5.33
0.36
1.14
0.56
F
L
1.78
C
2.54
7.62
G
H
J
SEATING
PLANE
-T-
N
M
0
°
10
°
J
G
K
H
D
2.92
7.62
0.2
3.81
8.26
0.36
K
L
M
N
0.25 (0.010) M
T
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
0.38
D SUFFIX SOIC
(MS - 012AC)
Dimension, mm
A
16
Symbol
MIN
9.8
MAX
10
9
A
B
C
D
F
H
B
P
3.8
4
1.35
0.33
0.4
1.75
0.51
1.27
1
8
G
R x 45
C
1.27
5.72
G
H
J
-T-
SEATING
PLANE
K
M
D
J
F
0.25 (0.010) M T C
M
0
°
8
°
0.1
0.19
5.8
0.25
0.25
6.2
K
M
P
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
0.25
0.5
R
for A; for B 0.25 mm (0.010) per side.
‑
Rev. 00
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