I631-31BB9H2-155.520 [ILSI]
5 mm x 7 mm Ceramic Low Noise SMD VCXO, LVCMOS / LVPECL / LVDS; 为5mm× 7毫米陶瓷低噪音SMD VCXO ， LVCMOS / LVPECL / LVDS
| 型号： | I631-31BB9H2-155.520 |
| 厂家： | 
ILSI |
| 描述： | 5 mm x 7 mm Ceramic Low Noise SMD VCXO, LVCMOS / LVPECL / LVDS |
| 文件： | 总3页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5 mm x 7 mm Ceramic Low Noise SMD VCXO,
LVCMOS / LVPECL / LVDS
I631 - Series
Product Features
Small Surface Mount Package
Low RMS Phase Jitter
Frequencies to 1500 MHz
Pb Free/ RoHS Compliant
Leadfree Processing
Applications
xDSL
Broadcast video
Wireless Base Stations
Sonet /SDH
Ethernet/LAN/WAN
Optical modules
Clock and data recovery
FPGA/ASIC
Backplanes
GPON
WiMAX/WLAN
Server and Storage
5.0 0.2
Frequency
LVCMOS
LVPECL
LVDS
7.0 0.3
10 MHz to 225 MHz
10 MHz to 1500 MHz
10 MHz to 1500 MHz
Output Level
LVCMOS
LVPECL
LVDS
1.9 Max.
VOH=90% VDD min., VOL=10 % VDD max.
VOH=VDD-1.03V max. (Nom. Load), VOL=VDD-1.6V max. (Nom. Load)
VOD=(Diff. Output) 350mV Typ.
5.08
Duty Cycle
LVCMOS
LVPECL
LVDS
50% ±5% @ 50%VDD
50% ±5% @ 50%*
50% ±5% @ 50%*
Rise / Fall Time
LVCMOS
LVPECL
LVDS
3.0 ns max. (90%/10%)*
0.6 ns max. (80%/20%)*
0.6 ns max. (80%/20%)*
Output Load
LVCMOS
LVPECL
LVDS
Recommended Pad Layout
15pF
50 to VDD - 2.0 VDC
RL=100 /CL=10pF
Frequency Stability
Supply Voltage
Current
See Table Below
4.2
2.0
3.3 VDC ± 10%, 2.5 VDC ± 5%
1.9
LVCMOS = 25 mA max., LVPECL = 60 mA max. LVDS = 35 mA max.
Linearity
10% max.
Pin Connection
Pullability
See Table Below
1
2
3
4
5
6
Voltage Control
Enable/Disable or N/C
GND
Output
Output or N/C
VDD
Control Voltage
Input Impedance
1.65 VDC ± 1.65 VDC @ 3.3V
1.25 VDC ± 1.25 VDC @ 2.5V
50K min.
Phase Jitter (RMS)
At 12kHz to 20 MHz
Operating Temp.
Range
0.5 ps typical
Dimension Units: mm
See Table Below
Storage
-40 C to +100 C
Part Number Guide
Sample Part Number:
I631–31AB9H2–155.520
Package
Input
Operating
Stability
Pullabilty
Output
Enable / Disable
(Pin 2)
Complimentary
Ouput (Pin 5) **
Frequency
Voltage
Temperature
(in ppm)
3 = 3.3V
6 = 2.5V
B = 50
C = 100
3 = LVCMOS
8 = LVDS
H = Enable
O = N/C
1 = N.C.
1 = 0 C to +70 C
3 = -20 C to +70 C
2 = -40 C to +85 C
F = 20
A = 25
B = 50
2 = Output
-155.520 MHz
I631
9 = LVPECL
NOTE: A 0.01 µF bypass capacitor is recommended between VDD (pin 6) and GND (pin 3) to minimize power supply noise. * Measured as percent of
waveform. ** Available on LVDS and LVPECL ouput only.
ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com
10/17/12_B
Specifications subject to change without notice
Page 1
5 mm x 7 mm Ceramic Low Noise SMD VCXO,
LVCMOS / LVPECL / LVDS
I631 - Series
SSB Phase Noise (typ.)
Offset
77.76 MHz
155.52 MHz
622.08 MHz
10Hz
100Hz
1kHz
10kHz
100kHz
-75 dBc/Hz
-105 dBc/Hz
-117 dBc/Hz
-123 dBc/Hz
-125 dBc/Hz
-62 dBc/Hz
-101 dBc/Hz
-112 dBc/Hz
-115 dBc/Hz
-118 dBc/Hz
-47 dBc/Hz
-79 dBc/Hz
-100 dBc/Hz
-104 dBc/Hz
-106 dBc/Hz
Typical Application:
Pb Free Solder Reflow Profile:
*Units are backward compatible with 240C reflow processes
Package Information:
MSL = N.A. (package does not contain plastic, storage life is
unlimited under normal room conditions).
Termination = e4 (Au over Ni over W base metalization).
ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com
10/17/12_B
Specifications subject to change without notice
Page 2
5 mm x 7 mm Ceramic Low Noise SMD VCXO,
LVCMOS / LVPECL / LVDS
I631 - Series
Tape and Reel Information:
Quantity per
1000
Reel
A
B
16 +/-.3
8 +/-.2
C
D
E
F
7.5 +/-.2
17.5 +/-1
50 / 60 / 80
180 / 250
Environmental Specifications
Thermal Shock
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2007, Condition A
J-STD-020C, Table 5-2 Pb-free devices (except 2 cycles max)
Pb-Free / RoHS / Green Compliant
JESD22-B102-D Method 2 (Preconditioning E)
MIL-STD-883, Method 2004, Test Condition D
MIL-STD-883, Method 1014, Condition C
Moisture Resistance
Mechanical Shock
Mechanical Vibration
Resistance to Soldering Heat
Hazardous Substance
Solderability
Terminal Strength
Gross Leak
Fine Leak
Solvent Resistance
MIL-STD-883, Method 1014, Condition A2, R1=2x10-8 atm cc/s
MIL-STD-202, Method 215
Marking
Line 1: ILSI and Date Code (YWW)
Line 2: Frequency
ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com
10/17/12_B
Specifications subject to change without notice
Page 3
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