I642-63BC9O1-1500.000 [ILSI]
LVPECL Output Clock Oscillator,;
| 型号： | I642-63BC9O1-1500.000 |
| 厂家： | 
ILSI |
| 描述： | LVPECL Output Clock Oscillator, 机械 振荡器 |
| 文件： | 总3页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.2 mm x 2.5 mm Ceramic Package SMD VCXO
LVCMOS / LVPECL / LVDS
I642 Series
Product Features
Small Surface Mount Package
Fast Sample Delivery
Fast Sample Delivery
Pb Free/ RoHS Compliant
Leadfree Processing
Applications
xDSL
Ethernet/LAN/WAN
Optical modules
Clock and data recovery
FPGA/ASIC
Broadcast Video
Wireless Base Stations
Sonet /SDH
3.20±0.10
WiMAX/WLAN
Backplanes
Server and Storage
GPON
Marking
2.50±0.10
1.00±0.15
Frequency
LVCMOS
LVPECL
LVDS
10.000MHz to 250.000MHz
10.000MHz to 1500.000MHz
10.000MHz to 1500.000MHz
Output Level
LVCMOS
LVPECL
LVDS
Logic “0” = 10% of Vcc max, Logic “1” = 90% of Vcc min
Logic “0”= Vcc-1.62V max., Logic “1” = 1.02 V min
VOD=(Diff. Output) 350mV Typ.
.60
TYP
Duty Cycle
LVCMOS
LVPECL
LVDS
Rise / Fall Time
LVCMOS
LVPECL
LVDS
1
6
2
5
3
4
1.30
TYP
50% ±5% @ 50% of Vcc
50% ±5% @ 50%*
50% ±5% @ 50%*
1.60
2.0 ns max. (10% to 90%)*
0.8 ns max. (20% to 80%)*
0.8 ns max. (20% to 80%)*
2.30
.70
.90
Output Load
LVCMOS
LVPECL
LVDS
15pF
1.80
50 to Vcc - 2.0 VDC
RL=100 /CL= 5pF
See Table Below
+3.30 VDC ± 5%, +2.50 VDC ± 5%
±3.0 ppm max per year
HCMOS = 45 mA max
LVPECL = 90 mA max
LVDS = 35 mA max
10% max.
.90
Frequency Stability
Supply Voltage (Vcc)
Aging
.80
Suggested Land Pattern
Current
PIN CONNECTIONS
Voltage Control
PIN 1
PIN 2
Enable/Disable
or N/C
Linearity
Pullability
Control Voltage
PIN 3
PIN 4
Ground
Output
See Table Below
1.65 VDC ± 1.65 VDC @ 3.3V
1.25 VDC ± 1.25 VDC @ 2.5V
Comp. Output
or N/C
PIN 5
PIN 6
Voltage Supply
Input Impedance
50K min.
Dimension Units: mm
Phase Jitter (RMS)
At 12kHz to 20 MHz
Operating Temp. Range
Storage Temp. Range
0.9 ps typical
See Table Below
-40 C to +85 C
Part Number Guide
Sample Part Number:
I642–31AB9H2–155.520
Package
Input
Operating
Stability
(in ppm)
Pullabilty
Output
Enable / Disable
(Pin 2)
Complimentary
Ouput (Pin 5) **
Frequency
Voltage
Temperature
3 = 3.3V
6 = 2.5V
3 = LVCMOS
8 = LVDS
H = Enable
O = N/C
1 = N.C.
1 = 0 C to +70 C
2 = -40 C to +85 C
3 = -20 C to +70 C
F = 20
A = 25
B = 50
B = 50
C = 100
2 = Output
-155.520 MHz
I642
9 = LVPECL
NOTE: A 0.01 µF bypass capacitor is recommended between VDD (pin 6) and GND (pin 3) to minimize power supply noise. * Measured as percent of
waveform. ** Available on LVDS and LVPECL ouput only.
Rev: 03/10/15_A
Page 1 of 3
ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ●
www.ilsiamerica.com
Specifications subject to change without notice
3.2 mm x 2.5 mm Ceramic Package SMD VCXO
LVCMOS / LVPECL / LVDS
I642 Series
SSB Phase Noise (typ.)
Offset
77.76 MHz
155.52 MHz
622.08 MHz
10Hz
100Hz
1kHz
10kHz
100kHz
-75 dBc/Hz
-105 dBc/Hz
-117 dBc/Hz
-123 dBc/Hz
-125 dBc/Hz
-62 dBc/Hz
-101 dBc/Hz
-112 dBc/Hz
-115 dBc/Hz
-118 dBc/Hz
-47 dBc/Hz
-79 dBc/Hz
-100 dBc/Hz
-104 dBc/Hz
-106 dBc/Hz
Typical Application:
Vcc
N/C
C1
0.01
uF
Output
6
5
4
Oscillator
2
1
3
Vc
Enable / N/C
Pb Free Solder Reflow Profile:
*Units are backward compatible with 240C reflow processes
Package Information:
MSL = N.A. (package does not contain plastic, storage life is unlimited under normal room conditions).
Termination = e4 (Au over Ni over W base metallization).
Rev: 03/10/15_A
Page 2 of 3
ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ●
www.ilsiamerica.com
Specifications subject to change without notice
3.2 mm x 2.5 mm Ceramic Package SMD VCXO
LVCMOS / LVPECL / LVDS
I642 Series
Tape and Reel Information:
Quantity per
1000
Reel
A
B
16 +/-.3
8 +/-.2
C
D
E
F
7.5 +/-.2
17.5 +/-1
50 / 60 / 80
180 / 250
Environmental Specifications
Thermal Shock
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2007, Condition A
J-STD-020C, Table 5-2 Pb-free devices (except 2 cycles max)
Pb-Free / RoHS / Green Compliant
JESD22-B102-D Method 2 (Preconditioning E)
MIL-STD-883, Method 2004, Test Condition D
MIL-STD-883, Method 1014, Condition C
Moisture Resistance
Mechanical Shock
Mechanical Vibration
Resistance to Soldering Heat
Hazardous Substance
Solderability
Terminal Strength
Gross Leak
Fine Leak
Solvent Resistance
MIL-STD-883, Method 1014, Condition A2, R1=2x10-8 atm cc/s
MIL-STD-202, Method 215
Marking
Line 1: ILSI and Date Code (YWW)
Line 2: Frequency
PROPRIETARY AND CONFIDENTIAL
THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION, AND SUCH INFORMATION MAY NOT BE DISCLOSED TO OTHERS FOR ANY
PURPOSE NOR USED FOR MANUFACTURING PURPOSES WITHOUT WRITTEN PERMISSION FROM ILSI America.
Rev: 03/10/15_A
Page 3 of 3
ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ●
www.ilsiamerica.com
Specifications subject to change without notice
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