1ED3123MC12H_技术文档

1ED31xxMC12H (1ED-X3 Compact)

EiceDRIVER^™1ED31xxMC12H Compact

Datasheet

Single-channel 5.7 kV (rms) isolated gate driver IC with active Miller clamp or

separate output

Feature list

•

Single channel isolated gate driver

For use with 600 V/650 V/1200 V/1700 V/2300 V IGBTs, Si and SiC MOSFETs

Up to 14.0 A typical peak output current

40 V absolute maximum output supply voltage

High common-mode transient immunity CMTI > 200 kV/µs

Separate source and sink outputs or active Miller clamp with active shutdown and short circuit clamping

Galvanically isolated coreless transformer gate driver

3.3 V and 5 V input supply voltage

Suitable for operation at high ambient temperature and in fast switching applications

Certification: VDE 0884-11 with V_IORM= 1767 V (peak) (pending) and UL 1577 with V_ISO= 5.7 kV (rms) for 1

min (File E311313)

Potential applications

•

AC and brushless DC motor drives

High voltage DC-DC converter and DC-AC inverter

Induction heating resonant application

UPS-systems

Commercial air-conditioning (CAC)

Server and telecom switched mode power supplies (SMPS)

Solar inverters, e.g. for 1500 V (DC) systems

PG-DSO-8

Product validation

Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.

Datasheet

www.infineon.com/gdisolated

Please read the Important Notice and Warnings at the end of this document

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Datasheet

Device information

Product type

Typical output current and

configuration

UVLO

(V_UVLOL2,min

Certification

(File E311313)

Package

)

1ED3120MC12H

1ED3121MC12H

1ED3122MC12H

1ED3123MC12H

1ED3124MC12H

1ED3131MC12H

5.5 A separate source and sink

10.0 A and 3.0 A clamp

8.0 V

10.5 V

8.0 V

VDE + UL

PG-DSO-8

14.0 A separate source and sink

8.0 V

10.5 V

5.5 A separate source and sink, 180 ns

minimum input pulse suppression

time

Description

The 1ED31xxMC12H (1ED-X3 Compact) gate driver ICs are galvanically isolated single channel gate driver ICs for

IGBT, MOSFET and SiC MOSFET in PG-DSO-8 package. They provide a typical output current of up to 14.0 A on

separate source and sink pins or a typical output current of 10.0 A with an additional 3.0 A active Miller clamp.

The input logic pins operate on a wide input voltage range from 3 V to 15 V using CMOS threshold levels to

support 3.3 V microcontrollers.

Data transfer across the isolation barrier is realized by the coreless transformer technology.

All variants have logic input and driver output undervoltage lockout (UVLO), and active shutdown.

The gate drivers are certified according to VDE 0884-11 and UL 1577

VCC1

VCC2,H

OUT+

IN+

IN-

Single channel

EiceDRIVER^TMwith separate

output

OUT-

GND1

VCC1

VEE2,H

VCC2,L

Control

OUT+

IN+

IN-

Single channel

EiceDRIVER^TMwith separate

output

OUT-

GND1

VEE2,L

Figure 1

Typical application using separate output variant

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Table of contents

Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1

2

3

Block diagram reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Related products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Pin configuration and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4

4.1

4.2

4.2.1

4.2.2

4.2.3

4.2.4

4.3

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Active shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

Active Miller clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

Non-inverting and inverting inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.4

5

5.1

5.2

5.3

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

Electrical characteristics and parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Active shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6

6.1

6.2

Insulation characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Certified according to VDE 0884-11 reinforced insulation (pending) . . . . . . . . . . . . . . . . . . . . . . . . . .17

Recognized under UL 1577 (File E311313) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7

Package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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1 Block diagram reference

1

Block diagram reference

VCC1

VCC2

UVLO

VCC2

input

filter

IN+

&

active

OUT+

OUT-

TX

RX

GND1

VCC1

filter

Shoot

through

protection

input

filter

IN-

GND1

VEE2

Figure 2

Block diagram separate source and sink output variants

VCC1

VCC2

OUT

UVLO

&

input

filter

IN+

&

active

TX

RX

VEE2

GND1

VCC1

filter

VCC2

2V

input

filter

IN-

CLAMP

VEE2

&

GND1

Figure 3

Block diagram output with CLAMP variants

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2 Related products

2

Related products

Note:

Please consider the gate driver IC power dissipation and insulation requirements for the selected

power switch and operating condition.

Product group Product name

Description

TRENCHSTOP^™

IGBT Discrete

IKQ75N120CS6

IKW15N120BH6

IHW40N120R5

High Speed 1200 V, 75 A IGBT with anti-parallel diode in TO247-3

High Speed 1200 V, 15 A IGBT with anti-parallel diode in TO247

Reverse conducting 1200 V, 40 A IH IGBT with integrated diode in

TO247

CoolSiC^™SiC

IMBF170R650M1

IMBG120R045M1H

IMZ120R350M1H

IMZA65R027M1H

IMW65R107M1H

1700 V, 650 mΩ SiC MOSFET in TO263-7 package

1200 V, 45 mΩ SiC MOSFET in TO263-7 package

1200 V, 350 mΩ SiC MOSFET in TO247-4 package

650 V, 27 mΩ SiC MOSFET in TO247-4 package

650 V, 107 mΩ SiC MOSFET in TO247-3 package

EasyPACK^™1B 1200 V / 45 mΩ sixpack module

EasyDUAL^™2B 1200 V, 6 mΩ half-bridge module

MOSFET Discrete

CoolSiC^™SiC

MOSFET Module

FS45MR12W1M1_B11

FF6MR12W2M1_B11

F3L11MR12W2M1_B74 EasyPACK^™2B 1200 V, 11 mΩ 3-Level module in Advanced NPC

(ANPC) topology

F4-23MR12W1M1_B11 EasyPACK^™1B 1200 V, 23 mΩ fourpack module

TRENCHSTOP^™

IGBT Modules

F4-200R17N3E4

FS150R17N3E4

FF650R17IE4

EconoPACK^™3 1700 V, 200 A fourpack IGBT module

EconoPACK^™3 1700 V, 150 A sixpack IGBT module

PrimePACK^™3 1700 V, 650 A half-bridge dual IGBT module

PrimePACK^™3 1700 V, 1000 A half-bridge dual IGBT module

PrimePACK^™3+ 1700 V, 1200 A dual IGBT module

PrimePACK^™3+ 1700 V, 1500 A dual IGBT module

PrimePACK^™3 1700 V, 1500 A dual IGBT module

PrimePACK^™3+ 1700 V, 1800 A dual IGBT module

FF1000R17IE4

FF1200R17IP5

FF1500R17IP5

FF1500R17IP5R

FF1800R17IP5

FP10R12W1T7_B11

EasyPIM^™1B 1200 V, 10 A three phase input rectifier PIM IGBT

module

FS100R12W2T7_B11

FP150R12KT4_B11

FS200R12KT4R_B11

EasyPACK^™2B 1200 V, 100 A sixpack IGBT module

EconoPIM^™3 1200V three-phase PIM IGBT module

EconoPACK^™3 1200 V, 200 A sixpack IGBT module

Table 1

Evaluation boards

Part number

Description

EVAL-1ED3121MX12H

EVAL-1ED3122MX12H

EVAL-1ED3124MX12H

Half-bridge evaluation board for 1ED3121MU12H

Half-bridge evaluation board for 1ED3122MU12H

Half-bridge evaluation board for 1ED3124MU12H

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3 Pin configuration and description

3

Pin configuration and description

Pin configuration PG-DSO-8 of 1ED3121MC12H, 1ED3124MC12H, 1ED3120MC12H, 1ED3123MC12H and

1ED3131MC12H

Table 2

Pin configuration

Pin No. Name

Function

1

2

3

4

5

6

7

8

VCC1

IN+

Positive logic supply

Non-inverted driver input (active high)

Inverted driver input (active low)

Logic ground

IN-

GND1

VEE2

OUT-

OUT+

VCC2

Power ground

Driver sink output

Driver source output

Positive power supply output side

1

2

3

4

VCC1

IN+

VCC2

OUT+

OUT-

VEE2

8

7

6

5

IN-

GND1

Figure 4

PG-DSO-8 (top view)

Pin configuration PG-DSO-8 of 1ED3122MC12H

Table 3

Pin configuration

Pin No. Name

Function

1

2

3

4

5

6

7

8

VCC1

IN+

Positive logic supply

Non-inverted driver input (active high)

Inverted driver input (active low)

Logic ground

IN-

GND1

VEE2

CLAMP

OUT

VCC2

Power ground

Active Miller clamp output

Driver source and sink output

Positive power supply output side

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3 Pin configuration and description

1

2

3

4

VCC1

IN+

VCC2

OUT

8

7

6

5

IN-

CLAMP

VEE2

GND1

Figure 5

PG-DSO-8 (top view)

Pin description

•

VCC1: Logic input supply voltage of 3.3 V up to 15 V wide operating range

GND1: Ground connection of input circuit.

IN+: Non-inverted control signal for driver output. An internal filter provides robustness against noise at IN+.

An internal weak pull-down resistor favors oﬀ-state.

•

IN-: Inverted control signal for driver output. An internal filter provides robustness against noise at IN-. An

internal weak pull-up resistor favors oﬀ-state.

VCC2: Positive power supply pin of output driving circuit. A proper blocking capacitor has to be placed close

to this supply pin.

VEE2: Reference ground of the output driving circuit. In case of a bipolar supply (positive and negative

voltage referred to IGBT emitter) this pin is connected to the negative supply voltage.

OUT+: Driver source output pin to turn on external IGBT. During on-state the driving output is switched to

VCC2. Switching of this output is controlled by IN+ and IN-. This output will also be turned oﬀ at an UVLO

event.

•

OUT-: Driver sink output pin to turn oﬀ external IGBT. During oﬀ-state the driving output is switched to VEE2.

Switching of this output is controlled by IN+ and IN-. In case of UVLO an active shut down keeps the output

voltage at a low level.

OUT: Combined source and sink output pin to external IGBT. The output voltage will be switched between

VCC2 and VEE2. Switching of this output is controlled by IN+ and IN-. In case of an UVLO event this output

will be switched oﬀ and an active shut down keeps the output voltage at a low level.

CLAMP: The clamp function ties its output to VEE2 during oﬀ-state. It activates as soon as the gate voltage

has dropped below 2.0 V referred to VEE2 aꢀer a turn-oﬀ command. Connect this pin directly to the IGBT

gate to avoid parasitic turn-on of the connected IGBT.

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4 Functional description

4

Functional description

The 1ED31xxMC12H (1ED-X3 Compact) are general purpose IGBT gate drivers. Basic control and protection

features support fast and easy design of highly reliable systems.

The integrated galvanic isolation between control input logic and driving output stage grants additional

safety. Its input voltage supply range supports the direct connection of various signal sources like DSPs and

microcontrollers.

4.1

Supply

The driver can operate over a wide supply voltage range, either unipolar or bipolar.

10R

+3.3 V

VCC1

OUT+

OUT-

VCC2

100n

3R3

SGND

IN

GND1

IN+

+15 V

4µ7

0 V

^4µ7-8 V

IN-

VEE2

Figure 6

Application example bipolar supply

With bipolar supply the driver is typically operated with a positive voltage of 15 V at VCC2 and a negative voltage

of -8 V at VEE2 relative to the emitter of the IGBT. Negative supply can help to prevent a dynamic turn on due to

the additional charge which is generated from IGBT’s input capacitance.

10R

+3.3 V

VCC1

OUT

100n

CLAMP

SGND

GND1

+15 V

IN

VCC2

IN+

IN-

4µ7

VEE2

Figure 7

Application example unipolar supply

For unipolar supply configuration the driver is typically supplied with a positive voltage of 15 V at VCC2. In this

case, careful evaluation for turn oﬀ gate resistor selection is recommended to avoid dynamic turn on. Both

supply options are usable with either output configuration separate source and sink as well as output with

active Miller clamp.

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4 Functional description

4.2

Protection features

4.2.1

Undervoltage lockout (UVLO)

IN+

V^UVLOH1

V^UVLOL1

VCC1

V^UVLOH2

V^UVLOL2

VCC2

OUT

Figure 8

UVLO behavior

To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output

independently. Operation starts only aꢀer both VCC levels have increased beyond the respective V_UVLOHlevels.

If the power supply voltage V_VCC1of the input chip drops below V_UVLOL1a turn-oﬀ signal is sent to the output

chip before power-down. The IGBT is switched oﬀ and the signals at IN+ and IN- are ignored until V_VCC1reaches

the power-up voltage V_UVLOH1again.

If the power supply voltage V_VCC2of the output chip goes down below V_UVLOL2the IGBT is switched oﬀ and

signals from the input chip are ignored until V_VCC2reaches the power-up voltage V_UVLOH2again.

Note:

V_VCC2is always referred to VEE2 and does not diﬀerentiate between unipolar or bipolar supply.

4.2.2

Active shut-down

The active shut-down feature ensures a safe IGBT oﬀ-state in case the output chip is not connected to the power

supply or an undervoltage lockout is in eﬀect. The IGBT gate is clamped at OUT- or CLAMP to VEE2.

4.2.3

Short circuit clamping

During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An

internal protection circuit at OUT+ or CLAMP limits this voltage to a value slightly higher than the supply voltage.

A maximum current of 500 mA may be fed back to the supply through this path for 10 μs. If higher currents are

expected or tighter clamping is desired external Schottky diodes may be added.

4.2.4

Active Miller clamp

In a half bridge configuration the switched oﬀ IGBT tends to dynamically turn on during turn on phase of the

opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt

situation. Therefore in many applications, the use of a negative supply voltage can be avoided. During turn-oﬀ,

the gate voltage is monitored and the clamp output is activated when the gate voltage drops below typical 2 V

(referred to VEE2). The clamp is designed for a Miller current in the same range as the nominal output current.

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4 Functional description

4.3

Non-inverting and inverting inputs

IN+

IN-

OUT

Figure 9

Logic input to output switching behavior

There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output

while IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high. A minimum input

pulse width is defined to filter occasional glitches.

4.4

Driver outputs

The output driver section uses MOSFETs to provide a rail-to-rail output. This feature permits that tight control

of gate voltage during on-state and short circuit can be maintained as long as the driver’s supply is stable. Due

to the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the gate resistor.

Furthermore, it reduces the power to be dissipated by the driver.

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5 Electrical characteristics and parameters

5

Electrical characteristics and parameters

5.1

Absolute maximum ratings

Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the

integrated circuit. Unless otherwise noted all parameters refer to GND1.

Table 4

Absolute maximum ratings

Parameter

Symbol

Values

Max.

2300

Unit Note or test

condition

Min.

Input to output oﬀset voltage

V_OFFSET

–

V

V_VEE2,max-V_VEE2,min

with V_VEE2,max≥ V_GND1

1) 2)

≥ V_VEE2,min

3)

Power supply output side

V_VCC2

-0.3

40

V

3)

Gate driver output (OUT+, OUT-, OUT, CLAMP) V_OUT

VEE2 - 0.3 VCC2 + 0.3 V

Power supply input side

V_VCC1

V_IN

-0.3

-40

-55

–

17

V

VCC1 - GND1

IN - GND1

–

Logic input voltages (IN+, IN-)

Junction temperature

6.5

150

100

700

88

V

T_J

°C

Storage temperature

T_Stg

°C

–

Power dissipation (input side)

Power dissipation (output side)

Thermal resistance junction to ambient

P_D,IN

P_D,OUT

R_thJA,OUT

Ψ_Jtop

mW

K/W

T_A= 65°C⁴⁾

T_A= 65°C⁵⁾

–

T_A= 85°C 300 mil,

1s0p, P_J= 266 mW

Characterization parameter junction to

package top input side

–

6

ESD robustness

V_ESD,HBM

ESD,CDM

–

4

kV

–

Human body model⁶⁾

TC 1000

Charged device

model⁷⁾

1) for functional operation only

2) See also Chapter 6.1 on page 17

3) With respect to VEE2

4) IC input-side power dissipation is derated linearly with 11.4 mW/°C above 141 °C

5) IC output-side power dissipation is derated linearly with 11.4 mW/°C above 88 °C

6) According to ANSI/ESDA/JEDEC-JS-001-2017 (discharging a 100 pF capacitor through a 1.5 kΩ series

resistor).

7) According to ANSI/ESDA/JEDEC-JS-002-2014 (TC = test condition in volt)

Figure 10

Reference layout for thermal data (Copper thickness 35 μm)

This PCB layout represents the reference layout used for the thermal characterization of the 300 mil package.

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5 Electrical characteristics and parameters

5.2

Operating parameters

Within the operating range the IC operates as described in the functional description. Unless otherwise noted

all parameters refer to GND1.

Table 5

Electrical characteristics

Parameter

Symbol

Values

Unit Note or test

condition

Min.

Max.

1)

Power supply output side

Power supply input side

V_VCC2

V_VCC1

V_IN

10

35

15

V

3.1

-0.3

–

V

–

Logic input voltages (IN+, IN-)

Switching frequency

5.5

1

V

–

f_SW

MHz

°C

max P_Dapplies

Ambient temperature

T_A

-40

-200

125

200

–

Common mode transient immunity (CMTI)

1) With respect to VEE2

CMTI

kV/µs V_OFFSET,test= 1500 V

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5 Electrical characteristics and parameters

5.3

Electrical characteristics

Note:

The electrical characteristics include the spread of values in supply voltages, load and junction

temperatures given below. Typical values represent the median values at T_A= 25°C. Unless otherwise

noted all voltages are given with respect to their respective GND (GND1 for pins 1 to 3 and VEE2 for

pins 6 to 8).

5.3.1

Power supply

Table 6

Power supply

Parameter

Symbol

Values

Typ.

Unit Note or test

condition

Min.

Max.

3.1

UVLO threshold input side (on)

UVLO threshold input side (oﬀ)

UVLO hysteresis input side

V_UVLOH1

V_UVLOL1

V_HYS1

–

V

–

2.5

0.1

–

0.2

–

UVLO threshold output side (on) V_UVLOH2,1

10.0

–

1ED3120MC12H,

1ED3122MC12H,

1ED3123MC12H

UVLO threshold output side (oﬀ) V_UVLOL2,18.0

UVLO threshold output side (on) V_UVLOH2,2

UVLO threshold output side (oﬀ) V_UVLOL2,210.5

–

12.5

–

V

1ED3121MC12H,

1ED3124MC12H,

1ED3131MC12H

UVLO hysteresis output side

Quiescent current input side

Quiescent current output side

Start up time

V_HYS2

I_Q1

0.8

–

V

–

1.1

2

mA

µs

ns

static, output low

I_Q2

–

1)

t_START

t_UVLOflt

–

2.5

–

20

–

UVLO detection filter time

50

1) Parameter is not subject to production test - verified by design/characterization

5.3.2

Logic input

Table 7

Logic input

Parameter

Symbol

Values

Typ.

Unit Note or test

condition

Min.

Max.

1.1

IN+, IN- low input threshold

voltage

V_IN,L

V_IN,H

–

V

–

IN+, IN- high input threshold

voltage

2.5

–

IN+, IN- low/high hysteresis

IN+, IN- input current

IN+ pull down resistor

IN- pull up resistor

V_IN,HYS

I_IN

0.5

–

0.8

–

V

–

100

–

µA

kΩ

V_VCC1= 5 V; V_IN≤ V_VCC1

R_IN,PD

R_IN,PU

–

75

–

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5 Electrical characteristics and parameters

5.3.3

Gate driver

All gate driver output parameters valid for VCC2 = 15 V supply voltage unless specified otherwise.

Table 8

Gate driver

Parameter

Symbol

Values

Typ.

Unit Note or test

condition

Min.

1ED3120MC12H, 1ED3121MC12H, 1ED3131MC12H

Max.

High level output peak current

I_OUT,H

2.0

5.5

–

A

¹⁾VCC2-OUT+ = 15 V,

Output on

High level output on resistance

Low level output peak current

R_DSON,H

I_OUT,L

0.60

2.0

0.95

5.5

1.45

–

Ω

A

I_OUT,H= 0.1 A

¹⁾OUT--VEE2 = 15 V,

Output oﬀ

Low level output on resistance

1ED3122MC12H

R_DSON,L

I_OUT,H

0.50

4.0

0.75

10.0

1.05

–

Ω

A

I_OUT,L= 0.1 A

High level output peak current

¹⁾VCC2-OUT = 15 V,

Output on

High level output on resistance

Low level output peak current

R_DSON,H

I_OUT,L

0.30

4.0

0.55

9.0

0.85

–

Ω

A

I_OUT,H= 0.1 A

¹⁾OUT-VEE2 = 15 V,

Output oﬀ

Low level output on resistance

Low level clamp peak current

Low level clamp on resistance

CLAMP threshold voltage

R_DSON,L

I_CLAMP,L

0.30

2.0

0.45

3.0

0.55

2.0

–

0.65

–

Ω

A

I_OUT,L= 0.1 A

1)

V

= 2.0 V

CLAMP

R_DSON,CLP0.33

0.76

2.4

80

Ω

V

I_CLAMP,L= 0.1 A

V_CLAMP

t_CLPDLY

1.6

–

CLAMP-VEE2

1)

CLAMP comparator to CLAMP

activation delay time

ns

V

≤ 2.0 V

CLAMP

1ED3123MC12H, 1ED3124MC12H

High level output peak current

I_OUT,H

6.0

13.5

–

A

¹⁾VCC2-OUT+ = 15 V,

Output on

High level output on resistance

Low level output peak current

R_DSON,H

I_OUT,L

0.27

6.0

0.45

14.0

0.65

–

Ω

A

I_OUT,H= 0.1 A

¹⁾OUT--VEE2 = 15 V,

Output oﬀ

Low level output on resistance

all variants

R_DSON,L

0.21

0.35

0.60

Ω

I_OUT,L= 0.1 A

High level output voltage

ΔV_OUT,H

ΔV_OUT,L

V_CLP

–

0.3

0.1

2.0

V

VCC2-V_OUT,H; I_OUT

=

20 mA

Low level output voltage

VCC2-V_OUT,H; I_OUT

20 mA

Short circuit clamp voltage

between OUT+/CLAMP and VCC2

Output on, I_OUT=

500 mA, t < 10 µs

1) Parameter is not subject to production test - verified by design/characterization

Datasheet

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5 Electrical characteristics and parameters

5.3.4

Dynamic characteristics

Dynamic characteristics are measured with V_VCC1= 5 V and V_VCC2= 15 V.

V^IN,H

IN+

V^IN,L

80%

20%

90%

10%

OUT

t^PDON

t^PDOFF

t^RISE

t^FALL

Figure 11

Propagation delay, rise and fall time

Filter and propagation delay characteristics (1ED3131MC12H only)

Table 9

Parameter

Symbol

Values

Typ.

Unit Note or test

condition

Min.

Max.

280

Input to output propagation

delay ON

t_PDON

–

270

ns

C_LOAD= 100 pF, IN

turn-on threshold to

10% output on

Input to output propagation

delay OFF

t_PDOFF

270

280

ns

C_LOAD= 100 pF, IN

turn-oﬀ threshold to

90% output oﬀ

Input to output propagation

delay distortion

t_PDISTO

t_INFLT

-15

0

–

15

–

ns

t_PDOFF- t_PDON

Input pulse suppression time

(filter time)

180

shorter pulses will

not propagate to the

output

Minimum input pulse length

t_MININ

t_PD,T

–

220

14

ns

–

1)

Input to output propagation

delay variation due to

temperature

1)

Input to output propagation

delay distortion variation due to

temperature

t_PDISTO,T

–

5

ns

1) 2)

Input to output, part to part

propagation delay ON variation

|t_PDon,P2P

|

15

C

= 100 pF

LOAD

1) Parameter is not subject to production test - verified by design/characterization

Table 10

Filter and propagation delay characteristics (all other variants)

Parameter

Symbol

Values

Typ.

Unit Note or test

condition

Min.

Max.

100

Input to output propagation

delay ON

t_PDON

80

90

ns

C_LOAD= 100 pF, IN

turn-on threshold to

10% output on

Input to output propagation

delay OFF

t_PDOFF

90

100

ns

C_LOAD= 100 pF, IN

turn-oﬀ threshold to

90% output oﬀ

Datasheet

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5 Electrical characteristics and parameters

Table 10

Filter and propagation delay characteristics (all other variants) (continued)

Parameter

Symbol

Values

Typ.

Unit Note or test

condition

Min.

Max.

Input to output propagation

delay distortion

t_PDISTO

t_INFLT

-5

0

–

5

–

ns

t_PDOFF- t_PDON

Input pulse suppression time

(filter time)

30

shorter pulses will

not propagate to the

output

Minimum input pulse length

t_MININ

t_PD,T

–

40

14

ns

–

1)

Input to output propagation

delay variation due to

temperature

1)

Input to output propagation

delay distortion variation due to

temperature

t_PDISTO,T

–

3

7

ns

1) 2)

Input to output, part to part

propagation delay ON variation

|t_PDon,P2P

|

C

= 100 pF

LOAD

1) Parameter is not subject to production test - verified by design/characterization

2) Absolute value at same ambient and operating conditions.

Table 11

Dynamic output characteristics

Parameter

Symbol

Min.

Values

Typ.

Unit Note or test

condition

Max.

Rise time

Fall time

Rise time

Fall time

t_RISE

t_FALL

t_RISE

t_FALL

–

15

30

ns

C_LOAD= 100 pF

C_LOAD= 1 nF

5.3.5

Active shut down

Table 12

Active shut down

Symbol

Parameter

Values

Typ.

Unit Note or test

condition

Min.

Max.

Active shut down voltage, cold

Active shut down voltage, hot

V_ACTSD,C

V_ACTSD,H

–

1.9

V

I_OUT= 10 mA; VCC2

unsupplied; T_A< 20°C

1)

1.7

I

= 10 mA; VCC2

OUT-

unsupplied; T_A≥ 20°C

1) Parameter is not subject to production test - verified by design/characterization

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6 Insulation characteristics

6

Insulation characteristics

Table 13

Safety limiting values

This coupler is suitable for rated insulation only within the given safety limiting values. Compliance with the

safety limiting values shall be ensured by means of suitable protective circuits.

Description

Symbol

T_S

Characteristic

Unit

°C

Maximum ambient safety temperature

Maximum input-side power dissipation at T_A= 25°C¹⁾

Maximum output-side power dissipation at T_A= 25°C²⁾

150

P_SI

100

mW

P_SO

1314

1) IC input-side power dissipation is derated linearly with 11.4 mW/°C above 141 °C

2) IC output-side power dissipation is derated linearly with 8.8 mW/°C above 25°C

6.1

Certified according to VDE 0884-11 reinforced insulation (pending)

Valid for parts with part name 1ED31xxMC12H, x indicate diﬀerent variants.

This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety

ratings shall be ensured by means of suitable protective circuits.

Table 14

Reinforced insulation according to VDE 0884-11

Symbol

Description

Characteristic

Unit

Installation classification per EN 60664-1, Table 1

for rated mains voltage ≤ 150 V (rms)

for rated mains voltage ≤ 300 V (rms)

for rated mains voltage ≤ 600 V (rms)

for rated mains voltage ≤1000 V (rms)

–

I-IV

I-III

I-II

Climatic classification

40/125/21

–

Pollution degree (EN 60664-1)

Minimum external clearance

Minimum external creepage

Minimum comparative tracking index

2

–

CLR

CPG

CTI

q_C

>8

400

<5

mm

–

Apparent charge, method a

nC

V_pd(ini),a= V_IOTM, V_pd(m)= 4500 V, t_ini= 1 min

Apparent charge, method b

q_C

<5

nC

V_pd(ini),b= V_IOTM× 1.2, V_pd(m)= 4500 V, t_ini= 1 s

Isolation resistance at T_A,max

R_IO

> 10¹¹

> 10⁹

8000

1767

6875

Ω

Isolation resistance at T_S

R_{IO_S}

V_IOTM

V_IORM

V_IOSM

Ω

Maximum rated transient isolation voltage

Maximum repetitive insulation voltage

V (peak)

Maximum surge isolation voltage for reinforced isolation

V_TEST= V_IOSM× 1.6

Insulation capacitance

C_IO

0.9

pF

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6 Insulation characteristics

6.2

Recognized under UL 1577 (File E311313)

Table 15

Recognized under UL 1577

Description

Symbol

V_ISO

Characteristic

5700

Unit

Insulation withstand voltage/1 min

Insulation test voltage/1 s

V (rms)

V_{ISO, TEST}

6840

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7 Package dimensions

7

Package dimensions

1)

6.4

7.5

0.81±0.4

Seating plane

Coplanarity

10.3

2)

1.27

0.4±0.08

8

5

Pin1 Marking

1

4

1) Does not include plastic or metal protrusion of 0.15 max. per side

2) Dambar protrusion shall be maximum 0.1mm total in excess of lead width

All dimensions are in units mm

The drawing is in compliance with ISO 128-30, Projection Method 1 [

]

Figure 12

PG-DSO-8 (Plastic (green) dual small outline package, 300 mil)

Revision history

Reference

Description

v2.0

•

Final datasheet derived from 1ED31xxMU12H

R_DSONparameter values update

ESD definition and VDE certification values updated

Datasheet

19

v2.0

2021-03-01

Trademarks

All referenced product or service names and trademarks are the property of their respective owners.

Edition 2021-03-01

Published by

IMPORTANT NOTICE

WARNINGS

The information given in this document shall in no

event be regarded as a guarantee of conditions or

characteristics (“Beschaﬀenheitsgarantie”).

With respect to any examples, hints or any typical

values stated herein and/or any information regarding

the application of the product, Infineon Technologies

hereby disclaims any and all warranties and liabilities

of any kind, including without limitation warranties of

non-infringement of intellectual property rights of any

third party.

In addition, any information given in this document is

subject to customer’s compliance with its obligations

stated in this document and any applicable legal

requirements, norms and standards concerning

customer’s products and any use of the product of

Infineon Technologies in customer’s applications.

Due to technical requirements products may contain

dangerous substances. For information on the types

in question please contact your nearest Infineon

Technologies oﬀice.

Except as otherwise explicitly approved by Infineon

Technologies in

authorized representatives of Infineon Technologies,

Infineon Technologies’ products may not be used in

any applications where a failure of the product or

any consequences of the use thereof can reasonably

be expected to result in personal injury.

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81726 Munich, Germany

a written document signed by

©

2021 Infineon Technologies AG

Do you have a question about any

aspect of this document?

Email: erratum@infineon.com

Document reference

IFX-dmm1587538237306

The data contained in this document is exclusively

intended for technically trained staﬀ. It is the

responsibility of customer’s technical departments to

evaluate the suitability of the product for the intended

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application.


型号：	1ED3123MC12H
厂家：	Infineon
描述：	EiceDRIVERâ¢ 1ED31xxMC12H Compact 驱动
文件：	总20页 (文件大小：453K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

1ED3123MC12H [INFINEON]

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