1ED3830MC12MXUMA1 [INFINEON]
EiceDRIVER⢠1ED38x0Mc12M Enhanced;
| 型号： | 1ED3830MC12MXUMA1 |
| 厂家： | 
Infineon |
| 描述： | EiceDRIVER⢠1ED38x0Mc12M Enhanced 驱动 |
| 文件： | 总46页 (文件大小：798K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1ED38x0Mc12M (1ED-X3 Digital)
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
Single-channel 5.7 kV (rms) isolated gate driver IC with I2C configurability for
DESAT, Soꢀ-off, UVLO, Miller clamp and optional two-level turn-off
Features
•
•
•
•
650 V, 1200 V, 1700 V, 2300 V IGBTs, SiC, and Si MOSFETs
40 V absolute maximum output supply voltage
±3 A, ±6 A, and ±9 A typical sinking and sourcing peak output current
Separate source and sink outputs for hard switching or optional two-level turn-off and with active Miller
clamp
•
•
•
•
•
•
•
•
•
•
I2C bus for parameter configuration and status register readout
Precise, adjustable, and temperature compensated VCEsat detection (DESAT) with fault output
Adjustable IGBT soꢀ turn-off aꢀer desaturation detection
Operation at high ambient temperature up to 125 °C with over-temperature shut down at 160 °C (±10 °C)
Tight IC-to-IC propagation delay matching (tPDD,max = 30 ns)
Undervoltage lockout protection with hysteresis for input and output side with active shut-down
Configurable feedback or fault-off behavior for comparator result of integrated ADC
High common-mode transient immunity CMTI = 200 kV/µs
Small space-saving DSO-16 fine-pitch package with large creepage distance (>8 mm)
Safety certification
-
-
UL 1577 recognized (File E311313) with VISO,test = 6840 V (rms) for 1 s, VISO = 5700 V (rms) for 60 s
IEC 60747-17/VDE 0884-11 approval (pending) with VIORM = 1767 V (peak, reinforced)
•
Additional reference manual available for detailed functional description
Potential applications
•
•
•
•
•
•
•
•
Industrial motor drives - compact, standard, premium, servo drives
Solar inverters
UPS systems
Welding
Commercial and agricultural vehicles (CAV)
Commercial air-conditioning (CAC)
High-voltage isolated DC-DC converters
Isolated switch mode power supplies (SMPS)
PG-DSO-16
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.
Datasheet
Please read the Important Notice and Warnings at the end of this document
v2.1
www.infineon.com/gdisolated
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
Device information
Device information
Product type
Output current
3 A (typ)
Isolation class
reinforced
reinforced
reinforced
UL 1577
Marking
OPN
1ED3830MC12M
1ED3860MC12M
1ED3890MC12M
1ED3830MU12M
1ED3860MU12M
1ED3890MU12M
3830MC12
3860MC12
3890MC12
3830MU12
3860MU12
3890MU12
1ED3830MC12MXUMA1
1ED3860MC12MXUMA1
1ED3890MC12MXUMA1
1ED3830MU12MXUMA1
1ED3860MU12MXUMA1
1ED3890MU12MXUMA1
6 A (typ)
9 A (typ)
3 A (typ)
6 A (typ)
UL 1577
9 A (typ)
UL 1577
Description
The 1ED38x0Mc12M family (X3 Digital) consists of galvanically isolated single channel gate driver ICs in a small
PG-DSO-16 package with a large creepage and clearance of 8 mm. The gate driver ICs provide a typical peak
output current of 3 A, 6 A, and 9 A.
Adjustable control and protection functions are included to simplify the design of highly reliable systems. All
parameter adjustments are done from the input side via the I2C interface (pin SDA and SCL).
All logic I/O pins are supply voltage dependent 3.3 V or 5 V CMOS compatible and can be directly connected to a
microcontroller.
The data transfer across the galvanic isolation is realized by the integrated coreless transformer technology.
VCC1
VCC2,H
DESAT,H
EiceDRIVERTM
ON,H
IN,H
with digital
interface
OFF,H
RDYC, FLT_N
CLAMP,H
GND2,H
I2C
GND1
VCC1
VEE2,H
VCC2,L
CPU
DESAT,L
EiceDRIVERTM
ON,L
with digital
interface
IN,L
OFF,L
RDYC, FLT_N
CLAMP,L
GND2,L
GND1
VEE2,L
Figure 1
Typical application
Datasheet
2
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
Table of contents
Table of contents
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Related products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Pin configuration and functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Configurable parameters via I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
3.2
3.3
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Start-up and fault clearing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Input side logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Operating states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Desaturation protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
DESAT behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Gate driver output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-on behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Turn-off and fault turn-off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Hard switching turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Two-level turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Soꢀ turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Active shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Active Miller clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.8
4.8.1
4.9
4.9.1
4.9.2
4.9.2.1
4.9.2.2
4.9.2.3
4.9.3
4.9.4
4.10
5
5.1
5.2
5.3
Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Voltage supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Logic input and output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Active Miller clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Desaturation protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Two-level turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
Datasheet
3
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
Table of contents
5.4.8
5.4.9
5.4.10
Soꢀ-off current source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Over-temperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
ADC measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6
6.1
6.2
Insulation characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Certified according to VDE 0884-11 reinforced insulation (pending) . . . . . . . . . . . . . . . . . . . . . . . . . .43
Recognized under UL 1577 (File E311313) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Datasheet
4
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
1 Block diagram
1
Block diagram
VCC1
VCC2
2
7
UVLO1
UVLO2
14
10
opt.
CLAMP
CLAMP control,
monitoring, and
ADC input
IN
PWM logic TX
RX
VEE2
VCC2
1
1
FLT_N
6
Output control
and monitoring
with hard-
switching, TLTOff,
and SoftOff
ON
12
11
OFF
RDYC
SDA
5
4
3
VEE2
VCC2
1
LOGIC
TRX
TRX
LOGIC
DESAT
GND2
13
15
DESAT control
and monitoring
SCL
2
UVLO3
VEE2
1
1
8
9
16
GND1
GND1
VEE2
VEE2
Figure 2
Block diagram
Datasheet
5
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
2 Related products
2
Related products
Note:
Please consider the gate driver IC power dissipation and insulation requirements for the selected
power switch and operating condition.
Product group Product name
Description
TRENCHSTOP™
IGBT Discrete
IKQ75N120CS6
IKW15N120BH6
IHW40N120R5
High Speed 1200 V, 75 A IGBT with anti-parallel diode in TO247-3
High Speed 1200 V, 15 A IGBT with anti-parallel diode in TO247
Reverse conducting 1200 V, 40 A IH IGBT with integrated diode in
TO247
CoolSiC™ SiC
IMBF170R650M1
IMW120R045M1
1700 V, 650 mΩ SiC MOSFET in TO263-7 package
1200 V, 45 mΩ SiC MOSFET in TO247-3 package
1200 V, 350 mΩ SiC MOSFET in TO247-4 package
650 V, 27 mΩ SiC MOSFET in TO247-4 package
650 V, 107 mΩ SiC MOSFET in TO247-3 package
EasyPACK™ 1B 1200 V / 45 mΩ sixpack module
EasyDUAL™ 2B 1200 V, 6 mΩ half-bridge module
MOSFET Discrete
IMZ120R350M1H
IMZA65R027M1H
IMW65R107M1H
FS45MR12W1M1_B11
FF6MR12W2M1_B11
CoolSiC™ SiC
MOSFET Module
F3L11MR12W2M1_B74 EasyPACK™ 2B 1200 V, 11 mΩ 3-Level module in Advanced NPC
(ANPC) topology
F4-23MR12W1M1_B11 EasyPACK™ 1B 1200 V, 23 mΩ fourpack module
TRENCHSTOP™
IGBT Modules
F4-200R17N3E4
FS150R17N3E4
FF650R17IE4
EconoPACK™ 3 1700 V, 200 A fourpack IGBT module
EconoPACK™ 3 1700 V, 150 A sixpack IGBT module
PrimePACK™ 3 1700 V, 650 A half-bridge dual IGBT module
PrimePACK™ 3 1700 V, 1000 A half-bridge dual IGBT module
PrimePACK™ 3+ 1700 V, 1200 A dual IGBT module
PrimePACK™ 3+ 1700 V, 1500 A dual IGBT module
PrimePACK™ 3 1700 V, 1500 A dual IGBT module
PrimePACK™ 3+ 1700 V, 1800 A dual IGBT module
FF1000R17IE4
FF1200R17IP5
FF1500R17IP5
FF1500R17IP5R
FF1800R17IP5
FP10R12W1T7_B11
EasyPIM™ 1B 1200 V, 10 A three phase input rectifier PIM IGBT
module
FS100R12W2T7_B11
FP150R12KT4_B11
FS200R12KT4R_B11
EasyPACK™ 2B 1200 V, 100 A sixpack IGBT module
EconoPIM™ 3 1200V three-phase PIM IGBT module
EconoPACK™ 3 1200 V, 200 A sixpack IGBT module
Datasheet
6
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
3 Pin configuration and functionality
3
Pin configuration and functionality
The pin assignment at the gate driver IC generally differentiates between the input side and the output side.
Table 1
General pin assignment
Designation
Pins
1 to 8
9 to 16
input side, input logic signal side, or low voltage side
output side, driver power side, or high voltage side
For simplicity reasons the driver is described as an IGBT driver. For use with MOSFETs and other power switches
simply replace any mentioning of collector and emitter with their corresponding pin names.
3.1
Pin configuration
Table 2
Pin configuration table abbreviations
Description
Abbreviation
Pin type
PWR
Power supply and gate current output pins
Digital input and output pin
Digital input pin
I/O
I
GND
Ground reference pin
AI
Analog input pin
Buffer type
OD
Open drain output
CMOS
PP
CMOS compatible input threshold levels
Push/pull output buffer
analog
special
Pull device
PD
Analog input buffer
Special output/input function, see individual description
Pull-down resistor
Current source
CS
Table 3
Pin configuration
Pin Pin name Pin type Buffer type Pull
Function
no.
device
1
GND1
VCC1
SCL
GND
PWR
I
–
–
–
–
–
–
Ground input side
2
–
Positive power supply input side
Clock input of serial I2C bus
Data I/O of serial I2C bus
3
CMOS
4
SDA
I/O
I/O
OD, CMOS
OD, CMOS
5
RDYC
Combined ready output, high active and fault clear
input and soꢀ-off input, low active
6
FLT_N
I/O
OD, CMOS
–
Fault output, low active and soꢀ-off input, low active
Datasheet
7
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
3 Pin configuration and functionality
Table 3
Pin configuration (continued)
Pin Pin name Pin type Buffer type Pull
Function
no.
device
7
IN
I
CMOS
PD, 40 kΩ Non inverted driver input
8
GND1
VEE2
CLAMP
GND
GND
–
–
–
–
–
Ground input side
9
Negative power supply output side
10
PWR,
AI
OD, PP,
analog
Active Miller clamping with open drain to VEE2,
clamp driver for external MOSFET, or ADC input
11
12
13
14
15
16
OFF
PWR, AI
PWR, AI
AI
OD
–
–
Driver sink output
ON
OD
Driver source output
DESAT
VCC2
GND2
VEE2
special
CS, 500 µA Enhanced desaturation protection
PWR
AI
–
–
–
–
–
–
Positive power supply output side
Signal ground output side
GND
Negative power supply output side
GND1
VCC1
SCL
VEE2
GND2
VCC2
DESAT
ON
1
16
15
14
13
12
11
10
9
2
3
4
5
6
7
8
SDA
RDYC
FLT_N
IN
OFF
CLAMP
VEE2
GND1
Figure 3
3.2
PG-DSO-16 (top view)
Pin functionality
GND1
Reference ground of the input side. Connect direct to input signal ground.
VCC1
Positive power supply terminal of the input side, connect to 5 V or 3.3 V for proper operation. Place a decoupling
capacitor close to this pin and GND1.
SCL and SDA serial bus connection
Serial data I/O and clock input pin of the I2C bus. Connect to a microcontroller with 5 V or 3.3 V I/O and add a
pull-up resistor to positive supply voltage VCC1. Signals SCL and SDA are referenced to GND1.
RDYC ready status output, fault-off input and fault-clear input
Open-drain output reports the correct operation of the device, ready output is high active. Fault-clear input and
fault-off input clears a gate driver fault or switch the gate driver output to off with fault-off function, input is low
active. Connect to a microcontroller with 5 V or 3.3 V I/O with an external pull-up resistor to VCC1. A typical value
for this resistor is 2.2 kΩ. The RDCY signal is referenced to GND1.
Datasheet
8
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
3 Pin configuration and functionality
FLT_N fault output and fault-off input
Open-drain output reports the failures related to operating of the inverter system to the microcontroller, fault
output is active low. Fault-off input switch the gate driver output to off with fault-off function, input is low
active. Connect to a microcontroller with 5 V or 3.3 V I/O with an external pull-up resistor to VCC1. A typical value
for this resistor is 2.2 kΩ. The FLT_N signal is referenced to GND1.
IN non inverting gate driver input
IN input controls the output of the gate driver IC, the IGBT is turned on if IN is set to high. Connect to a PWM
output of the microcontroller with 5 V or 3.3 V IO. An internal pull-down resistor ensures IGBT off-state if not
connected.
VEE2
Negative power supply terminal of the output side. Connect to a voltage of 0 V to -25 V referenced to GND2 for
proper operation. Place a decoupling capacitor close to the following pins:
•
•
VCC2 and VEE2
GND2 and VEE2
If no negative supply voltage is used, all VEE2 pins have to be connected to GND2.
CLAMP Miller clamp output, Miller clamp pre-driver output, ADC input
The function and operating mode of this pin is depending on the register configuration.
High-current clamp output to hold the gate voltage low during collector-emitter-voltage rise. Connect directly
to the gate of the IGBT.
Clamp pre-driver output for the use of an external clamp switch. Connect directly to the gate of a n-channel
MOSFET.
Sensing input for 8-bit ADC. Connect the external signal source between CLAMP and VEE2.
OFF driver output
High-current driver sink output to discharge the gate of the external IGBT and the optional two-level turn-off
control output.The gate driver IC also sinks the Soꢀ-off current at this pin. The pin is used as sense input for the
gate high-level indicator PINSTAT.OFF_PIN and TLTOff comparator PINSTAT .TLTO_LVL. Connect to the gate of
the IGBT via a chosen turn-off gate resistor.
ON driver output
High-current driver source output to charge the gate of the external IGBT and turn it on and sense input for the
CLAMP function. It is also the sense input for the gate low-level indicator PINSTAT.ON_PIN. Connect to the gate
of the IGBT via a chosen turn-on gate resistor.
DESAT enhanced desaturation detection input
Desaturation detection input to monitor the IGBT collector-emitter voltage (VCE) to detect desaturation caused
by short circuit events. Connect to the collector of the driven IGBT via a series connection of a protection
resistor and a high-voltage diode. The DESAT signal is referenced to GND2.
VCC2
Positive power supply terminal of the output side. Connect to sufficient supply voltage referenced to GND2 for
proper operation. Place a decoupling capacitor close to the following pins:
•
•
VCC2 and VEE2
VCC2 and GND2
Datasheet
9
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
3 Pin configuration and functionality
GND2 reference ground
Reference ground of the output side. Connect to common voltage of a bipolar supply and the emitter of the
IGBT. Place a decoupling capacitor close to the following pins:
•
•
VCC2 and GND2
GND2 and VEE2
3.3
Configurable parameters via I2C
The following parameters are fully configurable via the I2C interface. The default behavior describes the gate
driver configuration if only the address configuration has been set before writing CFGOK.USER_OK to 1B.
Table 4
Configurability via I2C
Adjustable parameter
Default behavior/value
12.6 V
VCC2-GND2 turn-on UVLO (max)
VEE2-GND2 UVLO (n.a./-3.5/-6/-12.0 V)
CLAMP pin mode (3 A, pre-driver, or ADC)
UVLO
Not active
3 A sink only
235 ns
Filter time for CLAMP and pin status
monitoring
CLAMP and switch on filter type
Up-reset
Output drive
Two-level turn-off
Hard switch-off
A = 30 V/ns; 9.0 V; 2.0 µs; B = hard switch-off
Soꢀ-off current (set as default fault-off
method)
CSSOFCFG.CSSOFF_I=9D, 1ED3830M: 146 mA,
1ED3860M: 291 mA, 1ED3890M: 437 mA
Driver input filter length
DESAT1 threshold voltage
Leading edge blanking time
DESAT1 filter time
103 ns
9.18 V
400 ns
225 ns
DESAT
DESAT1 filter type
Up-reset
Disabled
DESAT2 threshold, filter, and action
configuration
Fault clear source (RDYC or self clear time)
Self clear time (not active, 400 µs, 1600 µs)
RDYC
Not active
Hard switch-off
Fault-off mode (hard switch-off, soꢀ-off,
Fault/fault
clear
TLTOff)
Over-temperature warning action (warning or Warning
fault off)
Over-temperature warning level
140°C
Datasheet
10
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
4
Functional description
The 1ED38x0Mc12M family (X3 Digital) consists of galvanically isolated single channel gate driver ICs with an
extensive digital adjustable feature parameter set. All adjustments are done from low voltage input side during
start up via I2C bus. The configuration is stored into registers.
To start-up the gate driver IC for normal operation both input and output sides of the gate driver IC need to be
powered.
The 1ED38x0Mc12M family (X3 Digital) is designed to support various supply configurations on the input and
output side. On the output side unipolar and bipolar supply is possible.
The output stage is realized as rail-to-rail. There the gate driver voltage follows the supply voltage without an
additional voltage drop. In addition it provides an easy clamping of the gate voltage during short circuit of an
external IGBT.
The RDYC status output reports correct operation of the gate driver IC like sufficient voltage supply. The FLT_N
status output reports failures in the application like desaturation detection.
To ensure safe operation the gate driver IC is equipped with an input and output side under-voltage lockout
circuit. The UVLO levels are optimized for IGBTs and MOSFETs, and are adjustable.
The desaturation detection circuit protects the external IGBT from destruction at a short circuit. The gate driver
IC reacts on a DESAT fault by turning off the IGBT with one of the following configurable turn-off methods:
•
•
•
two-level turn-off
adjustable soꢀ-off
hard switch-off
The two-level turn-off (TLTOff) is a voltage controlled turn-off function.
The soꢀ turn-off function is used to switch-off the external IGBT in overcurrent conditions in a soꢀ-controlled
manner to protect the IGBT against collector emitter over-voltages.
An adjustable active Miller clamp function protects the IGBT from parasitic turn-on in fast switching
applications.
The 1ED38x0 family also offers several measurement and monitoring functions. The monitoring functions can
be divided into:
•
•
hardware based functions and
ADC measurement based functions.
Note:
Please refer to the reference manual of this product for a detailed functional description. This chapter
does not provide all the information required to fully operate the product.
4.1
Start-up and fault clearing
For normal operation both input and output sides of the gate driver IC need to be powered. A low level at the
FLT_N pin always indicates a fault condition. In this case the IC starts internal mechanisms for fault clearing.
Input side start-up
1.
2.
3.
4.
5.
6.
7.
Voltage at VCC1 reaches the input UVLO threshold: input side of gate driver IC starts operating
FLT_N follows input supply voltage
Input side is ready to communicate across I2C bus, awaiting user gate driver parameter configuration
Records parameters received across the I2C bus
Waits until output side is powered
Initiates internal start-up: Transfers configured values to output side
Performs internal self-test
The complete start-up time tSTART1 depends on the duration of the user parameter configuration.
Datasheet
11
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
Output side start-up
1.
2.
3.
4.
5.
Voltage at VCC2 reaches the output UVLO threshold: output side of gate driver IC starts operating
Activates OFF gate driver output: connected gate stays discharged
Waits until input side is powered
Initiates internal start-up: Receives configured values from input side
Performs internal self-test
The complete start-up time tSTART2 depends on the duration of the user parameter configuration.
The gate driver IC releases RDYC to high to signal a successful start-up and its readiness to operate. The gate
driver IC will follow the status of the IN signal.
Clearing a fault with RDYC to low cycle
1.
2.
3.
Set IN to low
Set RDYC to low for a duration longer than the fault clear time tCLRMIN
Release RDYC to high
a.
b.
If the source of the fault is no longer present, FLT_N is released to high
If another fault source is active, FLT_N stays low and the cycle needs to be repeated
4.
Continue PWM operation
Clearing a fault by self clear timer
1.
2.
3.
Set IN to low
Self clear timer starts counting
Self clear timer reaches self clear time
a.
b.
If the source of the fault is no longer present, FLT_N is released to high
If another fault source is active, FLT_N stays low and the timer restarts
4.
Continue PWM operation
4.2
Supply
The 1ED38x0Mc12M family (X3 Digital) is designed to support various supply configurations. The input side can
be used with a 3.3 V or 5 V supply.
The output side requires either an unipolar supply (VEE2 = GND2) or a bipolar supply.
•
•
Individual supply voltages between VCC2 and GND2 or GND2 and VEE2 shall not exceed 25 V.
The total supply voltage between VCC2 and VEE2 shall not exceed 35 V.
To ensure safe operation of the gate driver IC, it is equipped with an input and output side undervoltage lockout
circuit.
Unipolar supply
In unipolar supply configuration the gate driver IC is typically supplied with a positive voltage of 15 V at VCC2.
GND2 and VEE2 are connected together and this common potential is connected to the IGBT emitter.
Datasheet
12
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
+3V3
+15V
VCC1
VCC2
100n
1µ
1k
DESAT
ON
SGND
GND1
1R
1R
IN
IN
OFF
RDYC
RDYC
CLAMP
GND2
FLT_N
FLT_N
SCL
SCL
SDA
SDA
VEE2
Figure 4
Application example with unipolar supply
Bipolar supply
For bipolar supply the gate driver IC is typically supplied with a positive voltage of 15 V at VCC2 and a negative
voltage of -8 V or -15 V at VEE2 relative to GND2.
Between VCC2 and VEE2 the maximum potential difference is 35 V.
+3V3
+15V
VCC1
GND1
VCC2
100n
1µ
1k
DESAT
ON
SGND
1R
1R
IN
IN
OFF
RDYC
FLT_N
SCL
RDYC
FLT_N
SCL
CLAMP
GND2
1µ
SDA
-8V
SDA
VEE2
Figure 5
Application example with bipolar supply
Negative supply prevents a parasitic turn-on due to the additional voltage margin to the gate turn-on threshold.
VEE2 over GND2 supply connection check
The gate driver IC has a built-in connection check for VEE2. A loss of VEE2 connection will be detected and
signaled via RDYC.
4.3
Input side logic
The input threshold levels are always CMOS compliant. The threshold levels are 30% of VCC1 for low level and
70% of VCC1 for high level.
The pins IN and SCL are for input only, and the pins SDA, FLT_N, and RDYC are input/output pins.
4.4
I2C bus
The 1ED38x0 family is equipped with a standard I2C bus interface to configure various parameters of the gate
driver IC and read out measurement and monitoring registers.
Key I2C features include:
•
•
•
I2C bus slave device implementing all mandatory slave bus protocols for the specification UM10204 rev. 6
7 bit device addresses for individual and group addressing
Initial I2C device address: 1AH (MSB aligned, bits 7:1)
Datasheet
13
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
•
•
Signal voltage level compatible to 3.3 V and 5 V
Supported bus speeds at gate driver data pin (SDA) and clock pin (SCL):
-
-
-
standard-mode (Sm), with bit rates up to 100 kbit/s
fast-mode (Fm), with bit rates up to 400 kbit/s
fast-mode plus (FM+), with bit rates up to 1 Mbit/s
SDA
SCL
SCL
filter
time
SCL
filter
time
data valid data change
data valid data change
SDA
SCL
S - start
P - stop
Figure 6
Start, stop and data conditions
All I2C bus commands start with a start condition and stops with a stop condition. The data at the SDA pin gets
valid if SCL level is above the CMOS level threshold and the filter time has elapsed.
Datasheet
14
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
4.5
Operating states
The 1ED38x0 family of gate driver ICs can take the following states:
•
•
•
OFF state, device not powered
Address configuration state, the I2C addresses can be set, gate driver IC is not active
Parameter configuration state, the gate driver parameters can be set and changed, gate driver IC is not
active
•
•
•
Parameter transfer state, the gate driver IC is transferring the parameters from input side to output side,
gate driver IC is not active
Normal operation, gate driver IC is active, ON and OFF outputs are following the IN signal, registers are read
only
Not ready state, gate driver IC is switched off according to fault off settings, status signaled by a low at RDYC
pin
•
•
Fault state, gate driver IC is switched off according to fault off settings, status signaled by a low at FLT_N pin
See later section for additional sub states on fault clear, soꢀ-reset, recover, and restore of parameter
configuration aꢀer power loss
CFGOK.USER_OK = 0
Not Ready
State
I2CCFGOK.
I2CCFGOK
= 1
CFGOK.
USER_OK
= 1
VCC1 ok
RDYC = 0
FLT_N = x
IN = x
RDYSTAT.
SEC_RDY
= 1
Address
Configuration
State
Parameter
Configuration
State
Parameter
Transfer
State
Normal
Operation
= 0
Soft-reset
VCC1 ok
VCC1 ok
RDYC = 0
FLT_N = x
IN = x
VCC1 ok
VCC2 ok
RDYC = 0
FLT_N = x
IN = x
VCC1 ok
RDYC = 0
FLT_N = 1
IN = 1
VCC2 ok
RDYC = 1
FLT_N = 1
IN = x
Power on
Fault State
OFF State
RDYC = 1
FLT_N = 0
IN = x
VCC1 nok
VCC2 nok
Figure 7
Operating state diagram
•
Pin names in uppercase italic letters, supply pin status listed as either okay (ok) or not okay (nok) and for
logic pins with low (0), high (1), or either (x)
•
•
Register names in uppercase bold letters followed by the register bit name and value
States in bubbles with transitions marked by arrows with conditions attached
4.6
Measurement
The 1ED38x0 family offers several measurement functions and uses a free running successive-approximation-
register analog-to-digital converter (SAR-ADC). The SAR-ADC has a 8 bit resolution and the results are digitally
filtered with a three-point-two pass moving average filter.
Following internal and external parameter measurements are available:
•
•
•
ADCMVCC2 Measurement VCC2 to VEE2
ADCMVDIF Measurement and calculation VCC2 to GND2
ADCMGND2 Measurement GND2 to VEE2
Datasheet
15
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
•
•
ADCMTEMP Measurement junction temperature TJ
ADCMVEXT Measurement external voltages, e.g. NTC
Measurement result registers will be updated sequentially depending on selected sample sources. The update
rate is typically below 100 µs.
The SAR-ADC configuration register ADCCFG is used to activate measurement channels and external voltage
compare behavior. Measurement of internal junction temperature is always active. Activated SAR-ADC
measurements also enable monitoring functions.
4.7
Monitoring
The 1ED38x0 family offers many monitoring functions. The monitoring functions can be divided into:
•
Hardware based functions
The hardware based monitoring functions use dedicated hardware, e.g. fast UVLO.
ADC-based functions
•
The ADC-based functions gather measured values of different parameters and compare them with limit
values. Enable ADC measurement to use related ADC-based monitoring functions.
Both groups contain non-configurable and configurable functions.
Non-configurable hardware monitoring:
•
•
•
•
•
•
•
•
•
•
VEE2 over GND2, e.g. VEE2 connection failure
Turn-off monitoring, VON > VEE2+2 V (FLTEVT.VOUT_ST = 1B)
Gate voltage monitoring below VEE2+2 V (PINSTAT.ON_PIN = 1B)
Gate voltage monitoring above VCC2-2 V (PINSTAT.OFF_PIN = 1B)
Gate voltage monitoring above VTLTOFF (PINSTAT.TLTO_LVL = 1B)
Pin status monitoring of IN pin high (PINSTAT.PWM_IN = 1B)
Pin status monitoring of RDYC pin high (PINSTAT.RDYC = 1B)
Pin status monitoring of FLT_N pin high (PINSTAT.FLT_N = 1B)
VCC1 supply voltage UVLO spike detection (UV1FCNT)
VCC2 supply voltage UVLO spike detection (UV2FCNT)
Configurable hardware monitoring:
•
•
•
Normal VCC2 supply UVLO event (SECUVEVT.UV_VCC2)
Normal VEE2 supply UVLO event (SECUVEVT.UV_VEE2)
Switch-off timeout, VON > VEE2+2 V and maximal switch-off timeout time elapsed (FLTEVT.SOTO_EVT)
Non-configurable ADC-based monitoring:
Over temperature protection event (FLTEVT.OTP_EVT)
Configurable ADC-based monitoring:
•
•
•
•
•
VCC2 supply soꢀ UVLO event (SECUVEVT.UVSVCC2)
VEE2 supply soꢀ UVLO event (SECUVEVT.UVSVEE2)
External voltage compare event (FLTEVT.VEXTFLT)
Over temperature warning event (FLTEVT.OTW_EVT)
Gate driver reaction to VEE2 over GND2 detected
A VEE2 over GND2 event triggers the following sequence:
1.
2.
IC detects VEE2 over GND2
IC initiates an output side reset, including
•
Activation of active shutdown as a safety measure
Datasheet
16
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
•
•
Resetting all configuration registers to their reset values
Ignoring all PWM signals and reporting a not ready state
3.
IC listens to its previously configured I2C address
•
If RECOVER.RESTORE = 1B, the gate driver IC will restore the output side configuration from the input
side
•
If RECOVER.RESTORE = 0B, the gate driver IC performs a soꢀ-reset and waits for a re-configuration
via I2C bus
4.
Aꢀer the configuration of the output side is valid again, the IC continues operation
Note:
To avoid unintended VEE2 over GND2 detection, take extra care in power supply design, routing, and
capacitive blocking at these pins.
Datasheet
17
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
4.8
Desaturation protection
The desaturation detection circuit protects the external IGBT from destruction at a short circuit. The
desaturation protection follows the given sequence:
1.
Voltage at DESAT pin reaches DESAT threshold level, e.g. 9.18 V, for a period of time exceeding the filter
time
2.
3.
4.
Gate driver IC output switches the external IGBT off, using the defined fault off method
Gate driver IC switches FLT_N pin to low to indicate the fault to a connected microcontroller
Short circuit situation is resolved
•
•
•
•
aꢀer the voltage at the ON pin has dropped below the VEE2+2 V threshold,
no other fault condition is present,
the input has been turned off and
the fault has been cleared using the defined fault clear method
+15V
VCC2
D
A
CVCC2
RDESAT
DDESAT
DESAT
LOGIC
RG
FLT_off
OFF
GND2
Figure 8
DESAT circuit (only relevant pins shown)
The high-precision internal current source results in a minimum impact on the DESAT detection variation.
4.8.1
DESAT behavior
The DESAT function offers a leading edge blanking time and filters to optimize the DESAT detection for
application usage.
The leading edge blanking inhibits threshold detection during an IGBT turn on phase. The typical IGBT turn on
behavior starts with charging of the gate, commutation of the application load current and finally VCE voltage
decrease to VCEsat voltage levels. To prevent the gate driver IC from detecting a false DESAT event, leading edge
blanking pauses the DESAT circuit until the time tDESATleb has elapsed.
Following the leading edge blanking time, the gate driver IC forces the DESAT current into the external
DESAT circuit. The current typically flows through a protection resistor, a fast high voltage diode and the
collector-emitter path of the IGBT. The resulting voltage at the DESAT pin is the sum of the voltage drop across
this path.
During a short circuit condition, the VCE voltage increases, resulting in a reverse polarity condition of the DESAT
diode. The remaining DESAT current also increases the voltage level at the DESAT pin and triggers the DESAT
threshold. If the pin voltage level stays above the threshold for the duration of the DESAT filter time tDESATfilter
,
the gate driver IC registers the DESAT event and acts accordingly.
The internal processing time aꢀer DESAT threshold crossing, filtering and beginning of fault-off is defined as
tDESATOUT. The duration of the gate discharge during fault-off is defined as tFLTOFFtot and is depending on the
defined fault off function and the gate load.
Datasheet
18
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
IN
tPDRDYC
tPDON
tFLTOFFtot
OUT
tDESATfilter,x
tDESATxOUTy
VDESAT,x
tDESATleb,x
DESAT
VCE
tDESATFLT
FLT_N
RDYC
>tCLRMIN
Figure 9
DESAT timing with leading edge blanking, filter and reaction times
Datasheet
19
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
4.9
Gate driver output
The gate driver output side uses MOSFETs to provide a rail-to-rail output. Therefore, the gate drive voltage
follows the supply voltage closely.
Due to the low internal voltage drop, the switching behavior of the IGBT is predominantly governed by the
external gate resistor. The gate driver IC offers separate sink and source outputs to adapt the gate resistor for
turn-on and turn-off separately without additional bypass components.
The cell value x in the following table is placeholder for high or low and indicates that this pin does not
influence the resulting gate driver output state. The arrow (→) in cells indicate the transition initiated by the pin
of the logic input and gate driver supply pins resulting in a transition to the gate driver output state as listed.
Table 5
Driver output state including transition behavior
Logic input and gate driver supply
IN RDYC FLT_N
Static gate driver output state: on and off
Gate driver output
VCC1
VCC2
ON
OFF
high
low
high
high
high
high
high
high
high
high
high
tri-state
low
tri-state
Transition to not ready and static not ready state
x
x
high → low
low
high
high
high
high
high
high
→ tri-state
tri-state
→ fault off
low
Transition to fault and static fault state
x
x
high
high
high → low
low
high
high
high
high
→ tri-state
tri-state
→ fault off
low
Transition with VCC1 power loss and unsupplied input side
x
x
x
x
x
x
high → low
low
high
high
→ tri-state
tri-state
→ fault off
low
Transition with VCC2 power loss and unsupplied output side
x
x
x
x
x
x
x
x
high → low
low
→ tri-state
tri-state
→ fault off
active shut down
Datasheet
20
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
4.9.1
Turn-on behavior
The 1ED38x0Mc12M family (X3 Digital) is optimized for hard switching turn-on. A turn-on command switches the
ON pin internally to VCC2.
4.9.2
Turn-off and fault turn-off behavior
The gate driver IC supports different turn-off sequences to adapt to different applications and IGBT currents
during normal switching operation and in the case of a fault.
Table 6
Turn-off sequences
Turn-off reason
Turn-off sequence
Remark
Hard switching
Two-level turn-off Soꢀ turn-off
normal off
X
X
X
adjustable
adjustable
fault turn-off
X
X
The gate driver turn-off behavior can be configured in register DRVCFG.STD_OFF.
The gate driver fault turn-off behavior can be configured in register DRVFOFF.DRV_FOFF.
In some topologies the fault turn-off needs to be delayed for individual switch positions. The fault turn-off delay
time tFAULTOFFn is adjustable in the register F2ODLY.F2O_DLY.
The gate driver monitors the gate voltage and sets the register bit FLTEVT.VOUT_ST to 1B as long as the voltage
at the ON pin is above VEE2 + 2 V.
Once started, the fault turn-off sequence cannot be interrupted by an IN = low turn-off signal.
FLT_N or RDYC
tFAULTOFFn
tFAULTOFFn
tFAULTOFFn
tPDRDYCS,
tPDFLT_NS
V
OUT = 80%
ON + OFF (soft-off)
ON + OFF (TLTOff)
ON + OFF (hard-off)
tPDRDYCT,
tPDFLT_NT
V
OUT = 80%
tPDRDYCH,
tPDFLT_NH
V
OUT = 80%
Figure 10
Fault turn-off sequence initiated by FLT_N or RDYC
Datasheet
21
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
VDESAT
DESAT
tDESATfilter,n
tDESATfilter,n
tDESATfilter,n
tFAULTOFFn
tDESATOUTS
V
OUT = 80%
ON + OFF (soft-off)
ON + OFF (TLTOff)
ON + OFF (hard-off)
tFAULTOFFn
tDESATOUTT
V
OUT = 80%
tFAULTOFFn
tDESATOUTH
V
OUT = 80%
Figure 11
Fault turn-off sequence initiated by DESAT event
4.9.2.1
Hard switching turn-off
Hard switching turn-off supports fast switching applications and applications with emitter-follower booster
stages. The switching behavior of the IGBT is controlled by adjusting the external gate resistance between the
OFF pin and the IGBT gate.
4.9.2.2
Two-level turn-off
The two-level turn-off (TLTOff) is a voltage controlled turn-off function.
Two-level turn-off supports secure IGBT turn-off even under overload conditions with low VCE overshoot. It also
operates in applications with emitter-follower booster stages, typical for high power applications with larger
di/dt. With two-level turn-off the switching behavior of the IGBT is controlled by the plateau voltage and the
ramp speed.
The gate driver IC is switching the IGBT gate off by discharging from positive supply to an intermediate voltage
level plateau to reduce a collector over current and continued turn-off thereaꢀer. In detail this includes:
1.
2.
Discharge gate from VCC2 voltage level to intermediate voltage level with the controlled voltage ramp A.
At the intermediate gate voltage level the IGBT collector current is being limited at overload application
conditions.
3.
4.
The configured duration of ramp A and intermediate voltage level depends on individual application
requirements.
Finally the gate voltage is further reduced by the controlled voltage ramp B until the IGBT is completely
switched off and the gate voltage reaches VEE2.
The gate driver two-level turn-off function can be activated in registerDRVCFG.STD_OFF. The behavior can be
adjusted with four parameters in the registers TLTOC1 and TLTOC2.
IN
tPDOFF
RATLTOFF
VTLTOFF
RBTLTOFF
tTLTOff
ON + OFF
Figure 12
Two-level turn-off timing and ramp-down behavior
Datasheet
22
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
In the two-level turn-off mode, the turn-on propagation delay is a function of the plateau time and the gate
driver propagation delay without TLTOff function tPDon. This means the gate driver propagation delay will be
enlarged by the plateau time for turn-on to ensure a constant on-time of the switch. The two-level turn-off does
not change the on-time of an IN pulse. The TLTOff voltage will be controlled in a closed loop at the OFF output
pin of the gate driver IC.
For switch-off initiated by:
•
•
the IN signal, the gate driver IC is starting the TLTOff sequence aꢀer the propagation delay
the DESAT function, the gate driver switch-off is delayed by desaturation sense to OFF delay and an
optional fault-off delay
•
a non-DESAT fault event or a not ready event on output side, the gate driver switch-off occurs immediately
or aꢀer an optional fault-off delay
Aꢀer the elapsed plateau time the gate driver IC switches from the plateau voltage down to VEE2 voltage.
fault event
output side
tFAULTOFF
tTLTOff
ON + OFF
Figure 13
Two-level turn-off aꢀer fault event (output side)
For switch-off initiated by:
•
FLT_N or RDYC signal or an internal fault event from input side, the output is switched off aꢀer the
propagation delay with an optional fault off delay using the defined fault off function
fault event
input side
tPDFLT_NT
tFAULTOFF
tTLTOff
ON + OFF
Figure 14
Two-level turn-off aꢀer fault event (input side)
4.9.2.3
Soꢀ turn-off
The soꢀ turn-off function protects the IGBT against collector-emitter overvoltage during turn off in an
overcurrent condition. It turns-off the IGBT with a reduced gate current to reduce the di/dt induced
overvoltage..
The IGBT gate is connected via OFF to an internal current sink circuit. The discharge current is typically lower
than the hard switch-off current used for normal operation. Since soꢀ turn-off is a single event aꢀer a failure,
the gate driver IC can handle the additional power dissipation internally.
The soꢀ turn-off function is implemented as a current source which can be adjusted with a 4 bit value in the
register CSSOFCFG.
The adjustable range depends on the current strength of the gate driver IC:
•
•
•
1ED3830M: 15 mA - 233 mA
1ED3860M: 29 mA - 466 mA
1ED3890M: 44 mA - 699 mA
Datasheet
23
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
4 Functional description
4.9.3
Active shut-down
The active shut-down feature ensures a safe IGBT off-state, if the output chip is not supplied. It protects the
IGBT against a floating gate. The IGBT gate is always clamped via OFF to VEE2.
4.9.4
Active Miller clamp
The 1ED38x0Mc12M family (X3 Digital) is equipped with a configurable active Miller clamp function to protect
the IGBT from parasitic turn-on in fast switching applications.
Aꢀer a turn-off command the gate driver IC follows the implemented sequence:
1.
2.
3.
4.
Discharge of the IGBT gate while monitoring the voltage level at the ON pin
Detection of a voltage at the ON pin less than a level of VEE2 + 2.0 V
Filtering of the detection to avoid false CLAMP activation and not to influence regular turn-off behavior
Activating clamp function to keep IGBT gate at VEE2 level
4.10
Short circuit clamping
The integrated short circuit clamping diode limits the IGBT gate over voltage during a short circuit. The over
voltage is typically triggered by the capacitive feedback of the Miller capacitance.
The internal diodes from ON and CLAMP to VCC2 limit the gate driver voltage to a value slightly higher than the
supply voltage. These diode paths are rated for a maximum current of 0.75 A and the duration of 6 µs. Add an
external Schottky diode if higher currents are expected or a tighter clamping is desired. Also use an external
diode if the active Miller clamping circuit uses the pre-driver output configuration.
+15V
+15V
VCC2
VCC2
ON
ON
OFF
OFF
CLAMP
CLAMP
GND2
VEE2
GND2
VEE2
Figure 15
Short circuit clamping circuitry
Datasheet
24
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5
Electrical parameters
5.1
Absolute maximum ratings
Note:
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to
destruction of the integrated circuit. Unless otherwise noted all voltages are given with respect to
their respective GND (GND1 for pins 1 to 8, GND2 for pins 9 to 16).
Table 7
Absolute maximum ratings
Parameter
Symbol Values
Min.
Unit
Note /
Test Condition
Max.
Input to output offset voltage
VOFFSET
–
2300
V
VVEE2,max-VVEE2,min
with VVEE2,max
≥
VGND1
≥ VVEE2,min
1) 2)
Supply voltage input side
VVCC1
-0.3
-0.3
-0.3
-0.3
–
6.5
6.5
6.5
6.5
10
V
–
–
–
–
–
–
–
–
–
Logic input voltage (IN)
VLogicIN
VLogicRF
VLogicI2C
V
Logic input voltage (RDYC, FLT_N)
I2C logic input voltage (SDA, SCL)
V
V
Open drain logic output current (RDYC, FLT_N) ILogicOC
mA
mA
V
I2C logic output current (SDA)
ISDA
–
50
Positive supply voltage output side
Negative supply voltage output side
Maximum supply voltage difference output
VVCC2
VVEE2
Vmax2
-0.3
-40
–
40
0.3
40
V
V
side (VVCC2 - VVEE2
)
DESAT input voltage
VDESAT
VCLAMP
ICLAMP
VOUT
-0.3
VVCC2 +0.3
V
V
A
–
3)
CLAMP input voltage
VVEE2 -0.3 VVCC2 +0.3
2.4
Maximum CLAMP output current
Gate driver output voltage (ON, OFF)
–
t < 5 µs
VVEE2 -0.3 Vmax2 +0.3 V
–
Maximum CLAMP to VCC2 diode IGBT short
tCLP
–
6
µs
ICLAMP/OUT = 0.75 A
circuit clamping time
Junction temperature
TJ
-40
-55
–
150
150
100
700
2
°C
–
Storage temperature
TStg
°C
–
Power dissipation, input side
Power dissipation, output side
ESD capability: Human body model
ESD capability: Charged device model
PD,IN
mW
mW
kV
V
@TA = 25 °C
@TA = 25°C4)
PD,OUT
VESDHBM
VESDCDM
–
5)
–
6)
–
500
1) for functional operation only
2) See also Chapter 6 on page 43
3) May be exceeded during short circuit clamping.
Datasheet
25
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
4) Derating the power above 65°C with 8 mW/°C
5) According to ANSI/ESDA/JEDEC-JS-001-2017 (discharging a 100 pF capacitor through a 1.5 kΩ series
resistor).
6) According to ANSI/ESDA/JEDEC-JS-002-2014 (TC = test condition in volt)
5.2
Thermal parameters
Thermal performance may change significantly with layout and heat dissipation of components in close
proximity.
Figure 16
Reference layout for thermal data (Two layer PCB; copper thickness 35 μm; leꢀ: top
layer; right: bottom layer)
The PCB layout represents the reference layout used for the thermal characterization. Pins 1 and 8 (GND1)
and pins 9 and 16 (VEE2) require ground plane connections for achieving maximum power dissipation. The is
conceived to dissipate most of the heat generated through these pins.
Table 8
Thermal parameters
Parameter
Symbol
Value
Unit
Note / Test Condition
Thermal resistance junction to
ambient
RTHJA,OUT
122
K/W
@TA = 65°C, PD, OUT = 400 mW,
PD, IN = 50 mW, 4 layer test PCB,
PG-DSO-16
Characterization parameter junction ΨJtop
to package top input side
8
K/W
5.3
Operating parameters
Note:
Within the operating range the IC operates as described in the functional description. Unless
otherwise noted all voltages are given with respect to their respective GND (GND1 for pins 1 to 8,
GND2 for pins 9 to 16).
Table 9
Operating parameters
Parameter1)
Symbol
Values
Min.
3.0
Unit
Note /
Test Condition
Max.
5.5
Supply voltage input side
VVCC1
V
V
–
–
Logic input voltages (IN, RDYC, FLT_N, VLogicIN
SDA, SCL)
-0.3
5.5
Positive supply voltage output side
VVCC2
13
25
V
–
Datasheet
26
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 9
Operating parameters (continued)
Parameter1)
Symbol
Values
Unit
Note /
Test Condition
Min.
-25
13
Max.
0
Negative supply voltage output side
VVEE2
V
V
–
–
Supply voltage difference output side Vmax2
(VVCC2 - VVEE2
35
)
2)
Ambient temperature
TA
-40
0
125
250
200
°C
Switching frequency
fSW
kHz
V/ns
max PD applies
Common mode transient immunity
|CMTI|
0
VOFFSET,test =
1500 V
1) Parameter is not subject to production test - verified by design/characterization
2) TJ has to be below over temperature protection temperature TOTPOFF
Datasheet
27
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5.4
Electrical characteristics
Note:
The electrical characteristics include the spread of values in supply voltages, load, and junction
temperatures within the operating parameters and default parameter settings unless specified
otherwise. Typical values represent the median values at TA = 25°C. Unless otherwise noted all
voltages are given with respect to their respective GND (GND1 for pins 1 to 8, GND2 for pins 9 to 16).
5.4.1
Voltage supply
Table 10
Voltage supply
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
3.05
VCC1 UVLO threshold
VUVLO1H
VUVLO1L
VHYS1
–
2.95
V
V
V
–
–
–
2.6
0.1
2.8
–
–
VCC1 UVLO hysteresis
0.14
(VUVLO1H - VUVLO1L
)
VCC1 quiescent current IQ1
–
–
2.4
2.4
4.0
4.0
mA
mA
VVCC1 = 3.3 V, IN =
High, RDYC = High,
FLT_N = High
VCC1 operating current IO1
VVCC1 = 3.3 V, IN =
16 kHz, 50%, RDYC =
High, FLT_N = High,
SCL = Low
VCC2 UVLO threshold
VCC2 UVLO hysteresis
VUVLO2H,0
VUVLO2L,0
VHYS2,0
–
12.0
11.0
1.0
12.6
V
V
V
UVTLVL.UVVCC2TL =
0H
10.4
0.75
–
–
(VUVLO2H,0 - VUVLO2L,0
)
VCC2 UVLO threshold
VUVLO2H,1
VUVLO2L,1
VHYS2,1
–
9.4
8.7
0.7
10.0
V
V
V
UVTLVL.UVVCC2TL =
1H
8.0
0.6
–
–
VCC2 UVLO hysteresis
(VUVLO2H,1 - VUVLO2L,1
)
1)
Soꢀ VCC2 UVLO voltage VUV2S,0
–
–
9.5
–
–
V
V
level
UVSVCC2C.UVSVCC2
L
VUV2S,1
10.0
...
VUV2S,E
VUV2S,F
–
–
–
16.5
17.0
0.5
–
–
–
V
V
V
VEE2 not connected
VVEE2,NC
VVEE2 - VGND2
detection threshold
VEE2 UVLO threshold
VUVLO3H,1
VUVLO3L,1
-3.6
–
-3.5
-3.0
–
V
V
UVTLVL.UVVEE2TL =
1H
-2.9
Datasheet
28
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 10
Voltage supply (continued)
Parameter
Symbol
Min.
Values
Typ.
Unit
Note or Test
Condition
Max.
VEE2 UVLO hysteresis
(VUVLO3L,1 - VUVLO3H,1
VHYS3,1
0.4
0.5
–
–
V
)
VEE2 UVLO threshold
VUVLO3H,2
VUVLO3L,2
VHYS3,2
-6.15
–
-6
V
V
V
UVTLVL.UVVEE2TL =
2H
-5.5
0.5
-5.35
–
VEE2 UVLO hysteresis
0.4
(VUVLO3L,2 - VUVLO3H,2
)
VEE2 UVLO threshold
VUVLO3H,3
VUVLO3L,3
VHYS3,3
-12.3
–
-12.0
-11.0
1.0
–
V
V
V
UVTLVL.UVVEE2TL =
3H
-10.7
–
VEE2 UVLO hysteresis
0.8
(VUVLO3L,3 - VUVLO3H,3
)
1)
Soꢀ VEE2 UVLO voltage VUV3S,0
–
–
-2.0
-3.0
...
–
–
V
V
level
UVSVEE2C.UVSVCC2
E
VUV3S,1
VUV3S,E
VUV3S,F
–
–
–
-16.0
-17.0
3.9
–
–
5
V
V
VCC2 quiescent current IQ2
mA
VVCC2 = 15 V, VVEE2
= -8 V, OUT =
High, DESAT = Low,
DRVCFG.STD_OFF =
0H, DRVFOFF =
00H/01H
VCC2 operating current IO2
–
3.9
5
mA
VVCC2 = 15 V, VVEE2 =
-8 V, OUT = 16 kHz,
50%, DESAT = Low,
CLOAD = 100 pF,
DRVCFG.STD_OFF =
0H, DRVFOFF =
00H/01H
1) Parameter is not subject to production test - verified by design/characterization
Datasheet
29
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5.4.2
Logic input and output
Table 11
Logic input and output
Symbol
Parameter
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
30
Logic low input voltage (IN,
RDYC, FLT_N, SDA, SCL)
VLogicINL
VLogicINH
–
–
–
–
–
%
of VVCC1
Logic high input voltage (IN,
RDYC, FLT_N, SDA, SCL)
70
–
–
%
of VVCC1
Logic low output voltage (RDYC, VRDYC5
,
300
mV
ISINK = 5 mA
FLT_N)
VFLT_N5
Logic low output voltage SDA
VSDA20
–
400
47
mV
kΩ
ISINK = 20 mA
Logic input pull down resistor RINPD
(IN)
33
40
1.0
0
–
Logic input pull down resistor RRDYCPD
,
0.8
-10
0.8
–
1.2
+10
1.2
10
MΩ
µA
–
(RDYC, FLT_N)
RFLT_NPD
Logic input current (SDA, SCL)
ISDA, ISCL
0.1*VCC1 < VI <
0.9*VCC1
Logic input pull down resistor RSDAPD
,
1.0
–
MΩ
pF
–
(SDA, SCL)
RSCLPD
1)
Logic pin input capacitance
CSDA, CSCL
(SDA, SCL)
1) Parameter is not subject to production test - verified by design/characterization
Datasheet
30
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5.4.3
Gate driver
Note:
High and low level output currents are absolute values without an information of current direction.
Table 12
Gate driver
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
High level output
voltage
VON0
–
VVCC2 + 0.87 VVCC2 + 1.01
V
ION = 500 mA1)
2) 3)
High level output peak ION
current 1ED3830M
2.6
3.8
1.12
2.5
0.82
7.5
0.56
5.0
0.41
11
–
A
Ω
A
Ω
A
Ω
A
Ω
A
Ω
A
Ω
V
C
= 33 nF
LOAD
High level output on
resistance 1ED3830M
RDSON,H
0.51
2.0
0.31
5.2
0.26
4.0
0.16
7.9
0.17
6.0
0.11
–
2.24
ION = 67 mA3)
2) 4)
Low level output peak IOFF
current 1ED3830M
–
C
LOAD
= 33 nF
Low level ouput on
RDSON,L
1.64
IOFF = 67 mA4)
resistance 1ED3830M
2) 3)
High level output peak ION
current 1ED3860M
–
C
LOAD
= 68 nF
High level output on
resistance 1ED3860M
RDSON,H
1.13
ION = 133 mA3)
2) 4)
Low level output peak IOFF
current 1ED3860M
–
C
LOAD
= 68 nF
Low level ouput on
RDSON,L
0.83
IOFF = 133 mA4)
resistance 1ED3860M
2) 3)
High Level output peak ION
current 1ED3890M
–
C
LOAD
= 100 nF
High level output on
resistance 1ED3890M
RDSON,H
0.38
7.5
0.28
–
0.75
ION = 200 mA3)
2) 4)
Low Level output peak IOFF
current 1ED3890M
–
C
LOAD
= 100 nF
Low level ouput on
RDSON,L
0.55
IOFF = 200 mA4)
resistance 1ED3890M
5)
5)
5)
Active Shut Down
Voltage OFF 1ED3830M
VACTSD
VACTSD
VACTSD
VVEE2 +2.4
VVEE2 +2.4
VVEE2 +2.4
IOUT = 67 mA,VVCC2
open
Active Shut Down
Voltage OFF 1ED3860M
–
–
V
IOUT = 133 mA,VVCC2
open
Active Shut Down
–
–
V
IOUT = 200 mA,VVCC2
Voltage OFF 1ED3890M
open
1) Integrated diode ON vs. VCC2 clamping test
2) Parameter is not subject to production test - verified by design/characterization
3) IN = High, ON = High; VCC2-ON = 15 V; RG = 0.1 Ω; VCC2 = 15 V; VEE2 = -8 V
4) IN = Low, OFF = Low; OFF-VEE2 = 15 V; RG = 0.1 Ω; VCC2 = 15 V; VEE2 = -8 V
Datasheet
31
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5) With reference to VEE2
5.4.4
Active Miller clamp
Table 13
Active Miller clamp
Parameter
Symbol
Min.
Values
Typ.
Unit
Note or Test
Condition
Max.
VVCC2 +1.63
VVCC2 +1.1
VVEE2+11.5
–
High level clamp
voltage
VCLAMPH0
VCLAMPH1
–
–
VVCC2 +1.5
VVCC2 +0.9
VVEE2+9.5
VVEE2+6.7
0.27
V
V
V
V
A
ICLAMP = 500 mA1) 2)
ICLAMP = 50 mA1) 2)
ICLAMPH = 5 mA3)
ICLAMPH = 50 mA3)
4) VCC2 = 15 V; VEE2 =
0 V; CCLAMP = 100 nF;
RCLAMP = 1 Ω
Clamp-driver high level VCLAMPDH1 VVEE2+7.5
output voltage
VCLAMPDH2 VVEE2+4.5
Clamp-driver high level ICLAMPH
output peak current
0.20
–
Clamp/Clamp-driver
output low level
current
ICLAMPL,2
1.1
1.8
3.5
–
–
A
A
4) VCC2 = 15 V; VEE2
= 0 V; VCLAMP = 2 V;
CCLAMP = 100 nF;
RCLAMP = 0.1 Ω
4) VCC2 = 15 V; VEE2
= 0 V; VCLAMP = 5 V;
CCLAMP = 100 nF;
RCLAMP = 0.1 Ω
Clamp/Clamp-driver
output low level
current
ICLAMPL,5
2.2
Clamp/Clamp-driver
output low level ON
resistance
RDSON,CLP 0.50
0.85
2.0
1.35
2.5
Ω
V
ICLAMPL = 200 mA
Clamp threshold
voltage
VON_CLAMP 1.5
Related to VEE2
CLCFG.CLFILT_T
Filter time for CLAMP
and pin status
monitoring
tCLAMPfilter,1 90
tCLAMPfilter,2 123
tCLAMPfilter,3 159
tCLAMPfilter,4 195
tCLAMPfilter,5 225
tCLAMPfilter,6 263
tCLAMPfilter,7 296
105
145
190
235
275
325
370
120
167
221
275
325
387
444
ns
ns
ns
ns
ns
ns
ns
ns
4) 5)
CLAMP reaction time in tCLAMP_ON 16 +
CLAMP mode
23 +
tCLAMPfilter
35 +
tCLAMPfilter
C
C
= 100 pF
= 100 pF
LOAD
tCLAMPfilter
4) 6)
CLAMP reaction time in tCLAMPD_ON 24 +
35 +
53 +
ns
LOAD
CLAMP driver mode
tCLAMPfilter
tCLAMPfilter
tCLAMPfilter
Switch-off time-out
time
tCTT,0
tCTT,1
tCTT,2
–
–
–
0.2
0.4
0.6
–
–
–
µs
µs
µs
4) SOTOUT.SOTOUT_T
Datasheet
32
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 13
Active Miller clamp (continued)
Parameter
Symbol
Min.
Values
Typ.
Unit
Note or Test
Condition
Max.
tCTT,3
tCTT,4
tCTT,5
tCTT,6
tCTT,7
tCTSOOS
–
–
–
–
–
–
0.8
–
–
–
–
–
–
µs
µs
µs
µs
µs
µs
1.2
1.6
2.4
3.2
2.4
Switch-off time-out
soꢀ-off offset time
4) additional time-out
delay during soꢀ-off
1) Integrated diode CLAMP vs. VCC2 clamping test
2) only valid for direct clamping: IN = High, OUT = High
3) only valid for clamp pre-driver output: IN = Low, OUT = Low
4) Parameter is not subject to production test - verified by design/characterization
5) CLAMP mode reaction time specified with 3.3 kΩ pull-up from CLAMP to 3.3 V, from CLAMP threshold until
reaching 0.8 V (falling) at CLAMP pin
6) CLAMP driver mode reaction time specified from CLAMP threshold until reaching 0.8 V (rising) at
CLAMP(DRV) pin
5.4.5
Dynamic characteristics
Dynamic characteristics are measured with VVCC1 = 5 V, VVCC2 = 15 V and VVEE2 = -8 V, short filter time (PSUPR),
hard switch off (DRVCFG), and CLAMP function activated unless specified otherwise.
Table 14
Dynamic characteristics
Symbol
Parameter
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
Input pulse suppression tINMIN,0
98
103
108
192
115
207
ns
ns
ns
ns
PSUPR.IN_SUPR
time IN
tINMIN,1
174
183
100
180
Input pulse suppression tRDYCMIN,0 85
time RDYC/FLT_N for
PSUPR.IN_SUPR
tRDYCMIN,1
tFLT_NMIN,1
,
153
enable / fault off
Input pulse width RDYC
for FLT_N reset (Fault
clear time)
tCLRMIN
–
1.0
1.2
µs
FCLR.FCLR_CFG = 0
Fault self clear time for
FLT_N reset
tFSCLR,0
tFSCLR,1
–
400
1600
50
440
µs
µs
ns
ns
ns
FCLR.FCLR_CFG = 1,
FCLR.FSCLR_T
–
1760
59
Input pulse suppression tI2CMIN,0
for I2C (SDA, SCL)
41
74
20
PSUPR.IN_SUPR
tI2CMIN,1
90
106
120
Output fall time for I2C
(SDA)
tI2CFALL
–
1) VCC1 = 5 V; VLogicIN
= VVCC1*70% ...
VVCC1*30%
Datasheet
33
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 14
Dynamic characteristics (continued)
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
Input IN to output
propagation delay ON
tPDON
226
218
-23
–
244
236
-8
270
262
7
ns
CLOAD = 100 pF, VIN =
70%, VOUT=20%, with
tINMIN,0
Input IN to output
propagation delay OFF
tPDOFF
tPDISTO
tPDD
ns
ns
ns
CLOAD = 100 pF, VIN =
30%, VOUT=80%, with
tINMIN,0
Input to output
propagation delay
distortion (tPDOFF - tPDON
CLOAD = 100 pF
)
Input IN to output
–
30
1) same conditions
propagation delay
distortion between any
devices (tPDON-tPDON) or
(VIN, VVCC1, VVCC2
and VVEE2, CLOAD, TA,
tINMIN,0
)
(tPDOFF-tPDOFF
)
1)
State synchronization
time between input and
output
tSSIO
–
–
13
µs
ns
Input RDYC to output on tPDRDYC
propagation delay
447
523
600
CLOAD = 100 pF;
IN high; VRDYC
=
70%, VOUT=20%, with
tINMIN,0
Input RDYC or FLT_N
to Soꢀ-off output
propagation delay
tPDRDYCS
tPDFLT_NS
,
323
303
330
360
390
361
342
387
417
447
407
384
452
482
512
ns
ns
ns
ns
ns
CLOAD = 100 pF, VSignal
= 30%, VOUT=80%,
with tMINRDYC,0, Soꢀ-
off function ICSOFF,15
Input RDYC or FLT_N to
hard switch-off output
propagation delay
tPDRDYCH
tPDFLT_NH
,
CLOAD = 100 pF, VSignal
= 30%, VOUT=80%,
with tMINRDYC,0, OFF
function
Input RDYC or FLT_N
to TLTOff output
propagation delay
1ED3830M
tPDRDYCT
tPDFLT_NT
,
CLOAD = 100 pF, VSignal
= 30%, VOUT=80%,
with tMINRDYC,0
,
TLTOff function,
TLTOC1.TLTO_RA =
3H; .TLTO_V = 13H;
DRVCFG.TLTO_GCH
= 3H
Input RDYC or FLT_N
to TLTOff output
propagation delay
1ED3860M
tPDRDYCT
tPDFLT_NT
,
Input RDYC or FLT_N
to TLTOff output
propagation delay
1ED3890M
tPDRDYCT
tPDFLT_NT
,
Datasheet
34
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 14
Dynamic characteristics (continued)
Symbol Values
Typ.
Parameter
Unit
Note or Test
Condition
Min.
Max.
Fault off event to fault off tFAULTOFF,00
–
0
–
µs
µs
µs
F2ODLY.F2O_DLY
Step size 0.25 µs,
initial step is 12.5 ns
longer
delay time
tFAULTOFF,01 -5%
tFAULTOFF,02 -5%
0.263
0.513
...
+5%
+5%
tFAULTOFF,1E -5%
tFAULTOFF,1F -5%
7.513
7.763
15
+5%
+5%
30
µs
µs
ns
Rise time 1ED3830M
Fall time 1ED3830M
Rise time 1ED3860M
Fall Time 1ED3860M
Rise Time 1ED3890M
Fall Time 1ED3890M
tRISE
tFALL
tRISE
tFALL
tRISE
tFALL
–
–
–
–
–
–
CLOAD = 1 nF, VOUT
20% to 80%
:
15
15
15
15
15
30
30
30
30
30
ns
ns
ns
ns
ns
CLOAD = 1 nF, VOUT
:
80% to 20%
CLOAD = 2.2 nF, VOUT
20% to 80%
:
:
:
:
CLOAD = 2.2 nF, VOUT
80% to 20%
CLOAD = 3.3 nF, VOUT
20% to 80%
CLOAD = 3.3 nF, VOUT
80% to 20%
1) Parameter is not subject to production test - verified by design/characterization
5.4.6
Desaturation protection
All parameters valid for VCC1 = 5 V, VCC2 = 15 V, and VEE2 = 0 V unless specified otherwise.
Table 15
Desaturation protection
Symbol
Parameter
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
DESAT charge current
IDESATC
470
259
500
525
366
µA
kΩ
VDESAT = 0 V
DESAT voltage divider RDVD
resistance
312.5
between DESAT and
GND2 pins
DESAT clamp and
discharge ON
resistance
RDSON,D
–
7.7
25.0
Ω
IDESATD = 200 mA
DESAT threshold level VDESAT,1F
8.88
8.50
8.23
7.96
9.18
8.89
8.61
8.33
9.48
8.99
8.70
8.70
V
V
V
V
D1LVL.D1_V_LVL,
D2LVL.D2_V_LVL
VDESAT,1E
VDESAT,1D
VDESAT,1C
Datasheet
35
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 15
Desaturation protection (continued)
Parameter
Symbol
Values
Typ.
8.05
Unit
Note or Test
Condition
Min.
7.68
Max.
8.42
VDESAT,1B
VDESAT,1A
VDESAT,19
VDESAT,18
VDESAT,17
VDESAT,16
VDESAT,15
VDESAT,14
VDESAT,13
VDESAT,12
VDESAT,11
VDESAT,10
VDESAT,0F
VDESAT,0E
VDESAT,0D
VDESAT,0C
VDESAT,0B
VDESAT,0A
VDESAT,09
VDESAT,08
VDESAT,07
VDESAT,06
VDESAT,05
VDESAT,04
VDESAT,03
VDESAT,02
VDESAT,01
VDESAT,00
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ns
7.41
7.14
6.86
6.63
6.36
6.08
5.81
5.54
5.26
4.99
4.72
4.52
4.33
4.13
3.94
3.73
3.54
3.35
3.16
2.96
2.77
2.57
2.38
2.17
2.02
1.83
1.67
7.77
7.49
7.20
6.96
6.68
6.40
6.12
5.84
5.55
5.27
4.99
4.79
4.59
4.39
4.19
3.98
3.78
3.58
3.38
3.18
2.98
2.78
2.58
2.37
2.21
2.01
1.85
100
8.13
7.84
7.54
7.29
7.00
6.72
6.43
6.14
5.84
5.55
5.26
5.06
4.85
4.65
4.44
4.23
4.02
3.81
3.60
3.40
3.19
2.99
2.78
2.57
2.40
2.19
2.03
134
DESAT leading edge
blanking time
tDESATleb,00 65
tDESATleb,01 163
tDESATleb,02 211
DLEBT.D_LEB_T, VON
20% rising to VDESAT
200
237
= 1 V, CLOAD
=
250
288
100 pF, CDESAT = 2 pF,
tFAULTOFF,00
...
tDESATleb,3E 3094
3250
3406
ns
Datasheet
36
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 15
Desaturation protection (continued)
Symbol Values
Typ.
3300
Parameter
Unit
Note or Test
Condition
Min.
tDESATleb,3F 3142
tDESATfilter,00
tDESATfilter,01 48
–
Max.
3458
ns
ns
ns
ns
ns
ns
ns
DESAT filter time
–
–
–
D1FILT.D1FILT_T,
D2FILT.D2FILT_T
75
105
–
...
tDESATfilter,06 286
tDESATfilter,07 333
tDESATfilter,08 429
325
375
475
...
368
421
526
tDESATfilter,0E 1000
tDESATfilter,0F 1095
tDESATfilter,10 1286
1075
1175
1375
...
1158
1263
1474
ns
ns
ns
tDESATfilter,16 2429
tDESATfilter,17 2619
tDESATfilter,18 3000
2575
2775
3175
...
2737
2947
3368
ns
ns
ns
tDESATfilter,1E 5286
tDESATfilter,1F 5667
5575
5975
743
5895
6316
883
ns
ns
ns
DESAT1 sense to FLT_N tDESAT1FLT
623
VFLT_N = 30%, IFLT _N
= 5 mA, tDESATfilter,04
CFLT_N = 100 pF
low delay
,
DESAT2 sense to FLT_N tDESAT2FLT
low delay
673
793
933
ns
ns
ns
ns
DESAT1 sense to OFF
low delay, Soꢀ-off
tDESAT1OUTS 287 +
tDESATfilter
333 +
tDESATfilter
382 +
tDESATfilter
VOUT = 80%, CLOAD =
100 pF, tFAULTOFF,n = 0
µs, ICSOFF,15
DESAT2 sense to OFF
low delay, Soꢀ-off
tDESAT2OUTS 337 +
tDESATfilter
383 +
tDESATfilter
432 +
tDESATfilter
DESAT1 sense to OFF
low delay , TLTOff,
1ED3830M
tDESAT1OUTT3 294 +
tDESATfilter
359 +
tDESATfilter
427 +
tDESATfilter
VOUT = 80%, CLOAD =
100 pF, tFAULTOFF,n = 0
µs, TLTOC1.TLTO_RA
= 3H, TLTOC1.TLTO_V
= 13H,
DRVCFG.TLTO_GCH
= 3H
DESAT1 sense to OFF
low delay , TLTOff,
1ED3860M
tDESAT1OUTT6 324 +
tDESATfilter
389 +
tDESATfilter
457 +
tDESATfilter
ns
ns
DESAT1 sense to OFF
low delay , TLTOff,
1ED3890M
tDESAT1OUTT9 354 +
tDESATfilter
419 +
tDESATfilter
487 +
tDESATfilter
Datasheet
37
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 15
Desaturation protection (continued)
Symbol Values
Typ.
409 +
Parameter
Unit
Note or Test
Condition
Min.
tDESAT2OUTT3 344 +
tDESATfilter
Max.
477 +
DESAT2 sense to OFF
low delay , TLTOff,
1ED3830M
ns
tDESATfilter
tDESATfilter
DESAT2 sense to OFF
low delay , TLTOff,
1ED3860M
tDESAT2OUTT6 374 +
tDESATfilter
439 +
tDESATfilter
507 +
tDESATfilter
ns
ns
ns
ns
DESAT2 sense to OFF
low delay , TLTOff,
1ED3890M
tDESAT2OUTT9 404 +
tDESATfilter
469 +
tDESATfilter
537 +
tDESATfilter
DESAT1 sense to OFF
low delay, hard switch-
off
tDESAT1OUTH 267 +
tDESATfilter
314 +
tDESATfilter
359 +
tDESATfilter
VOUT = 80%, CLOAD =
100 pF, tFAULTOFF,n = 0
µs
DESAT2 sense to OFF
low delay, hard switch-
off
tDESAT2OUTH 317 +
tDESATfilter
364 +
tDESATfilter
409 +
tDESATfilter
Datasheet
38
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5.4.7
Two-level turn-off
Table 16
Two-level turn-off
Parameter1)
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
Two-level turn-off time2)
tTLTOff,00
tTLTOff,01
–
0
–
µs
µs
TLTOC2.TLTO_T;
CLOAD = 100 pF;
tMININ,0; VVCC2 = 15 V;
VVEE2 = -8 V; VVCC1
-5%
0.25
...
+5%
–
–
= 5 V; RATLTOff,3
RBTLTOff,0; VTLTOff,13
;
tTLTOff,1E
tTLTOff,1F
-5%
-5%
–
7.50
7.75
7.5
15
+5%
µs
+5%
µs
Two-level turn-off ramp A
Two-level turn-off ramp B
RATLTOff,0
RATLTOff,1
RATLTOff,2
RATLTOff,3
RBTLTOff,4
RBTLTOff,5
RBTLTOff,6
RBTLTOff,7
RBTLTOff,0
–
–
–
–
–
–
–
–
–
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
TLTOC1.TLTO_RA
–
–
30
–
60
–
7.5
15
TLTOC2.TLTO_RB
–
–
30
–
60
–
max
hard switch-off, not
controlled, compare
to driver fall time
Two-level turn-off plateau VTLTOff,00
–
–
4.25
4.5
–
–
V
V
TLTOC1.TLTO_V
voltage
VTLTOff,01
...
VTLTOff,1E
VTLTOff,1F
–
–
11.75
12.0
–
–
V
V
1) Parameter is not subject to production test - verified by design/characterization
2) Two-level turn-off time defined as: Time from turn-off threshold (VIN=30%) to output off detection
threshold (VOFF=VVEE2+2 V) minus turn-off propagation delay tPDOFF
Datasheet
39
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
5.4.8
Soꢀ-off current source
Soꢀ-off current source values specified at OFF pin at VOFF = 3 V with unipolar supply of VVCC2 = 15 V.
Table 17
Current source turn-off
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
Soꢀ-off current source
current 1ED3830M
ICSOFF,0
ICSOFF,1
ICSOFF,2
ICSOFF,3
ICSOFF,4
ICSOFF5
ICSOFF,6
ICSOFF,7
ICSOFF,8
ICSOFF,9
ICSOFF,10
ICSOFF,11
ICSOFF,12
ICSOFF,13
ICSOFF,14
ICSOFF,15
ICSOFF,0
ICSOFF,1
ICSOFF,2
ICSOFF,3
ICSOFF,4
ICSOFF,5
ICSOFF,6
ICSOFF,7
ICSOFF,8
ICSOFF,9
ICSOFF,10
ICSOFF,11
ICSOFF,12
ICSOFF,13
ICSOFF,14
10
24
35
47
58
70
82
93
15
19
36
52
70
87
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
CSSOFCFG.CSSOFF_I
29
44
58
73
87
105
122
140
157
175
192
210
227
245
262
280
36
102
116
131
146
160
175
189
204
218
233
29
105
116
128
140
151
163
175
186
22
Soꢀ-off current source
current 1ED3860M
CSSOFCFG.CSSOFF_I
45
58
72
70
87
105
140
175
210
245
280
314
349
384
419
454
489
524
93
116
146
175
204
233
262
291
320
349
379
408
437
116
140
163
186
210
233
256
280
303
326
349
Datasheet
40
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
Table 17
Current source turn-off (continued)
Parameter
Symbol
Min.
Values
Typ.
Unit
Note or Test
Condition
Max.
559
ICSOFF,15
ICSOFF,0
ICSOFF,1
ICSOFF,2
ICSOFF,3
ICSOFF,4
ICSOFF,5
ICSOFF,6
ICSOFF,7
ICSOFF,8
ICSOFF,9
ICSOFF,10
ICSOFF,11
ICSOFF,12
ICSOFF,13
ICSOFF,14
ICSOFF,15
373
34
466
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Soꢀ-off current source
current 1ED3890M
44
54
CSSOFCFG.CSSOFF_I
70
87
105
157
210
262
314
367
419
472
524
577
629
681
734
786
839
105
140
175
210
245
280
314
349
384
419
454
489
524
559
131
175
218
262
306
349
393
437
480
524
568
612
655
699
5.4.9
Over-temperature protection
Table 18
Over-temperature protection and over-temperature warning
Parameter1)
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
150
Max.
170
Over-temperature
protection level
TOTPOFF
160
°C
Over-temperature warning TOTW,7
–
–
–
–
–
–
–
–
95
–
–
–
–
–
–
–
–
°C
°C
°C
°C
°C
°C
°C
°C
OTWCFG.OTW_LVL
level
TOTW,6
101
108
114
120
127
134
140
TOTW,5
TOTW,4
TOTW,3
TOTW,2
TOTW,1
TOTW,0
Datasheet
41
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
5 Electrical parameters
1) Parameter is not subject to production test - verified by design/characterization
5.4.10
ADC measurement
Table 19
ADC voltage and temperature measurement
Parameter1)
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
Max.
Internal ADC voltage max
VADCINTmax
–
–
38.67
–
–
V
ADCMVCC2/
ADCMGND2/
ADCMVDIF = FFH
Internal ADC voltage
resolution
VADCINTres
151.5
mV
External ADC voltage max
VADCEXTmax
VADCEXTres
–
–
2.86
11.2
–
–
V
ADCMVEXT = FFH
External ADC voltage
resolution
mV
Internal temperature ADC
max
TADCTEMPmax 140
150
-40
160
–
°C
°C
°C
ADCMTEMP = 84H
ADCMTEMP = 49H
Internal temperature ADC
min
TADCTEMPmin
TADCTEMPres
–
–
Internal temperature ADC
resolution
3.21
–
1) Parameter is not subject to production test - verified by design/characterization
Datasheet
42
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
6 Insulation characteristics
6
Insulation characteristics
The following isolation classes are available for the 1ED38x0Mc12M family (X3 Digital).
Table 20
Product isolation classes
Marking Insulation characteristics
Product name
Values specified in
UL values
Table 23
Table 23
1ED38x0MU12M 38x0MU12
UL 1577 certified insulation
Reinforced insulation
-
1ED38x0MC12M
38x0MC12
Table 22
Table 21
Safety limiting values
This coupler is suitable for rated insulation only within the given safety ratings. Compliance with the safety
ratings shall be ensured by means of suitable protective circuits.
Description
Symbol
TS
Characteristic
Unit
°C
Maximum ambient safety temperature
Maximum input-side power dissipation at TA = 25°C
Maximum output-side power dissipation at TA = 25°C1)
150
PSI
100
mW
mW
A
PSO
1000
Maximum driver output current (ON, OFF)2)
IOUT
1ED3830MC
1ED3860MC
1ED3890MC
2.4
4.8
7.2
1) IC output-side power dissipation is derated linearly at 8 mW/°C above 65 °C
2) Maximum pulse length of t = 5 µs
6.1
Certified according to VDE 0884-11 reinforced insulation (pending)
Valid for parts with part name 1ED38x0MC12M, x indicate different variants.
This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety
ratings shall be ensured by means of suitable protective circuits.
Table 22
Reinforced insulation according to VDE 0884-11
Symbol
Description
Characteristic
Unit
Installation classification per EN 60664-1, Table 1
for rated mains voltage ≤ 150 V (rms)
for rated mains voltage ≤ 300 V (rms)
for rated mains voltage ≤ 600 V (rms)
for rated mains voltage ≤1000 V (rms)
–
I-IV
I-IV
I-III
I-II
Climatic classification
40/125/21
–
Pollution degree (EN 60664-1)
Minimum external clearance
Minimum external creepage
Minimum comparative tracking index
2
–
CLR
CPG
CTI
>8
>8
400
mm
mm
–
Datasheet
43
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
6 Insulation characteristics
Table 22
Reinforced insulation according to VDE 0884-11 (continued)
Description
Symbol
Characteristic
Unit
Apparent charge, method a
qC
<5
nC
Vpd(ini),a = VIOTM, Vpd(m) = 4500 V, tini = 1 min
Apparent charge, method b
qC
<5
nC
Vpd(ini),b = VIOTM × 1.2, Vpd(m) = 4500 V, tini = 1 s
Isolation resistance at TA,max
RIO
> 1011
> 109
8000
1767
6875
Ω
Isolation resistance at TS
RIO_S
VIOTM
VIORM
VIOSM
Ω
Maximum rated transient isolation voltage
Maximum repetitive insulation voltage
V (peak)
V (peak)
V (peak)
Maximum surge isolation voltage for reinforced isolation
VTEST = VIOSM × 1.6
Insulation capacitance
CIO
1.7
pF
6.2
Recognized under UL 1577 (File E311313)
Table 23
Recognized under UL 1577
Description
Symbol
VISO
Characteristic
Unit
Insulation withstand voltage/1 min
Insulation test voltage/1 s
5700
6840
V (rms)
V (rms)
VISO, TEST
Datasheet
44
v2.1
2021-02-15
EiceDRIVER™ 1ED38x0Mc12M Enhanced
Datasheet
7 Package information
7
Package information
1)
1)
6.4
7.5
0.35 x 45°
0.7±0.2
Seating plane
Coplanarity
Bottom View
16
9
9
16
Pin1 Marking
1
8
8
1
2)
0.65
0.33±0.08
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1 [
]
Figure 17
PG-DSO-16-28/33 - 300 mil 16-pin fine pitch plastic green dual small outline package
Revision history
Revision History
Reference
Description
v2.1
•
•
Change footnotes to tablenotes, added parameter VOFFSET
Product links and certification information update
v2.0
v1.0
v0.8
Editorial changes
Parameter tables competed, editorial changes in functional description
Editorial changes in functional description and parameter tables
Datasheet
45
v2.1
2021-02-15
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2021-02-15
Published by
IMPORTANT NOTICE
WARNINGS
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”).
With respect to any examples, hints or any typical
values stated herein and/or any information regarding
the application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities
of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer’s compliance with its obligations
stated in this document and any applicable legal
requirements, norms and standards concerning
customer’s products and any use of the product of
Infineon Technologies in customer’s applications.
Due to technical requirements products may contain
dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized representatives of Infineon Technologies,
Infineon Technologies’ products may not be used in
any applications where a failure of the product or
any consequences of the use thereof can reasonably
be expected to result in personal injury.
Infineon Technologies AG
81726 Munich, Germany
©
2021 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
IFX-ccp1584346659888
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to such
application.
相关型号：
©2020 ICPDF网 联系我们和版权申明