AFL5005DWES [INFINEON]
HYBRID-HIGH RELIABILITY DC/DC CONVERTER;
| 型号： | AFL5005DWES |
| 厂家： | 
Infineon |
| 描述： | HYBRID-HIGH RELIABILITY DC/DC CONVERTER |
| 文件： | 总11页 (文件大小：177K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94456B
AFL50XXD SERIES
50V Input, Dual Output
HYBRID-HIGH RELIABILITY
DC/DC CONVERTER
Description
The AFL Series of DC/DC converters feature high power
density with no derating over the full military temperature
range. This series is offered as part of a complete family
of converters providing single and dual output voltages
and operating from nominal +28V, +50V, +120V or +270 V
inputs with output power ranging from 80W to 120W.
For applications requiring higher output power,
individual converters can be operated in parallel. The
internal current sharing circuits assure equal current
distribution among the paralleled converters. This series
incorporates International Rectifier’s proprietary
magnetic pulse feedback technology providing optimum
dynamic line and load regulation response. This
feedback system samples the output voltage at the pulse
width modulator fixed clock frequency, nominally 550
KHz. Multiple converters can be synchronized to a system
clock in the 500KHz to 700KHz range or to the
synchronization output of one converter. Undervoltage
lockout, primary and secondary referenced inhibit, soft-
start and load fault protection are provided on all models.
AFL
Features
n 30V To 80V Input Range
±5V, ±12V, and ±15V Outputs Available
n High Power Density - up to 70W/in
n Up To 100W Output Power
n Parallel Operation with Stress and Current
Sharing
n Low Profile (0.380") Seam Welded Package
n Ceramic Feedthru Copper Core Pins
n High Efficiency - to 85%
n Full Military Temperature Range
n Continuous Short Circuit and Overload
Protection
n
3
n Output Voltage Trim
n Primary and Secondary Referenced
Inhibit Functions
n Line Rejection > 40dB - DC to 50KHz
n External Synchronization Port
n Fault Tolerant Design
n Single Output Versions Available
n Standard Microcircuit Drawings Available
These converters are hermetically packaged in two
enclosure variations, utilizing copper core pins to
minimize resistive DC losses. Three lead styles are
available, each fabricated with International Rectifier’s
rugged ceramic lead-to-package seal assuring long term
hermeticity in the most harsh environments.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are fabricated utilizing DSCC
qualified processes. For available screening options,
refer to device screening table in the data sheet. Variations in
electrical, mechanical and screening can be accommodated.
Contact IR Santa Clara for special requirements.
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1
12/14/06
AFL50XXD Series
Specifications
Absolute Maximum Ratings
Input voltage
-0.5V to +50VDC
300°C for 10 seconds
-55°C to +125°C
-65°C to +135°C
Soldering temperature
Operating case temperature
Storage case temperature
Static Characteristics -55°C < TCASE < +125°C, 30V< VIN < 80V unless otherwise specified.
Group A
Parameter
INPUT VOLTAGE
Subgroups
Test Conditions
Min
Nom
Max
Unit
Note 6
30
50
80
V
OUTPUT VOLTAGE
V
= 50 Volts, 100% Load
IN
AFL5005D
AFL5012D
AFL5015D
AFL5005D
AFL5012D
AFL5015D
1
1
1
1
1
1
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
4.95
5.00
5.05
Positive Output
Negative Output
-5.05
-5.00
-4.95
11.88
-12.12
14.85
-15.15
4.90
-5.10
11.76
-12.24
12.00
-12.00
15.00
-15.00
12.12
-11.88
15.15
-14.85
5.10
-4.90
12.24
-11.76
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
V
14.70
-15.30
15.30
-14.70
Positive Output
Negative Output
OUTPUT CURRENT
OUTPUT POWER
V
= 30, 50, 80 Volts - Notes 6, 11
Either Output
IN
AFL5005D
AFL5012D
AFL5015D
12.8
6.4
5.3
Either Output
Either Output
A
Total of Both Outputs. Notes 6,11
80
96
AFL5005D
AFL5012D
AFL5015D
W
µF
100
MAXIMUM CAPACITIVE LOAD
Each Output Note 1
10,000
-0.015
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
V
= 50 Volts, 100% Load - Notes 1, 6
IN
+0.015
%/°C
OUTPUT VOLTAGE REGULATION
Note 10
-0.5
-1.0
+0.5
+1.0
Line
Load
1, 2, 3
1, 2, 3
No Load, 50% Load, 100% Load
V
= 30, 50, 80 Volts.
IN
Cross
V
= 30, 50, 80 Volts. Note 12
IN
%
AFL5005D
1, 2, 3
1, 2, 3
1, 2, 3
Positive Output
Negative Output
Positive Output
Negative Output
-1.0
-8.0
-1.0
-5.0
+1.0
+8.0
+1.0
+5.0
AFL5012D
AFL5015D
Positive Output
Negative Output
-1.0
-5.0
+1.0
+5.0
For Notes to Specifications, refer to page 4
2
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AFL50XXD Series
Static Characteristics (Continued)
Group A
Parameter
Subgroups
Test Conditions
Min
Nom
Max
Unit
OUTPUT RIPPLE VOLTAGE
V
= 30, 50, 80 Volts, 100% Load,
IN
BW = 10MHz
AFL5005D
AFL5012D
AFL5015D
1, 2, 3
1, 2, 3
1, 2, 3
60
80
80
mV
pp
V
IN
= 50 Volts
INPUT CURRENT
1
2, 3
50
60
No Load
I
= 0
OUT
mA
1, 2, 3
1, 2, 3
5.0
5.0
Inhibit 1
Inhibit 2
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
INPUT RIPPLE CURRENT
AFL5005D
V
= 50 Volts, 100% Load
IN
1, 2, 3
1, 2, 3
1, 2, 3
60
60
60
AFL5012D
AFL5015D
mA
pp
V
OUT
= 90% V
, Current split
NOM
CURRENT LIMIT POINT
equally on positive and negative outputs.
Note 5
1
2
3
115
105
125
125
115
140
Expressed as a Percentage
of Full Rated Load
%
VIN = 50 Volts
LOAD FAULTPOWER DISSIPATION
1, 2, 3
32
W
%
Overload or Short Circuit
VIN = 50 Volts, 100% Load
EFFICIENCY
AFL5005D
AFL5012D
AFL5015D
1, 2, 3
1, 2, 3
1, 2, 3
78
80
81
81
84
85
ENABLE INPUTS (Inhibit Function)
Converter Off
1, 2, 3
1, 2, 3
Logical Low on Pin 4 or Pin 12
Note 1
Logical High on Pin 4 and Pin 12 - Note 9 2.0
Note 1
-0.5
0.8
100
50
V
µA
V
Sink Current
Converter On
Sink Current
100
µA
SWITCHING FREQUENCY
1, 2, 3
500
550
600
KHz
SYNCHRONIZATION INPUT
Frequency Range
1, 2, 3
1, 2, 3
1, 2, 3
500
2.0
-0.5
700
10
0.8
100
80
KHz
V
V
ns
%
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Note 1
Note 1
20
Pulse Duty Cycle
1
Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
100
MΩ
ISOLATION
Slight Variations with Case Style
85
g
DEVICE WEIGHT
MTBF
MIL-HDBK-217F, AIF @ T = 40°C
C
300
KHrs
For Notes to Specifications, refer to page 4
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3
AFL50XXD Series
Dynamic Characteristics -55°C < TCASE < +125°C, VIN=50V unless otherwise specified.
Group A
Subgroups
Parameter
Test Conditions
Min
Nom
Max
Unit
LOAD TRANSIENT RESPONSE
Note 2, 8
AFL5005D
Either Output
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 50% ⇔ 100%
-450
-450
450
200
mV
µs
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 10% ⇔ 50%
10% ⇒ 50%
450
200
400
mV
µs
µs
50% ⇒ 10%
AFL5012D
Either Output
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 50% ⇔ 100%
-750
-750
750
200
mV
µs
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 10% ⇔ 50%
10% ⇒ 50%
750
200
400
mV
µs
µs
50% ⇒ 10%
AFL5015D
Either Output
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 50% ⇔ 100%
-750
-750
750
200
mV
µ
s
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 10% ⇔ 50%
10% ⇒ 50%
750
200
400
mV
µs
µs
50% ⇒ 10%
Note 1, 2, 3
LINE TRANSIENT RESPONSE
-500
500
500
mV
µs
Amplitude
Recovery
V
Step = 30 ⇔ 80 Volts
IN
TURN-ON CHARACTERISTICS
Note 4
Overshoot
Delay
4, 5, 6
4, 5, 6
Enable 1, 2 on. (Pins 4, 12 high or
open)
250
120
mV
ms
50
40
75
50
Same as Turn On Characteristics.
LOAD FAULT RECOVERY
LINE REJECTION
MIL-STD-461D, CS101, 30Hz to 50KHz
Note 1
dB
Notes to Specifications:
1.
2.
Parameters not 100% tested but are guaranteed to the limits specified in the table.
Recovery time is measured from the initiation of the transient to where V has returned to within ±1% of
OUT
V
at 50% load.
OUT
Line transient transition time ≥ 100µs.
3.
4.
5.
6.
Turn-on delay is measured with an input voltage rise time of between 100V and 500V per millisecond.
Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
Parameter verified as part of another test.
7.
8.
9.
All electrical tests are performed with the remote sense leads connected to the output leads at the load.
Load transient transition time ≥ 10µs.
Enable inputs internally pulled high. Nominal open circuit voltage ≈ 4.0VDC.
10.
11.
Load current split equally between +V
Output load must be distributed so that a minimum of 20% of the total output power is being provided by
and -V
.
out
out
one of the outputs.
12.
Cross regulation measured with load on tested output at 20% while changing the load on other output from
20% to 80%.
4
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AFL50XXD Series
Block Diagram
Figure I. Dual Output
INPUT
FILTER
1
4
+ INPUT
OUTPUT
FILTER
+ OUTPUT
7
8
9
PRIMARY
BIAS SUPPLY
CURRENT
SENSE
ENABLE 1
OUTPUT RETURN
- OUTPUT
OUTPUT
FILTER
5
SYNC OUTPUT
SHARE
11
12
10
CONTROL
SHARE
AMPLIFIER
ERROR
AMP
& REF
6
3
2
SYNC INPUT
CASE
FB
ENABLE 2
OUTPUT
VOLTAGE TRIM
INPUT RETURN
Although incorporating several sophisticated and useful
ancillary features, basic operation of the AFL50XXD series
can be initiated by simply applying an input voltage to pins 1
and 2 and connecting the appropriate loads between pins 7,
8, and 9. Of course, operation of anyconverter with high
power density should not be attempted before secure at-
tachment to an appropriate heat dissipator. (See Thermal
Considerations, page 7)
Circuit Operation and Application Information
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of the
device is initiated when a DC voltage whose magnitude is
within the specified input limits is applied between pins 1 and
2. If pins 4 and 12 are enabled (at a logical 1 or open) the
primary bias supply will begin generating a regulated house-
keeping voltage bringing the circuitry on the primary side of
the converter to life. Two power MOSFETs used to chop the
DC input voltage into a high frequency square wave, apply
this chopped voltage to the power transformer. As this switch-
ing is initiated, a voltage is impressed on a second winding of
the power transformer which is then rectified and applied to
the primary bias supply. When this occurs, the input voltage
is excluded from the bias voltage generator and the primary
bias voltage becomes internally generated.
Inhibiting Converter Output (Enable)
As an alternative to application and removal of the DC volt-
age to the input, the user can control the converter output by
providing TTL compatible, positive logic signals to either of
two enable pins (pin 4 or 12). The distinction between these
two signal ports is that enable 1 (pin 4) is referenced to the
input return (pin 2) while enable 2 (pin 12) is referenced to the
output return (pin 8). Thus, the user has access to an inhibit
function on either side of the isolation barrier. Each port is
internally pulled “high” so that when not used, an open con-
nection on both enable pins permits normal converter opera-
tion. When their use is desired, a logical “low” on either port
will shut the converter down.
The switched voltage impressed on the secondary output
transformer windings is rectified and filtered to provide the
positive and negative converter output voltages. An error
amplifier on the secondary side compares the positive out-
put voltage to a precision reference and generates an error
signal proportional to the difference. This error signal is mag-
netically coupled through the feedback transformer into
the control section of the converter varying the pulse width of
the square wave signal driving the MOSFETs, narrowing the
pulse width if the output voltage is too high and widening it if it
is too low. These pulse width variations provide the neces-
sary corrections to maintain the magnitude of output voltage
within its’ specified limits.
Figure II. Enable Input Equivalent Circuit
+5.6 V
100K
1N4148
Pin 4 or
Pin 12
290K
180K
Disable
2N3904
Because the primary and secondary sides are coupled by
magnetic elements, full isolation from input to output is
achieved.
Pin 2 or
Pin 8
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5
AFL50XXD Series
Internally, these ports differ slightly in their function. In use,
a low on Enable 1 completely shuts down all circuits in the
converter, while a low on Enable 2 shuts down the secondary
side while altering the controller duty cycle to near zero.
Externally, the use of either port is transparent to the user
save for minor differences in idle current. (See specification
table).
level of +2.0V. The sync output of another converter which
has been designated as the master oscillator provides a
convenient frequency source for this mode of operation.
When external synchronization is not required, the sync in
pin should be left unconnected thereby permitting the
converter to operate at its’ own internally set frequency.
The sync output signal is a continuous pulse train set at
550 ± 50KHz, with a duty cycle of 15 ± 5.0%. This signal is
referenced to the input return and has been tailored to be
compatible with the AFL sync input port. Transition times
are less than 100ns and the low level output impedance is
less than 50Ω. This signal is active when the DC input
voltage is within the specified operating range and the
converter is not inhibited. The sync output has adequate
drive reserve to synchronize at least five additional converters.
A typical connection is illustrated in Figure III.
Synchronization of Multiple Converters
When operating multiple converters, system requirements
often dictate operation of the converters at a common
frequency. To accommodate this requirement, the AFL series
converters provide both a synchronization input and output.
The sync input port permits synchronization of an AFL
converter to any compatible external frequency source
operating between 500KHz and 700KHz. This input signal
should be referenced to the input return and have a 10% to
90% duty cycle. Compatibility requires transition times less
than 100ns, maximum low level of +0.8V and a minimum high
Figure III. Preferred Connection for Parallel Operation
1
12
Enable 2
Power
Input
Vin
Rtn
Share
Trim
Case
AFL
Enable 1
Sync Out
Sync In
- Output
Return
+ Output
7
6
1
Optional
Synchronization
Share Bus
Connection
12
Enable 2
Vin
Rtn
Share
Trim
Case
AFL
Enable 1
Sync Out
Sync In
- Output
to Negative Load
Return
+ Output
to Positive Load
7
6
1
12
Enable 2
Vin
Rtn
Share
Trim
Case
AFL
Enable 1
Sync Out
Sync In
- Output
Return
+ Output
7
6
(Other Converters)
feature of the AFL series operating in the parallel mode is
that in addition to sharing the current, the stress induced by
temperature will also be shared. Thus if one member of a
paralleled set is operating at a higher case temperature, the
current it provides to the load will be reduced as
compenstionfor the temperature induced stress on that
device.
Parallel Operation-Current and Stress Sharing
Figure III. illustrates the preferred connection scheme for
operation of a set of AFL converters with outputs operating
in parallel. Use of this connection permits equal current
sharing among the members of a set whose load current
exceeds the capacity of an individual AFL. An important
6
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AFL50XXD Series
When operating in the shared mode, it is important that
symmetry of connection be maintained as an assurance of
optimum load sharing performance. Thus, converter outputs
should be connected to the load with equal lengths of wire of
the same gauge and sense leads from each converter should
be connected to a common physical point, preferably at the
load along with the converter output and return leads. All
converters in a paralleled set must have their share pins
connected together. This arrangement is diagrammatically
illustrated in Figure III. showing the outputs and return pins
connected at a star point which is located close as possible
to the load.
A conservative aid to estimating the total heat sink surface
area (AHEAT SINK) required to set the maximum case
temperature rise (∆T) above ambient temperature is given
by the following expression:
−1.43
⎧
⎨
⎩
⎫
⎬
⎭
∆T
A
HEAT SINK
≈
− 3.0
0.85
80P
where
As a consequence of the topology utilized in the current
sharing circuit, the share pin may be used for other functions.
For applications requiring only a single converter, the voltage
appearing on the share pin may be used as a “current
monitor”. The share pin open circuit voltage is nominally
+1.00V at no load and increases linearly with increasing
output current to +2.20V at full load. Note that the current
we refer to here is the total device output current, that is, the
sum of the positive and negative output currents.
∆T = Case temperature rise above ambient
⎧
⎨
⎩
⎫
⎭
1
Eff
⎬
−1
P = Device dissipation in Watts = POUT
As an example, it is desired to maintain the case temperature
of an AFL5015D at ≤ +85°C while operating in an open area
whose ambient temperature is held at a constant +25°C;
then
Thermal Considerations
∆T = 85 - 25 = 60°C
Because of the incorporation of many innovative
technological concepts, the AFL series of converters is
capable of providing very high output power from a package
of very small volume. These magnitudes of power density
can only be obtained by combining high circuit efficiency
with effective methods of heat removal from the die junctions.
This requirement has been effectively addressed inside the
device; but when operating at maximum loads, a significant
amount of heat will be generated and this heat must be
conducted away from the case. To maintain the case
temperature at or below the specified maximum of 125°C,
this heat must be transferred by conduction to an
appropriate heat dissipater held in intimate contact with the
converter base-plate.
If the worst case full load efficiency for this device is 83% @
100W; then the power dissipation at full load is given by
1
⎧
⎨
⎩
⎫
⎭
P = 100•
−1 = 100• 0.205 = 20.5W
(
)
⎬
.83
and the required heat sink area is
−1.43
60
⎧
⎨
⎩
⎫
⎬
⎭
A
HEAT SINK
=
− 3.0 = 56.3 in2
80•20.50.85
Since the effectiveness of this heat transfer is dependent on the
intimacy of the baseplate/heatsink interface, it is strongly
recommended that a high thermal conductivity heat transferring
medium is inserted between the baseplate and heatsink. The
material most frequently utilized at the factory during all testing
and burn-in processes is sold under the trade name of Sil-Pad®
Thus, a total heat sink surface area (including fins, if any) of
56 in in this example, would limit case rise to 60°C above
2
ambient. A flat aluminum plate, 0.25" thick and of approximate
2
dimension 4" by 7" (28 in per side) would suffice for this
application in a still air environment. Note that to meet the
criteria in this example, both sides of the plate require
unrestricted exposure to the +25°C ambient air.
1
400 . This particular product is an insulator but electrically
conductive versions are also available. Use of these materials
assures maximum surface contact with the heat dissipater
thereby compensating for any minor surface variations. While
other available types of heat conductive materials and thermal
compounds provide similareffectiveness, these alternatives are
often less convenient and can be somewhat messy to use.
1
Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN
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7
AFL50XXD Series
Input Filter
The AFL50XXD series converters incorporate a single stage
LC input filter whose elements dominate the input load
impedance characteristic during the turn-on. The input
circuit is as shown in Figure IV.
Table I. Output Voltage Trim Values and Limits
AFL5005D AFL5012D AFL5015D
Vout
Radj
0
Vout
Radj
0
Vout
15.5
15.4
15.3
15.2
15.1
15.0
14.6
14.0
13.5
13.0
12.917
Radj
0
5.5
5.4
5.3
5.2
5.1
5.0
4.9
4.8
4.7
12.5
12.4
12.3
12.2
12.1
12.0
11.7
11.3
10.8
10.6
10.417
Figure IV. Input Filter Circuit
12.5K
33.3K
75K
200K
∞
190K
65K
23K
2.5K
0
47.5K
127K
285K
760K
∞
975K
288K
72.9K
29.9K
0
62.5K
167K
375K
1.0M
∞
1.2M
325K
117K
12.5K
0
0.75µH
Pin 1
2.7µfd
Pin 2
4.6
4.583
Undervoltage Lockout
A minimum voltage is required at the input of the converter
to initiate operation. This voltage is set to 26.5 ± 1.5V. To
preclude the possibility of noise or other variations at the
input falsely initiating and halting converter operation, a
hysteresis of approximately 2.0V is incorporated in this
circuit. Thus if the input voltage droops to 24.5 ± 1.5V, the
converter will shut down and remain inoperative until the
input voltage returns to ≈ 25V.
Note that the nominal magnitude of output voltage resides in
the middle of the table and the corresponding resistor value
is set to ∞. To set the magnitude above nominal, the adjust
resistor is connected to output return. To set the magnitude
below nominal, the adjust resistor is connected to the positive
output. (Refer to Figure V.)
For output voltage settings that are within the limits, but
between those presented in Table I, it is suggested that the
resistor values be determined empirically by selection or by
use of a variable resistor. The value thus determined can
then be replaced with a good quality fixed resistor for
permanent installation.
Output VoltageAdjust
By use of the trim pin (10), the magnitude of output voltages
can be adjusted over a limited range in either a positive or
negative direction. Connecting a resistor between the trim
pin and either the output return or the positive output will
raise or lower the magnitude of output voltage. The span of
output voltage magnitude is restricted to the limits shown in
When use of the trim feature is elected, the user should be
aware that the temperature performance of the converter
output voltage will be affected by the temperature
performance of the resistor selected as the adjustment
element and therefore, the user is advised to employ
resistors with an very small temperature coefficient of
resistance.
Table I.
Figure V. Connection for VOUT Adjustment
12
Enable 2
Share
RADJ
-
Trim
+
AFL50xxD
- Vout
To
Loads
Return
+ Vout
7
Connect Radj to + to increase, - to decrease.
8
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AFL50XXD Series
Mechanical Outlines
Case X
Case W
Pin Variation of Case Y
3.000
2.760
ø 0.128
0.050
0.050
0.250
0.250
1.000
1.000
Ref
1.260 1.500
0.200 Typ
Non-cum
Pin
ø 0.040
Pin
ø 0.040
0.220
2.500
0.220
2.800
0.525
2.975 max
0.238 max
0.42
0.380
Max
0.380
Max
Case Y
Case Z
Pin Variation of Case Y
1.150
0.300
ø 0.140
0.25 typ
0.050
0.050
0.250
0.250
1.000
Ref
1.500 1.750 2.00
1.000
Ref
0.200 Typ
Non-cum
Pin
ø 0.040
Pin
ø 0.040
0.220
0.220
1.750
2.500
0.375
0.36
2.800
0.525
2.975 max
0.238 max
0.380
Max
0.380
Max
Tolerances, unless otherwise specified: .XX
.XXX
=
=
±0.010
±0.005
BERYLLIAWARNING: These converters are hermetically sealed; however they contain BeO substrates and should not be ground or subjected to any other
operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium
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9
AFL50XXD Series
Pin Designation
Designation
Pin #
1
2
+ Input
Input Return
Case Ground
Enable 1
3
4
5
Sync Output
Sync Input
+ Output
6
7
8
Output Return
- Output
9
10
11
12
Output Voltage Trim
Share
Enable 2
Standard Microcircuit Drawing Equivalence Table
Standard Microcircuit
Drawing Number
5962-02563
IR Standard
Part Number
AFL5005D
5962-02564
AFL5012D
5962-02565
AFL5015D
10
www.irf.com
AFL50XXD Series
Device Screening
Requirement
MIL-STD-883 Method No Suffix
ES
HB
CH
Temperature Range
Element Evaluation
Non-Destructive
Bond Pull
-20°C to +85°C -55°C to +125°C
-55°C to +125°C -55°C to +125°C
MIL-PRF-38534
2023
N/A
N/A
N/A
Class H
N/A
N/A
N/A
N/A
Internal Visual
Temperature Cycle
Constant Acceleration
PIND
2017
1010
Yes
Cond B
500 Gs
N/A
Yes
Cond C
3000 Gs
N/A
Yes
Cond C
3000 Gs
N/A
N/A
N/A
2001, Y1 Axis
2020
N/A
Burn-In
1015
N/A
48 hrs@hi temp 160 hrs@125°C 160 hrs@125°C
Final Electrical
( Group A )
MIL-PRF-38534
& Specification
MIL-PRF-38534
1014
25°C
25°C
-55°C, +25°C,
+125°C
N/A
-55°C, +25°C,
+125°C
10%
PDA
N/A
Cond A
N/A
N/A
Cond A, C
N/A
Seal, Fine and Gross
Radiographic
External Visual
Cond A, C
N/A
Cond A, C
N/A
2012
2009
Yes
Yes
Yes
Notes:
Best commercial practice
Sample tests at low and high temperatures
-55°C to +105°C for AHE, ATO, ATW
Part Numbering
AFL 50 05 D X /CH
Screening Level
Model
(Please refer to Screening Table)
No suffix, ES, HB, CH
Input Voltage
28 = 28V
50 = 50V
120 = 120V
270 = 270V
Case Style
W, X, Y, Z
Output
D = Dual
Output Voltage
05 = ±5V
12 = ±12V
15 = ±15V
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IR SANTA CLARA: 2270 Martin Av., Santa Clara, California 95050, Tel: (408) 727-0500
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 12/2006
www.irf.com
11
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