AHV2815VSF/ES [INFINEON]
ADVANCED ANALOG HYBRID-HIGH RELIABILITY DC/DC CONVERTERS; 先进的模拟混合高可靠性DC / DC转换器型号: | AHV2815VSF/ES |
厂家: | Infineon |
描述: | ADVANCED ANALOG HYBRID-HIGH RELIABILITY DC/DC CONVERTERS |
文件: | 总9页 (文件大小:83K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 94583
AHV28XX SERIES
28V Input, Single, Dual and Triple Output
ADVANCED ANALOG
HYBRID-HIGH RELIABILITY
DC/DC CONVERTERS
Description
The AHV Series of DC/DC converters are designed to
replace the AHE/ATO family of converters in applica-
tions requiring compliance to MIL-STD-704A through
E, in particular the input surge requirement of 80 volts
specified to withstand transient input voltage of 80 volts.
No input voltage or output power derating is necessary
over the full military temperature range.
AHV
Features
n 80 Transient Input (100 msec max.)
n 50 VDC Input (Continous)
n 16 to 40 VDC Input Range
n Single, Dual and Triple Outputs
n 15 Watts Output Power
These converters are packaged in an extremely rug-
ged, low profile package that meets all requirements of
MIL-STD-883 and MIL-PRF-38534. Parallel seam weld
sealing and the use of ceramic pin feedthru seals as-
sure long term hermeticity after exposure to extended
temperature cycling.
(No Temperature Derating)
n Low Input / Output Noise
The basic circuit is a push-pull forward topology using
power MOSFET switches. The nominal switching fre-
quency is 500KHz. A unique current injection circuit
assures current balancing in the power switches. All
AHV series converters use a single stage LC input filter
to attenuate input ripple current. A low power 11.5volt
series regulator provides power to an epitaxial CMOS
custom pulse width modulator integrated circuit. This
single integrated circuit provides all PWM primary cir-
cuit functions. Power is transferred from primary to sec-
ondary through a ferrite core power transformer. An
error voltage signal is generated by comparing a highly
stable reference voltage with the converter output volt-
age and drives the PWM through a unique wideband
magnetic feedback circuit. This proprietary feedback
circuit provides an extremely wide bandwidth, high gain
control loop, with high phase margin. The feedback
control loop gain is insensitive to temperature, radia-
tion, aging, and variations in manufacturing. The trans-
fer function of the feedback circuit is a function of the
feedback transformer turns ratio which cannot change
when subjected to environmental extremes.
n Full Military Temperature Range
n Wideband PWM Control Loop
n Magnetic Feedback
n Low Profile Hermetic Package (0.405”)
n Short Circuit and Overload Protection
n Constant Switching Frequency (500KHz)
n True Hermetic Package (Parallel Seam
Welded, Ceramic Pin Feedthru)
The CH grade is fully compliant to the require-
ments of MIL-PRF-38534 for class H. The HB
grade is processed and screened to the class H
requirement, but may not necessarily meet all of
the other MIL-PRF-38534 requirements, e.g., el-
ement evaluation and Periodic Inspection (P.I.)
not required. Both grades are tested to meet the
complete group “A” test specification over the full
military temperature range without output power
deration. Two grades with more limited screen-
ing are also available for use in less demanding
applications. Variations in electrical, mechanical
and screening can be accommodated. Contact
Advanced Analog for special requirements.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are available in four screen-
ing grades to satisfy a wide range of requirements.
www.irf.com
1
11/20/02
AHV28XX Series
Specifications (Single Output Models)
TCASE = -55°C to +125°C, VIN = +28V ± 5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Power Output
Soldering
-0.5V to 50VDC (continuous) 80V (100ms)
Internally limited, 17.5W typical
300 C for 10 seconds (1 pin at a time)
°
Temperature Range
Operating
Storage
-55 C to +135 C
° °
-65°C to +135°C
Condition
-55 C
T
+125 C,
≤ °
°
≤
C
Group A
Subgroups
AHV2805S
AHV2812S
AHV2815S
VIN = 28 VDC 5%, C =0,
unless otherwise specified
±
L
TEST
SYMBOL
Min
Max
Min
Max
Min
Max
Units
STATIC
CHARACTERISTICS
OUTPUT
Voltage
VOUT
VIN = 16, 28, and 40 VDC
1
2,3
1,2,3
1,2,3
4.95
4.90
0.0
5.05
5.10
3.00
60
11.88
11.76
0.0
12.12
12.24
1.25
60
14.85
14.70
0.0
15.15
15.30
1.00
60
V
V
A
I
= 0
Current
IOUT
VRIP
VOIUNT = 16, 28, and 40 VDC
Ripple Voltage1
V
= 16, 28, and 40 VDC
mVp-p
BWIN = DC to 1 MHz
Power
POUT
VIN = 16, 28, and 40 VDC
1,2,3
15
15
15
W
REGULATION
Line
VRLINE
VRLOAD
VIN = 16, 28, and 40 VDC
1
2,3
1,2,3
5
25
50
30
60
120
35
75
150
mV
mV
mV
IOUT = 0, half load and full load
Load
VIN = 16, 28, and 40 VDC
IOUT = 0, half load and full load
INPUT
Current
IIN
I
I
= 0, Inhibit (pin 2) = 0
1,2,3
18
50
50
18
50
50
18
50
50
mA
mA
mAp-p
OUT = 0, Inhibit (pin 2) = Open
Ripple Current
EFFICIENCY
IRIP
EFF
IOOUUTT = Full load
IOUT = Full Load
1,2,3,
1
72
72
72
%
TC = +25 C
°
ISOLATION
ISO
Input to output or any pin to
case (except pin 8) at 500
VDC
1
100
100
100
M
Ω
TC = +25 C
No effect on DC performance
°
Capacitive Load 2,3
CL
PD
FS
4
1
4
500
200
200
F
µ
TC = +25 C
°
Load Fault
Power Dissipation
Overload, TC = +25 C4
Short Circuit, TC = +25 C
8.5
8.5
8,5
8.5
8.5
8.5
W
W
°
°
Switching Frequency
IOUT = Full Load
450
550
450
550
450
550
KHz
DYNAMIC
CHARACTERISTICS
Step Load Changes
Output Transient5
VOTLOAD
TTLOAD
50% Load 100% Load
No Load 135 50%
50% Load 135 100%
No Load 335 50% Load
50% Load335 No lLoad
4
4
4
4
4
-300
-500
+300
+500
70
200
5
-300
-750
+300
+750
70
1500
5
-300
-750
+300
+750
70
1500
5
mVpk
mVpk
135
Recovery5,6
s
s
µ
µ
ms
Step Line Changes
Output Transient
VOTLINE
TTLINE
Input step 16 to 40 VDC 3,7
Input step 40 to 16 VDC 3,7
Input step 16 to 40 VDC 3,6,7
Input step 40 to 16 VDC 3,6,7
4
4
4
4
300
-1000
800
500
-1500
800
500
-1500
800
mVpk
mVpk
Recovery
s
µ
µ
800
800
800
s
TURN-ON
Overshoot
Delay
Load Fault Recovery
VTonos
T on D
TRLF
IOUT = OA and Full Load
IOUT = O and Full Load 8
VIN = 16 to 40 VDC
4,5,6
4,5,6
4,5,6
550
10
10
750
10
10
750
10
10
mVpk
ms
ms
Notes to Specifications (Single Output Models)
1. Bandwidth guaranteed by design.Tested for 20 KHz to 2 MHz.
2. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb
loop stability but will interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on.
3. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter shall be guaranteed to the limits specified.
4. An overload is that condition with a load in excess of the rated load but less than necessary to trigger the short circuit protection and is the condition of maximum
power dissipation.
5. Load step transition time between 2 to 10 microseconds.
6. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load.
7. Input step transition time between 2 and 10 microseconds.
8. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhinbit pin (pin 2) while power is
applied to the input. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
2
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AHV28XX Series
Specifications (Dual Output Models)
TCASE = -55°C to +125°C, VIN = +28V ± 5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Power Output
Soldering
-0.5V to 50VDC (continuous) 80V (100ms)
Internally limited, 17.5W typical
300 C for 10 seconds (1 pin at a time)
°
Temperature Range
Operating
Storage
-55 C to +135 C
° °
-65 C to +135 C
°
°
Condition
+125 C,
-55 C
T
≤
C
°
≤
°
Group A
Subgroups
AHV2812D
AHV2815D
V
IN = 28 VDC 5%, C =0,
±
L
unless otherwise specified
SYMBOL
TEST
Min
Max
Min
Max
Units
STATIC
CHARACTERISTICS
OUTPUT
Voltage 1
VOUT
IOUT = 0
1
2,3
1,2,3
1,2,3
V
V
mA
11.88
±11.76
0.0
12.12
14.85
±14.70
0.0
15.15
±
±
±
±
±12.24
±625
60
±15.30
±500
60
Current 1,2
IOUT
VRIP
VIN = 16, 28, and 40 VDC
VIN = 16, 28, and 40 VDC
BW = DC to 2 MHz
Ripple Voltage 1,3
mVp-p
Power 1,2,4
REGULATION
Line 1,5
POUT
VIN = 16, 28, and 40 VDC
1,2,3
15
15
W
VRLINE
IOUT
VRLOAD
VIN = 16, 28, and 40 VDC
1
2,3
1,2,3
30
60
120
35
75
150
mV
mV
mV
IOUT = 0, half load and full load
VIN = 16, 28, and 40 VDC
IOUT = 0, half load and full load
Load 1
INPUT
Current
IIN
I
OUT = 0, Inhibit (pin 2)
1,2,3
18
18
mA
Tied to input return (pin 10)
IOUT = 0, Inhibit (pin 2) = Open
IOUT = Full load
BW = DC to 2MHz
IOUT = Full Load
65
50
65
50
mA
mAp-p
Ripple Current 3
EFFICIENCY
ISOLATION
IRIP
EFF
1,2,3,
1
1
72
72
%
TC = +25 C
°
ISO
Input to output or any pin to
case (except pin 8) at 500 VDC,
TC = +25°C
No effect on DC performance
TC = +25°C
100
100
MΩ
Capacitive Load 6,7
CL
PD
FS
4
1
4
200
200
µF
Load Fault
Power Dissipation
Overload, TC = +25 C8
8,5
8.5
8.5
8.5
W
W
°
Short Circuit, TC = +25°C
Switching Frequency
IOUT = Full Load
450
550
450
550
KHz
DYNAMIC
CHARACTERISTICS
Step Load Changes
Output Transient 9
VOTLOAD
TTLOAD
50% Load 135 100% Load
No Load 135 50%
50% Load 135 100%
No Load 335 50% Load
50% Load 335 No lLoad
4
4
4
4
4
-300
-500
+300
+500
70
1500
5
-300
-500
+300
+500
70
1500
5
mVpk
mVpk
Recovery9,10
S
µ
µS
ms
Step Line Changes
Output Transient 7,11
VOTLINE
TTLINE
Input step 16 to 40 VDC
Input step 40 to 16 VDC
Input step 16 to 40 VDC
Input step 40 to 16 VDC
4
4
4
4
1200
-1500
4
1500
-1500
4
mVpk
mVpk
µs
Recovery 7,10, 11
4
4
µs
TURN-ON
Overshoot 1
VTonOS
T on D
TRLF
IOUT = O and Full Load
IOUT = O and Full Load
4,5,6
4,5,6
4,5,6
600
10
10
600
10
10
mVpk
ms
ms
Delay 1,12
Load Fault Recovery 7
For Notes to Specifications, refer to page 5
www.irf.com
3
AHV28XX Series
Specifications (Triple Output Models)
TCASE = -55°C to +125°C, VIN = +28V ± 5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Power Output
Soldering
-0.5V to 50VDC (continuous) 80V (100ms)
Internally limited, 17.5W typical
300 C for 10 seconds (1 pin at a time)
°
Temperature Range
Operating
Storage
-55 C to +135 C
° °
-65 C to +135 C
°
°
Condition
+125 C,
-55 C
°
T
≤
C
≤
°
Group A
Subgroups
AHV2812T
AHV2815T
VIN = 28 VDC 5%, C =0,
±
TEST
SYMBOL
L
Min
Max
Min
Max
Units
unless otherwise specified
STATIC
CHARACTERISTICS
OUTPUT
Voltage 1
VOUT
IOUT = 0 (main)
1
2,3
1
2,3
1,2,3
1,2,3
1,2,3
4.95
4.90
±11.88
±11.76
0.0
5.05
5.10
4.95
4.90
±14.85
±14.70
0.0
5.05
5.10
V
V
V
IOUT = 0 (dual)1
±12.12
±12.24
2000
±208
80
±15.15
±15.30
2000
±167
80
V
Current 1,2,3
IOUT
VRIP
VIN = 16, 28, and 40 VDC (main)
mA
mA
mVp-p
V
IN = 16, 28, and 40 VDC (dual)1
0.0
0.0
Ripple Voltage1,4
VIN = 16, 28, and 40 VDC
BW = DC to 2 MHz (main)
VIN = 16, 28, and 40 VDC
BW = DC to 2 MHz (main)
VIN = 16, 28, and 40 VDC (main)
(+dual)
1,2,3
40
40
mVp-p
Power 1,2,3
POUT
1,2,3
1,2,3
1,2,3
1,2,3
10
2.5
2.5
15
10
2.5
2.5
15
W
W
W
W
(-dual)
(total)
REGULATION
Line 1,3
VRLINE
VIN = 16, 28, and 40 VDC
IOUT = 0, 50%, and 100% load (main)
IOUT = 0, 50%, and 100% load (dual)
VIN = 16, 28, and 40 VDC
1,2,3
25
±60
25
±75
mV
mV
Load 1,3
VRLOAD
IOUT = 0, 50%, and 100% load (main)
IOUT = 0, 50%, and 100% load (dual)
mV
mV
50
±60
50
±75
INPUT
Current
IIN
IOUT = 0, Inhibit (pin 8)
Tied to input return (pin 10)
IOUT = 0
Inhibit (pin 2) = open
IOUT = 2000 mA (main)
IOUT = ±208mA (±12V)
IOUT = ±167mA (±15V)
BW = DC to 2MHz
IOUT = 2000mA (main)
1,2,3
1,2,3
1,2,3
15
50
50
15
50
50
mA
mA
Ripple Current 4
IRIP
mAp-p
EFFICIENCY
ISOLATION
EFF
ISO
CL
1
1
72
72
%
IOUT
= 208mA ( 12V)
± ±
IOUT = ±167mA (±15V)
Input to output or any pin to
case (except pin 7) at 500 VDC,
TC = +25°C
100
100
MΩ
Capacitive Load 6,7
No effect on DC performance
4
500
200
500
200
TC = +25°C (main)
µF
µF
(dual)
Load Fault
Power Dissipation 3
PD
FS
1
1
8.5
8.5
8.5
8.5
W
W
Overload, TC = +25°C5
Short Circuit, TC = +25 C
°
Switching Frequency 1
IOUT = 2000mA (main)
IOUT = ±208mA (±12V)
IOUT = ±167mA (±15V)
4
450
550
450
550
KHz
For Notes to Specifications, refer to page 5
4
www.irf.com
AHV28XX Series
Specifications (Triple Output Models) - continued
Condition
-55 C
T
+125 C,
≤ °
°
≤
C
Group A
Subgroups
AHV2812T
AHV2815T
V
IN = 28 VDC 5%, C =0,
±
L
TEST
DYNAMIC
SYMBOL
Min
Max
Min
Max
Units
unless otherwise specified
CHARACTERISTICS
Step Load Changes
Output Transient 9
VOTLOAD
TTLOAD
50% Load 135 100% Load
No Load 135 50%
50% Load 135 100%
No Load 335 50% Load
50% Load 335 No lLoad
4
4
4
4
4
-300
-400
+300
+400
100
2000
5
-300
-400
+300
+400
100
2000
5
mVpk
mVpk
Recovery9,10
S
S
µ
µ
ms
Step Line Changes
Output Transient
VOTLINE
TTLINE
Input step 16 to 40 VDC
Input step 40 to 16 VDC
Input step 16 to 40 VDC
Input step 40 to 16 VDC
4
4
4
4
1200
-1500
4
1200
-1500
4
mVpk
mVpk
Recovery 7,10, 11
s
µ
µ
4
4
s
TURN-ON
Overshoot 1
Delay 1,12
VTonOS
T on D
4
4
750
15
750
15
mVpk
ms
IOUT = O and 625mA
±
IOUT = O and 625mA
±
Load Fault Recovery 7
TRLF
4
15
15
ms
Notes to Specifications (Triple Output Models)
1. Tested at each output.
2. Parameter guaranteed by line and load regulation tests.
3. At least 25 percent of the total power should be taken from the (+5 volt) main output.
4. Bandwidth guaranteed by design. Tested for 20KHz to 2MHz.
5. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the
maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a
short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified.
8. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
9. Load step transition time between 2 and 10 microseconds.
10. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent
load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit
pin (pin 8) while power is applied to the input.
Notes to Specifications (Dual Output Models)
1. Tested at each output.
2. Parameter guaranteed by line and load regulation tests.
3. Bandwidth guaranteed by design. Tested for 20KHz to 2MHz.
4. Total power at both outputs.
5. When operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the
maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a
short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified.
8. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
9. Load step transition time between 2 and 10 microseconds.
10. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent
load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit
pin (pin 2) while power is applied to the input.
13. Above 125°C case temperature, derate output power linearly to 0 at 135°C.
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5
AHV28XX Series
AHV28XX (Single Output) Block Diagram
5
4
+Vout
EM I
Filter
1
Return
+Input
8
Drive
1
Case
Pulse W idth
M odulator
Error
Am p &
Ref
FB
2
Enable
3
VADJ
Drive
2
Input
Return
10
AHV28XX (Dual Output) Block Diagram
3
4
5
+Vout
R eturn
-Vout
EM I
Filter
1
+Input
R egulator
Drive
1
2
Enable
Pulse W idth
M odulator
FB
Error Amp
Reference
8
&
Drive
2
C ase
Input
R eturn
10
AHV28XX (Triple Output) Block Diagram
5
+Vout
Regulator
4
-Vout
EM I
Filter
1
2
3
+5V out
+Input
D rive
D rive
1
2
Return
8
Pulse
W idth
M odulator
Enable
7
Error Am p
Reference
FB
&
Case
Input
Return
10
6
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AHV28XX Series
Application Information
Inhibit Function
EMI Filter
Connecting the inhibit pin (Pin 2 of single and dual models,
pin 8 of triple models) to the input return (pin 10) will cause
the converter to shutdown and operate in a low power
standby mode. Power consumption in this mode is calcu-
lated by multiplying Vin times the input current inhibited,
typically 225mW at Vin equal to 28 volts. The input current
inhibited is relatively constant with changes in Vin.The open
circuit inhibit pin voltage is typically 11.5 volts and can be
conveniently driven by an open collector driver. An internal
pull-up resistor enables the user to leave this pin floating if
the inhibit function is not used in their particular application.
All models use identical inhibit internal circuits. Forcing in-
hibit pin to any voltage between 0 and 6 volts will assure the
converter is inhibited. The input current to this pin is 500µA
maximum at Vpin2 = to 0 volts. The converter can be turned
on by opening Pin 2 or forcing a voltage from 10 to 50 volts.
Inhibit pin current from 10 to 50 volts is less than ±50µA.
An optional EMI filter ( AFC461) will reduce the input ripple
current to levels below the limits imposed by MIL-STD-
461 CEO3.
The output voltage of the AHV28XXS can be adjusted
upward by connecting a resistor between the Output
Adjust (Pin 3) and the Output Common (Pin 4) as shown
in Table 1.
Table 1: Output Adjustment Resistor Values
* Resistance (Ohms)
Pin 3 to 4
Output Voltage Increase (%)
5V
12V
15V
None
390 K
145 K
63 K
22 K
0
0
0
0
+1.0%
+2.0%
+3.1%
+4.1%
+5.0%
+1.6%
+3.2%
+4.9%
+6.5%
+7.9%
+1.7%
+3.4%
+5.1%
+6.8%
+8.3%
* Output Adjust (Single Output Models Only)
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7
AHV28XX Series
AHV28XX Case Outlines
Single and Dual Output Models
0.050
Typical
0.800
0.040 D
X
0.26 L Pins
2.880
Max
2.110
Max
4 X 0.400
=1.600
2.560
Ø
0.162
0.405
Max
2 Holes
Typical
1.110
Triple Output Models
1.000
2.700
Max
2.360
1.95
0.410
Max
1.345
Pin Designation
Part Numbering
SIGNAL DESIGNATION
AHV 28 15 T F / CH
PIN #
SINGLE OUTPUT
DUAL OUTPUT
Positive Input
Enable Input
Positive Output
Output Common
Negative Output
N/C
TRIPLE OUTPUT
Screening
1
2
Positive Input
Enable Input
Output Adjust*
Output Common
Positive Output
N/C
Positive Input
Model
– , ES, HB, CH
+5VDC Output
Output Common
Neg. Dual Output (12/15 VDC)
Pos. Dual Output (12/15 VDC)
N/C
Input Voltage
28 = 28V Nominal
Package Style
F = Flange
3
4
5
Output Voltage
Single - 05, 12, 15V
Dual - 12 = ±12V, 15 = ±15V
Triple - 12 = 5V, ±12V
15 = 5V, ±15V
Outputs
S = Single
D = Dual
T = Triple
6
7
N/C
N/C
Case Ground
8
Case Ground
N/C
Case Ground
N/C
Enable Input
9
N/C
10
Input Common
Input Common
Input Common
* Output Adjust (Single Output Models Only)
8
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AHV28XX Series
Available Screening Levels and ProcessVariations for AHV28XX Series
MIL-STD-883
Method
No
ES
HB
CH
Requirement
Temperature Range
Element Evaluation
Internal Visual
Suffix
Suffix
Suffix
Suffix
-20°C to +85°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
MIL-PRF-38534
Yes
2017
1010
Yes
Cond B
Yes
¬
Temperature Cycle
Constant Acceleration
Burn-in
Cond C
Cond C
2001
500g
Cond A
Cond A
1015
48hrs @ 85 C
48hrs @ 125°C
25°C
160hrs @ 125°C
-55, +25, +125°C
160hrs @ 125°C
-55, +25, +125°C
°
Final Electrical
(Group A)
MIL-PRF-38534
& Specification
1014
25°C
Seal, Fine & Gross
External Visual
Cond A
Cond A, C
Yes
Cond A, C
Yes
Cond A, C
Yes
2009
¬
* Per Commercial Standards
Available Standard Military Drawing (SMD) Cross Reference
Standardized
Military Drawing
Pin
Vendor Vendor
CAGE
Code
Similar
Pin
AHV2805SF/CH
AHV2812SF/CH
AHV2815SF/CH
AHV2812DF/CH
AHV2815DF/CH
AHV2812TF/CH
AHV2815TF/CH
52467
52467
52467
52467
52467
52467
52467
5962-9177301
5962-9211201
5962-9211301
5962-9211401
5962-9177401
5962-9211501
5962-9211601
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
ADVANCED ANALOG: 2270 Martin Av., Santa Clara, California 95050, Tel: (408) 727-0500
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 11/02
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9
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