AUIRFN8459_技术文档

AUTOMOTIVE GRADE

AUIRFN8459

Features

V_DSS

R_{DS(on) typ.}

40V

 Advanced Process Technology

 Dual N-Channel MOSFET

 Ultra Low On-Resistance

 175°C Operating Temperature

 Fast Switching

4.8m

5.9m

max

I_D(Silicon Limited)

70A

 Repetitive Avalanche Allowed up to Tjmax

 Lead-Free, RoHS Compliant

 Automotive Qualified *

I_D(Package Limited)

50A

Description

Specifically designed for Automotive applications, this HEXFET^®

Power MOSFET utilizes the latest processing techniques to

achieve extremely low on-resistance per silicon area. Additional

features of this design are a 175°C junction operating temperature,

fast swithcing speed and improved repetitive avalanche rating.

These features combine to make this product an extremely

efficient and reliable device for use in Automotive and wide variety

of other applications.

DUAL PQFN 5X6 mm

G

D

S

Applications

Gate

Drain

Source

 12V Automotive Systems

 Brushed DC Motor

 Braking

 Transmission

Base Part Number

Package Type

Standard Pack

Form

Tape and Reel

Orderable Part Number

Quantity

4000

AUIRFN8459

Dual PQFN 5mm x 6mm

AUIRFN8459TR

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and

functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-

maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under

board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.

Parameter

Continuous Drain Current, V_GS@ 10V 

Continuous Drain Current, V_GS@ 10V

Max.

70

Units

I_D@ T_{C (Bottom)}= 25°C

I_D@ T_{C (Bottom)}= 100°C

I_D@ T_{C (Bottom)}= 25°C

I_DM

50

A

Continuous Drain Current, V_GS@ 10V (Package Limited)

Pulsed Drain Current 

50

320

Power Dissipation

50

W

P_D@T_{C (Bottom)}= 25°C

Linear Derating Factor

0.33

W/°C

V

V_GS

Gate-to-Source Voltage

± 20

mJ

E_AS

Single Pulse Avalanche Energy (Thermally Limited) 

Single Pulse Avalanche Energy 

Avalanche Current 

66

110

E_AS(Tested)

A

I_AR

See Fig. 14, 15, 22a, 22b

E_AR

T_J

T_STG

Repetitive Avalanche Energy 

Operating Junction and

Storage Temperature Range

-55 to + 175

°C

HEXFET® is a registered trademark of International Rectifier.

*Qualification standards can be found at http://www.irf.com/

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Thermal Resistance

Symbol

Parameter

Typ.

–––

Max.

3.0

45

Units

°C/W

Junction-to-Case 

Junction-to-Ambient 

R_JC(Bottom)

R_JC(Top)

40

R_JA

Static Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Symbol

V_(BR)DSS

Parameter

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

Min. Typ. Max. Units

40 ––– –––

––– 0.037 ––– V/°C Reference to 25°C, I_D= 1.0mA

Conditions

V_GS= 0V, I_D= 250µA

V

V_(BR)DSS/T_J

R_DS(on)

V_GS(th)

gfs

–––

2.2

66

–––

4.8

3.0

–––

1.9

–––

5.9

3.9

–––

1.0

V_GS= 10V, I_D= 40A 

V_DS= V_GS, I_D= 50µA

V_DS= 10V, I_D= 40A

m

V

S

Forward Transconductance

Internal Gate Resistance

R_G



V_DS= 40V, V_GS= 0V

V_DS= 40V, V_GS= 0V, T_J= 125°C

V_GS= 20V

I_DSS

I_GSS

Drain-to-Source Leakage Current

µA

nA

150

100

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

––– -100

V_GS= -20V

Dynamic Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

Conditions

I_D= 40A

V_DS= 20V

V_GS= 10V

I_D= 40A, V_DS=0V, V_GS= 10V

Q_g

Q_gs

Q_gd

Total Gate Charge

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Total Gate Charge Sync. (Q_g- Q_gd)

–––

40

13

14

26

60

–––

nC

ns

Q_sync

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

–––

10

55

25

42

–––

V_DD= 26V

I_D= 40A

R_G= 2.7

V_GS= 10V

C_iss

C_oss

C_rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

––– 2250 –––

V_GS= 0V

V_DS= 25V

ƒ = 1.0 MHz

V_GS= 0V, V_DS= 0V to 32V 

V_GS= 0V, V_DS= 0V to 32V 

–––

340

215

400

490

–––

pF

C_osseff. (ER) Effective Output Capacitance (Energy Related)

C_osseff. (TR) Effective Output Capacitance (Time Related)

Diode Characteristics

Symbol

Parameter

Continuous Source Current

(Body Diode)

Min. Typ. Max. Units

Conditions

MOSFET symbol

showing the

–––

––– 70

I_S

A

integral reverse

p-n junction diode.

T_J= 25°C, I_S= 40A, V_GS= 0V 

Pulsed Source Current

(Body Diode) 

Diode Forward Voltage

Peak Diode Recovery 

–––

320

I_SM

A

V

V_SD

dv/dt

–––

7.0

22

23

17

1.3

–––

V/ns T_J= 175°C, I_S= 40A, V_DS= 40V

T_J= 25°C

t_rr

Reverse Recovery Time

ns

V_R= 34V,

I_F= 40A

di/dt = 100A/µs

T_J= 125°C

T_J= 25°C

T_J= 125°C

T_J= 25°C

Q_rr

Reverse Recovery Charge

Reverse Recovery Current

nC

A

17

1.0

I_RRM

2

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1000

100

10

1000

100

10

VGS

15V

10V

8.0V

7.0V

6.0V

5.0V

4.5V

4.3V

VGS

15V

10V

8.0V

7.0V

6.0V

5.0V

4.5V

4.3V

TOP

BOTTOM

4.3V

1

4.3V

 60µs PULSE WIDTH

Tj = 25°C



60µs PULSE WIDTH

Tj = 175°C

0.1

1

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig. 1 Typical Output Characteristics

Fig. 2 Typical Output Characteristics

1.8

1.6

1.4

1.2

1.0

0.8

0.6

1000

I

= 40A

D

V

= 10V

GS

100

10

1

T

= 175°C

J

T

= 25°C

J

V

= 10V

DS

 60µs PULSE WIDTH

0.1

2.0

3.0

V

4.0

5.0

6.0

7.0

8.0

9.0

-60 -40 -20

T

0

20 40 60 80 100 120 140 160 180

, Gate-to-Source Voltage (V)

GS

, Junction Temperature (°C)

J

Fig. 4 Normalized On-Resistance vs. Temperature

Fig. 3 Typical Transfer Characteristics

14

10000

1000

100

V

= 0V,

f = 1 MHZ

GS

I

= 40A

D

V

= 32V

= 20V

8.0V

C

= C + C , C

SHORTED

DS

iss

rss

oss

gs

gd

ds

12

10

8

= C

gd

= C + C

ds

gd

DS=

Ciss

6

4

Coss

Crss

2

0

10

20

30

40

50

60

1

10

, Drain-to-Source Voltage (V)

100

Q

Total Gate Charge (nC)

G

V

DS

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage

Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage

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AUIRFN8459

1000

100

10

1000

100

10

100µsec

1msec

T

= 175°C

J

imited by

Package

L

T

= 25°C

J

OPERATION IN THIS AREA

LIMITED BY R (on)

DS

10msec

DC

1

Tc = 25°C

Tj = 150°C

Single Pulse

V

= 0V

GS

0.1

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.1

1

10

100

V

, Source-to-Drain Voltage (V)

V

, Drain-toSource Voltage (V)

DS

SD

Fig 8. Maximum Safe Operating Area

Fig. 7 Typical Source-to-Drain Diode

70

60

50

40

30

20

10

0

50

48

46

44

42

40

Id = 1.0mA

Limited By Package

25

50

75

100

125

150

175

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T

, Case Temperature (°C)

T , Temperature ( °C )

J

C

Fig 9. Maximum Drain Current vs. Case Temperature

Fig 10. Drain-to–Source Breakdown Voltage

20.0

16.0

12.0

8.0

0.30

0.25

0.20

0.15

0.10

0.05

0.00

V

= 5.5V

= 6.0V

= 7.0V

= 8.0V

= 10V

GS

4.0

0

10

20

30

40

0

50

100

150

200

V

Drain-to-Source Voltage (V)

I , Drain Current (A)

DS,

D

Fig 12. Typical On-Resistance vs. Drain Current

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Fig 11. Typical C_ossStored Energy

4

AUIRFN8459

10

1

D = 0.50

0.20

0.10

0.05

0.1

0.02

0.01

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. DutyFactor D = t1/t2

2. PeakTj = P dm xZthjc + Tc

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 150°C and

Tstart =25°C (Single Pulse)

10

1

0.1

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and

Tstart = 125°C.

0.01

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav(sec)

Fig 14. Avalanche Current vs. Pulse Width Current

70

60

50

40

30

20

10

0

Notes on Repetitive Avalanche Curves , Figures 14, 15:

(For further info, see AN-1005 at www.irf.com)

1.Avalanche failures assumption:

TOP

BOTTOM 1.0% DutyCycle

= 40A

Single Pulse

I

D

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for every

part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not

exceeded.

3. Equation below based on circuit and waveforms shown in Figures

22a, 22b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage

increase during avalanche).

6. I_av= Allowable avalanche current.

7. T = Allowable rise in junction temperature, not to exceed T_jmax

(assumed as 25°C in Figure 14, 15).

t_av= Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

25

50

75

100

125

150

175

Starting T , Junction Temperature (°C)

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

J

PD (ave) = 1/2 ( 1.3·BV·I_av) = T/ Z_thJC

I_av= 2T/ [1.3·BV·Z_th]

Fig 15. Maximum Avalanche Energy vs. Temperature

E_{AS (AR)}= P_{D (ave)· av}

t

5

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AUIRFN8459

4.5

4.0

3.5

3.0

2.5

2.0

1.5

25

20

15

10

5

I

= 40A

D

I

= 50µA

= 250µA

= 1.0mA

= 1.0A

T

= 125°C

= 25°C

D

J

T

J

0

4

8

12

16

20

-75 -50 -25

0

25

50

75 100 125 150

V

, Gate-to-Source Voltage (V)

GS

T

, Temperature ( °C )

J

Fig 17. Threshold Voltage vs. Temperature

Fig 16. Typical On-Resistance vs. Gate Voltage

5

I = 40A

F

I = 26A

F

V

= 34V

V

= 34V

R

4

3

2

1

0

4

3

2

1

0

T = 25°C

J

T = 125°C

J

T = 25°C

J

T = 125°C

J

0

100

200

300

400

500

600

0

100

200

300

400

500

600

di /dt ( A/µs)

F

Fig 19. Typical Stored Charge vs. dif/dt

Fig 18. Typical Recovery Current vs. dif/dt

90

I = 40A

F

I = 26A

F

80

V

= 34V

V

= 34V

R

70

60

50

40

30

20

10

0

T = 25°C

J

T = 125°C

J

70

60

50

40

30

20

10

0

T = 25°C

J

T = 125°C

J

0

100

200

300

400

500

600

0

100

200

300

400

500

600

di /dt ( A/µs)

F

Fig 21. Typical Stored Charge vs. dif/dt

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Fig 20. Typical Recovery Current vs. dif/dt

6

AUIRFN8459

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

Fig 22b. Unclamped Inductive Waveforms

Fig 22a. Unclamped Inductive Test Circuit

Fig 23b. Switching Time Waveforms

Fig 23a. Switching Time Test Circuit

VDD

Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

7

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AUIRFN8459

Dual PQFN 5x6 Package Details

For more information on board mounting, including footprint and stencil recommendation, please refer to application

note AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf

For more information on package inspection techniques, please refer to application note AN-1154:

http://www.irf.com/technical-info/appnotes/an-1154.pdf

Dual PQFN 5x6 Part Marking

INTERNATIONAL

RECTIFIER LOGO

DATE CODE

PART NUMBER

XXXX

(“4 or 5 digits”)

ASSEMBLY

SITE CODE

(Per SCOP 200-002)

MARKING CODE

XYWWX

XXXXX

(Per Marking Spec)

PIN 1

IDENTIFIER

LOT CODE

(Eng Mode - Min last 4 digits of EATI#)

(Prod Mode - 4 digits of SPN code)

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

8

May 12, 2015

AUIRFN8459

Qualification Information^†

Automotive

(per AEC-Q101)

Comments: This part number(s) passed Automotive qualification. IR’s In-

dustrial and Consumer qualification level is granted by extension of the high-

er Automotive level.

Qualification Level

Moisture Sensitivity Level

Human Body Model

Dual PQFN 5mm x 6mm

MSL1

Class H1B(+/- 1000V)^††

AEC-Q101-001

Class C5 (+/- 1000V)^††

AEC-Q101-005

Yes

ESD

Charged Device Model

RoHS Compliant

†

Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/

†† Highest passing voltage.

Notes:

 Repetitive rating; pulse width limited by max. junction temperature.

 Limited by T_Jmax, starting T_J= 25°C, L =75µH, R_G= 50, I_AS= 40A, V_GS= 10V.

I_SD 50A, di/dt  650A/µs, V_DD V_(BR)DSS, T_J 175°C.

 Pulse width  400µs; duty cycle  2%.

 C_{oss eff. (TR)}is a fixed capacitance that gives the same charging time as Coss while V_DSis rising from 0 to 80% V_DSS

.

 C_{oss eff. (ER)}is a fixed capacitance that gives the same energy as Coss while V_DSis rising from 0 to 80% V_DSS

.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques

refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf

 R_is measured at T_Jof approximately 90°C.

 This value determined from sample failure population, starting T_J= 25°C, L= 75µH, R_G= 50, I_AS= 40A, V_GS=10V.

 Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 50A.

Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements

9

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AUIRFN8459

IMPORTANT NOTICE

Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve

the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services

at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow

automotive industry and / or customer specific requirements with regards to product discontinuance and process change

notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.

IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s

standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this

warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily

performed.

IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products

and applications using IR components. To minimize the risks with customer products and applications, customers should

provide adequate design and operating safeguards.

Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and is

accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with altera-

tions is an unfair and deceptive business practice. IR is not responsible or liable for such altered documentation. Infor-

mation of third parties may be subject to additional restrictions.

Resale of IR products or serviced with statements different from or beyond the parameters stated by IR for that product or

service voids all express and any implied warranties for the associated IR product or service and is an unfair and deceptive

business practice. IR is not responsible or liable for any such statements.

IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into

the body, or in other applications intended to support or sustain life, or in any other application in which the failure of the IR

product could create a situation where personal injury or death may occur. Should Buyer purchase or use IR products for

any such unintended or unauthorized application, Buyer shall indemnify and hold International Rectifier and its officers, em-

ployees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable

attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or

unauthorized use, even if such claim alleges that IR was negligent regarding the design or manufacture of the product.

Only products certified as military grade by the Defense Logistics Agency (DLA) of the US Department of Defense, are de-

signed and manufactured to meet DLA military specifications required by certain military, aerospace or other applications.

Buyers acknowledge and agree that any use of IR products not certified by DLA as military-grade, in applications requiring

military grade products, is solely at the Buyer’s own risk and that they are solely responsible for compliance with all legal and

regulatory requirements in connection with such use.

IR products are neither designed nor intended for use in automotive applications or environments unless the specific IR

products are designated by IR as compliant with ISO/TS 16949 requirements and bear a part number including the designa-

tion “AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, IR will

not be responsible for any failure to meet such requirements.

For technical support, please contact IR’s Technical Assistance Center

http://www.irf.com/technical-info/

WORLD HEADQUARTERS:

101 N. Sepulveda Blvd., El Segundo, California 90245

Tel: (310) 252-7105

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型号：	AUIRFN8459
厂家：	Infineon
描述：	40V 双 N 通道 HEXFET Power MOSFET，采用 PQFN 5 x 6 L 封装
文件：	总10页 (文件大小：534K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AUIRFN8459 [INFINEON]

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