AUIRFR3806TR [INFINEON]
Power Field-Effect Transistor, 43A I(D), 60V, 0.0158ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3;型号: | AUIRFR3806TR |
厂家: | Infineon |
描述: | Power Field-Effect Transistor, 43A I(D), 60V, 0.0158ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3 开关 脉冲 晶体管 |
文件: | 总12页 (文件大小:272K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 97644
AUTOMOTIVE GRADE
AUIRFR3806
HEXFET® Power MOSFET
Features
●
●
●
●
●
●
●
●
Advanced Process Technology
D
VDSS
RDS(on) typ.
max.
60V
Ultra Low On-Resistance
Dynamic dV/dT Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
12.6m
15.8m
43A
Ω
Ω
G
ID
S
D
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
thisdesign area175°Cjunctionoperatingtemperature,fastswitching
speed and improved repetitive avalanche rating . These features
combine to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide variety of other
S
G
D-Pak
AUIRFR3806
G
D
S
applications.
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
Symbol
ID @ TC = 25°C
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Max.
43
Units
A
ID @ TC = 100°C
IDM
31
170
PD @TC = 25°C
W
71
Maximum Power Dissipation
Linear Derating Factor
0.47
W/°C
V
VGS
EAS
IAR
± 20
Gate-to-Source Voltage
73
mJ
A
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
25
7.1
Repetitive Avalanche Energy
EAR
mJ
24
Peak Diode Recovery
dv/dt
TJ
V/ns
°C
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
300
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
2.12
–––
62
Units
Rθ
Junction-to-Case
JC
Rθ
0.50
–––
°C/W
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
CS
RθJA
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
03/11/11
AUIRFR3806
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
60 ––– –––
––– 0.075 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
V
V
/ T
(BR)DSS Δ
Δ
J
RDS(on)
VGS(th)
gfs
––– 12.6 15.8
VGS = 10V, ID = 25A
VDS = VGS, ID = 50μA
VDS = 10V, ID = 25A
m
Ω
2.0
41
–––
4.0
V
Forward Transconductance
––– –––
S
RG(int)
IDSS
–––
Internal Gate Resistance
Drain-to-Source Leakage Current
0.79 –––
Ω
μA
––– –––
20
V
V
DS = 60V, VGS = 0V
DS = 48V, VGS = 0V, TJ = 125°C
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA VGS = 20V
GS = -20V
V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
Total Gate Charge
Conditions
Qg
–––
–––
–––
22
5.0
6.3
30
nC ID = 25A
DS = 30V
VGS = 10V
ID = 25A, VDS =0V, VGS = 10V
ns VDD = 39V
ID = 25A
R = 20
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
–––
–––
V
Qgd
Qsync
––– 28.3 –––
td(on)
–––
–––
–––
–––
6.3
40
49
47
–––
–––
–––
–––
tr
td(off)
Turn-Off Delay Time
Fall Time
Ω
G
tf
VGS = 10V
Ciss
Input Capacitance
––– 1150 –––
––– 130 –––
VGS = 0V
Coss
Output Capacitance
Reverse Transfer Capacitance
V
DS = 50V
Crss
–––
67
–––
pF ƒ = 1.0MHz
Coss eff. (ER)
Coss eff. (TR)
––– 190 –––
––– 230 –––
V
GS = 0V, VDS = 0V to 60V
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
VGS = 0V, VDS = 0V to 60V
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
IS
D
S
Continuous Source Current
––– –––
A
MOSFET symbol
43
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
G
ISM
––– ––– 170
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
33
V
TJ = 25°C, IS = 25A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 51V,
IF = 25A
di/dt = 100A/μs
–––
–––
–––
–––
–––
22
26
17
24
1.4
ns
39
Qrr
Reverse Recovery Charge
26
nC
36
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.23mH
RG = 25Ω, IAS = 25A, VGS =10V. Part not recommended for
use above this value.
ISD ≤ 25A, di/dt ≤ 1580A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
ꢀ Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
2
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AUIRFR3806
Qualification Information†
Automotive
††
(per AEC-Q101)
Qualification Level
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
Moisture Sensitivity Level
D-PAK
MSL1
Class M3 (+/- 250V)†††
Machine Model
AEC-Q101-002
Class H1A (+/- 500V)†††
AEC-Q101-001
Human Body Model
ESD
Class C5 (+/- 2000V)†††
AEC-Q101-005
Charged Device
Model
RoHS Compliant
Yes
Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions to AEC-Q101 requirements are noted in the qualification report.
Highest passing voltage.
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3
AUIRFR3806
1000
100
10
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
TOP
100
BOTTOM
BOTTOM
4.5V
10
4.5V
60μs PULSE WIDTH
Tj = 175°C
≤
60μs PULSE WIDTH
Tj = 25°C
≤
1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 25A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60μs PULSE WIDTH
≤
0.1
2
3
4
5
6
7
8
9
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
12.0
10000
1000
100
V
C
= 0V,
f = 1 MHZ
GS
I = 25A
D
= C + C , C SHORTED
iss
gs gd ds
V
V
V
= 48V
= 30V
= 12V
C
= C
DS
DS
DS
10.0
8.0
6.0
4.0
2.0
0.0
rss
gd
C
= C + C
oss
ds
C
gd
iss
C
oss
C
rss
10
0
5
10
15
20
25
1
10
, Drain-to-Source Voltage (V)
100
Q
, Total Gate Charge (nC)
V
G
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
4
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AUIRFR3806
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100μsec
1msec
T
= 175°C
J
T
= 25°C
J
10msec
1
1
Tc = 25°C
DC
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.0
0.5
1.0
1.5
2.0
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
80
75
70
65
60
45
40
35
30
25
20
15
10
5
Id = 5mA
0
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T , Temperature ( °C )
C
J
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
0.4
300
I
D
0.3
0.3
0.2
0.2
0.1
0.1
0.0
TOP
2.8A
5.1A
250
200
150
100
50
BOTTOM 25A
0
-10
0
10
20 30 40 50
60 70
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
Drain-to-Source Voltage (V)
DS,
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
Fig 11. Typical COSS Stored Energy
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5
AUIRFR3806
10
D = 0.50
1
0.1
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
0.6086 0.00026
0.9926 0.001228
τ
τ
Cτ
0.02
0.01
J τJ
τ
τ
1τ1
τ
2 τ2
3τ3
0.5203 0.00812
Ci= τi/Ri
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
10
1
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
0.01
pulsewidth, tav, assuming Tj = 150°C and
Δ
Tstart =25°C (Single Pulse)
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tstart = 150°C.
j = 25°C and
ΔΤ
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
80
60
40
20
0
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 25A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
Starting T , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav
J
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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AUIRFR3806
4.0
3.5
3.0
2.5
2.0
1.5
1.0
14
12
10
8
I = 17A
F
V
= 51V
R
T = 25°C
J
T = 125°C
J
I
I
I
I
= 50μA
= 250μA
= 1.0mA
= 1.0A
D
D
D
D
6
4
2
0
-75 -50 -25
0
25 50 75 100 125 150175 200
, Temperature ( °C )
0
200
400
600
800
1000
T
di /dt (A/μs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
14
260
I = 25A
I = 17A
F
F
12
10
8
V
= 51V
V
= 51V
R
R
210
160
110
60
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
6
4
2
10
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/μs)
di /dt (A/μs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
260
I = 25A
F
V
= 51V
R
210
160
110
60
T = 25°C
J
T = 125°C
J
10
0
200
400
600
800
1000
di /dt (A/μs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
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7
AUIRFR3806
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 21b. Unclamped Inductive Waveforms
Fig 21a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1μs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 22a. Switching Time Test Circuit
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 23a. Gate Charge Test Circuit
Fig 23b. Gate Charge Waveform
8
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AUIRFR3806
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak Part Marking Information
Part Number
IR Logo
AUFR3806
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
YWWA
XX or XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com
9
AUIRFR3806
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
11.9 ( .469 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFR3806
Ordering Information
Base part number Package Type
Standard Pack
Form
Complete Part Number
Quantity
75
2000
3000
3000
AUIRFR3806
Dpak
Tube
AUIRFR3806
AUIRFR3806TR
AUIRFR3806TRL
AUIRFR3806TRR
Tape and Reel
Tape and Reel Left
Tape and Reel Right
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11
AUIRFR3806
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve
the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products
and applications using IR components. To minimize the risks with customer products and applications, customers should
provide adequate design and operating safeguards.
Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with
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service voids all express and any implied warranties for the associated IR product or service and is an unfair and deceptive
business practice. IR is not responsible or liable for any such statements.
IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the
body, or in other applications intended to support or sustain life, or in any other application in which the failure of the IR product
could create a situation where personal injury or death may occur. Should Buyer purchase or use IR products for any such
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productsaredesignatedbyIRascompliantwithISO/TS16949requirementsandbearapartnumberincludingthedesignation
“AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, IR will not be
responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
12
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相关型号:
AUIRFR3806TRL
Power Field-Effect Transistor, 43A I(D), 60V, 0.0158ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3
INFINEON
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