BTN9990LV_技术文档

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

Features

•

AEC-Q100/Q006 qualified (Grade 1)

Supply voltage range 8 V - 18 V (max up to 40 V)

Path resistance of typ. 5.3 mΩ @ 25°C (max. 9.6 mΩ @ 150°C)

Low quiescent current of max. 3.3 µA @ 85°C

Protection features: overcurrent, undervoltage, overtemperature

Overcurrent detection level of 75 A min

Eight selectable switching slew rates for optimized EME

Status flag diagnosis with feedback of current sense, temperature

and slew rate

Package

Marking

PG-HSOF-7-1

(sTOLL)

BTN9990

Potential applications

•

Automotive 12 V brushed DC Motor

Fuel pump

Power liꢀgate

HVAC blower

Reverse polarity

protection

V_BAT

D_Z1

10 V

R₃

10 kΩ

R₁

1 kΩ

V_S

BTN9990LV

INH

C₁

100 nF

VS

OUT

R₂

1 kΩ

C_O2V

*

C₁₀

100 nF

C_DC-Link

~1000 µF

Micro-

OUT

IN

controller^OUT

M

IN

C₁₁

10 mF

C_OUT

*

IS

ADC

C_IS

1 nF

R_IS

2 kΩ

GND

*) C_O2V, C_OUT(~10 nF) optional to otpimize EMC

Figure 1

Typical application

Product validation

Qualified for automotive applications.

Product validation according to AEC-Q100.

Description

The BTN9990LV is an integrated high current half-bridge for motor drive applications. It is part of the integrated

™

half-bridge NovalithIC + family containing one p-channel high-side MOSFET and one n-channel low-side

MOSFET with an integrated driver IC in one package. Due to the p-channel high-side switch the need for a

charge pump is eliminated thus minimizing EME. Interfacing to a microcontroller is made easy by the integrated

Datasheet

www.infineon.com

Please read the Important Notice and Warnings at the end of this document

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

Description

driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time

generation and protection against overtemperature, undervoltage, overcurrent and short circuit.

The BTN9990LV provides a cost optimized solution for protected high current PWM motor drives with very low

board space consumption.

Datasheet

2

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

Table of contents

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1

2

3

General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.1

3.2

3.3

4

4.1

4.2

4.2.1

4.3

Block description and characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Power stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Undervoltage shutdown with restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Switch-OFF with latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Control and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Dead time generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Adjustable slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Status flag diagnosis with current and temperature sense capability . . . . . . . . . . . . . . . . . . . . . . .24

Current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Temperature sense and slew rate feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Fault feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.3.1

4.3.2

4.3.3

4.3.3.1

4.3.3.2

4.3.4

4.4

4.4.1

4.4.2

4.4.3

4.4.3.1

4.4.3.2

4.4.3.3

4.4.4

5

6

7

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Datasheet

3

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

1 Block diagram

1

Block diagram

™

The BTN9990LV is part of the integrated half-bridge NovalithIC + family containing three separate chips in

one package: one p-channel high-side MOSFET and one n-channel low-side MOSFET together with a driver IC,

forming an integrated high current half-bridge. All three chips are mounted on a common lead frame, using

the chip-on-chip and chip-by-chip technology. The power switches utilize vertical MOS technologies to ensure

optimum ON-state resistance. Due to the p-channel high-side switch the need for a charge pump is eliminated

thus minimizing EME. Interfacing to a microcontroller is made easy by the integrated driver IC which features

logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection

against overtemperature, overcurrent, undervoltage and short circuit. The BTN9990LV can be combined with

other BTN9990LVs to form an H-bridge or a 3-phase drive configuration.

VS

Current

sense

Power on

reset

VReg

Overcurrent

detection

Offset Fault

SR / T_CC

Gate driver

IS

Temperature

sensor

Cross current

protection

OUT

IN

Logic

UV Latch

Gate driver

INH

Overcurrent

detection

Slew rate

generator

GND

Figure 2

Block diagram

Following figure shows the terms used in this datasheet.

Datasheet

4

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

1 Block diagram

I_VS, -I_D(HS)

V_SIS

VS

I_IN

V_DS(HS)

IN

I_INH

I

_OUT, I_L

V_S

INH

IS

OUT

V_IN

I_IS

V_OUT

,

V_INH

V_DS(LS)

GND

V_IS

I_GND, -I_D(LS)

Figure 3

Terms

Datasheet

5

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

2 Pin configuration

2

Pin configuration

8

1 3 5 7

2 4 6

Figure 4

Table 1

Pin assignment BTN9990LV (top view)

Pin definitions and functions

1,2

3

Symbol

GND

IN

I/O

Function

Ground ⁽¹⁾

–

I

Input

Defines whether high- or low-side switch is activated.

An internal pull down resistor is connected to this pin.

4

INH

I

Inhibit

When set to low device goes in tristate.

An internal pull down resistor is connected to this pin.

5

IS

O

–

Current sense, temperature sense, slew rate level and diagnostics

Supply ⁽¹⁾

6,7

8 (EP)

VS

OUT

O

Power output of the bridge

1) All terminal pins must be connected together on the PCB. All terminal pins are internally connected together.

PCB traces have to be designed to withstand the maximum current which can flow

Bold type: pin needs power wiring

Datasheet

6

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

3 General product characteristics

3

General product characteristics

The device is intended to be used in an automotive environment. The circumstances, how the device

environment must look like, are described in this chapter.

3.1

Absolute maximum ratings

Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute

maximum rating conditions for extended periods may aﬀect device reliability.

Table 2

Absolute Maximum Ratings

T_j= -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise

specified) ¹⁾

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Voltages

Supply voltage

V_S

-0.3

-40

-38

–

40

–

V

–

Drain-source voltage high-side V_DS(HS)

Drain-source voltage low-side V_DS(LS)

T_j≥ 25°C

T_j< 25°C

T_j≥ 25°C

T_j< 25°C

–

40

38

5.5

–

Logic input voltage

V_IN

-0.3

V_INH

Voltage between VS and IS pin V_SIS

-0.3

–

40

V

–

Voltage at IS pin

Currents

V_IS

HS drain current

LS drain current

Temperatures

|I_D(HS)

|

–

I_OCH0

I_OCL0

A

Switch active ²⁾

|I_D(LS)

|

Junction temperature

Storage temperature

ESD susceptibility

T_j

-40

-55

–

150

°C

–

T_stg

ESD robustness all pins (HBM) |V_{ESD(HBM,local)}

|

–

2

6

kV

HBM ³⁾

ESD robustness OUT vs GND

vs VS (HBM)

|V_{ESD(HBM,global)}|

ESD robustness all pins (CDM) |V_ESD(CDM)

|

–

500

TC

CDM ⁴⁾

(table continues...)

1

Not subject to production test, specified by design.

2

3

4

Maximum applicable single pulse current depends on t_pulse.See figure maximum single pulse current.

Human body model “HBM” robustness: class 2 according to AEC-Q100-002.

Charged device model “CDM” robustness: class C2a according to AEC-Q100-011 Rev D. “TC” corresponds

to “test condition” according to AEC-Q100-011.

Datasheet

7

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

3 General product characteristics

Table 2

(continued) Absolute Maximum Ratings

T_j= -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise

specified) ¹⁾

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

ESD robustness corner pins

(CDM) (pins VS, GND, OUT)

|V_{ESD(CDM,corner)}

|

–

750

TC

CDM ⁴⁾

Latchup Robustness: class II according to AEC-Q100-04

Note:

Integrated protection functions are designed to prevent IC destruction under fault conditions

described in the datasheet. Fault conditions are considered as “outside” normal operating range.

Protection functions are not designed for continuous repetitive operation.

Maximum applicable single pulse output current T_A< 125°C

120

110

100

90

80

70

60

50

40

30

20

10

0

Max. applicable single pulse output current I_OUT

Overcurrent detection level max. I_OCH0, I_OCL0

Overcurrent detection level min. I_OCH0, I_OCL0

1,00E-03

1,00E-02

1,00E-01

1,00E+00

1,00E+01

t_pulse[s]

Figure 5

Maximum single pulse current BTN9990LV

The diagram shows the maximum single pulse current that can be applied for a given pulse time t_pulse. The

maximum achievable current may be smaller and depends on the overcurrent detection level. Pulse time may

be limited due to thermal protection of the device.

1

Not subject to production test, specified by design.

Charged device model “CDM” robustness: class C2a according to AEC-Q100-011 Rev D. “TC” corresponds

4

to “test condition” according to AEC-Q100-011.

Datasheet

8

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

3 General product characteristics

3.2

Functional range

The parameters of the functional range are listed in the following table:

Table 3

Functional range

Symbol

Parameter

Values

Unit

Note or condition

Min. Typ. Max.

5)

Supply voltage range for

normal operation

V_S(nor)

V_S(ext)

8

–

18

V

Extended supply voltage

range for operation

4.5

–

40

Falling V_S(ext)

Parameter deviation

possible ⁵⁾

5)

Junction temperature

T_j

-40

–

150

°C

3.3

Thermal resistance

This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to

https://www.jedec.org/

Table 4

Thermal resistance

Symbol

Parameter

Values

Unit

Note or condition

Min. Typ. Max.

6)

Thermal resistance junction- R_thJC(HS)

case, high-side switch Rthjc

(HS) = ΔTj(HS)/Pv(HS)

–

0.5

0.8

19

0.7

1.1

–

K/W

6)

Thermal resistance junction- R_thJC(LS)

case, low-side switch

Rthjc(LS) = ΔTj(LS)/Pv(LS)

K/W

6) 7)

Thermal resistance junction- R_thJA

ambient

Note:

Within the functional or operating range, the IC operates as described in the circuit description. The

electrical characteristics are specified within the conditions given in the electrical characteristics

table.

5

Not subject to production test, specified by design.

According to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The device (chip + package)

was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu).

Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.

6

7

Datasheet

9

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

4

Block description and characteristics

4.1

Supply characteristics

Table 5

Supply characteristics

V_S= 8 V to 18 V, T_j= -40°C to 150°C, I_L= 0 A, all voltages with respect to ground, positive current flowing into pin

(unless otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

General

Supply current

I_VS(on)

–

2.3

2.0

4.5

3.2

mA

V_INH= 5 V

V_IN= 0 V or 5 V

normal operation

DC-mode

(no fault condition)

according to Table 12

Supply current in SR selection I_{VS(on_SR)}

mA

V_INH= 0 V

mode

V_IN= 5 V

SR selection mode

I_{VS(on_SR)}= I_VS– I_IS

(no fault condition)

Quiescent current Tj = 150°C

I_{VS(oﬀ)_150C}

–

75

5

µA

V_INH= V_IN= 0 V

T_j= 150°C

Quiescent current at Tj ≤ 85°C I_{VS(oﬀ)_85C}

V_INH= V_IN= 0 V

T_j≤ 85°C ⁸⁾

Quiescent current Tj ≤ 85°C

and VS = 13.5 V

I_{VS(oﬀ)_85C_13.5V}

3.3

V_INH= V_IN= 0 V

VS = 13.5 V

T_j≤ 85°C ⁸⁾

8

Not subject to production test, specified by design.

Datasheet

10

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

20

V_S= 18 V

18

16

14

12

10

8

T_J= 150°C

10

6

T_J= 25°C

T_J= -40°C

V

_S= 14 V

4

V_S= 8 V

2

0

1

-40 -20

0

20

40

60

T_j[°C]

80

100 120 140 160

0

0,2

0,4

0,6

0,8

1

Low level voltage IN, INH [V]

Typical quiescent current I_VS(OFF)vs. junction temperature T_J

Typical quiescent current I_VS(OFF)vs. Low level voltage IN,INH

Figure 6

Typical quiescent current I_VS(OFF)characteristics

4.2

Power stages

The power stages of the BTN9990LV consist of a p-channel vertical DMOS transistor for the high-side switch and

a n-channel vertical DMOS transistor for the low-side switch. All protection and diagnostic functions are located

in a separate driver IC. Both switches allow active freewheeling and thus minimizing power dissipation during

PWM control.

The ON-state resistance R_ONis dependent on the supply voltage V_Sas well as on the junction temperature T_j.

The typical ON-state resistance characteristics are shown in Figure 7.

10

Low-side switch

High-side switch

9

8

7

6

5

4

3

2

1

0

9

8

7

6

5

4

3

2

1

0

T_J= 150°C

T_J= 25°C

T_J= -40°C

T_J= 150°C

T_J= 25°C

T_J= -40°C

8

9

10 11 12 13 14 15 16 17 18

8

9

10 11 12 13 14 15 16 17 18

Supply voltage V_S[V]

Figure 7

Typical ON-state resistance vs. supply voltage V_S

Datasheet

11

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 6

Power stages – static characteristics

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

High-side switch – static characteristics

ON-state high-side resistance R_ON(HS)

–

3.5

5.0

5.3

7.5

–

mΩ

I_OUT= 15 A; V_S= 13.5 V

T_j= 25°C ⁹⁾

ON-state high-side resistance R_ON(HS)

6.0

–

I_OUT= 15 A; V_S= 13.5 V

T_j= 150°C

I_OUT= 15 A; V_S= 6 V

T_j= 25°C ⁹⁾

11.5 mΩ

I_OUT= 15 A; V_S= 6 V

T_j= 150°C

Leakage current high-side

I_L(LKHS)

V_DS(HS)

1

µA

V

V_INH= V_IN= 0 V; V_OUT= 0 V

T_j≤ 85°C ⁹⁾

–

60

–

V_INH= V_IN= 0 V; V_OUT= 0 V

T_j= 150°C

Reverse diode

0.9

0.85

0.7

I_OUT= -15 A

T_j= -40°C ^{9) 10)}

forward‑voltage high-side

Reverse diode

–

V

I_OUT= -15 A

T_j= 25°C ^{9) 10)}

forward‑voltage high-side

Reverse diode

0.9

V

I_OUT= -15 A

T_j= 150°C ¹⁰⁾

forward‑voltage high-side

Low-side switch – static characteristics

ON-state low-side resistance R_ON(LS)

–

1.8

3.0

4.5

–

mΩ

µA

I_OUT= -15 A; V_S= 13.5 V

T_j= 25°C ⁹⁾

ON-state low-side resistance R_ON(LS)

3.6

–

I_OUT= -15 A; V_S= 13.5 V

T_j= 150°C

I_OUT= -15 A; V_S= 6 V

T_j= 25°C ⁹⁾

5.4

1

I_OUT= -15 A; V_S= 6 V

T_j= 150°C

Leakage current low-side

I_L(LKLS)

V_INH= V_IN= 0 V; V_OUT= V_S

T_j≤ 85°C ⁹⁾

(table continues...)

9

Not subject to production test, specified by design.

Due to active freewheeling, diode is conducting only for a few µs, depending on the selected slew rate SRx.

10

Datasheet

12

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 6

(continued) Power stages – static characteristics

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Leakage current low-side

I_L(LKLS)

-V_DS(LS)

–

30

µA

V

V_INH= V_IN= 0 V; V_OUT= V_S

T_j= 150°C

Reverse diode

0.9

0.8

0.6

–

I_OUT= 15 A

T_j= -40°C

9) 10)

forward‑voltage low-side

Reverse diode

–

V

I_OUT= 15 A

T_j= 25°C ^{9) 10)}

forward‑voltage low-side

Reverse diode

0.8

V

I_OUT= 15 A

T_j= 150°C ¹⁰⁾

forward‑voltage low-side

Table 7

Power stages – dynamic characteristics

Paragraph condition: V_S= 13.5 V, T_j= -40°C to 150°C, R_load= 2 Ω, 30 µH < L_load< 40 µH (in series to R_load), single

pulse, I_OUT> 90 mA freewheeling, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

High-side switch – dynamic characteristics

Rise-time of HS for SR0

Rise-time of HS for SR1

Rise-time of HS for SR2

Rise-time of HS for SR3

Rise-time of HS for SR4

Rise-time of HS for SR5

Rise-time of HS for SR6

Rise-time of HS for SR7

t_r(HS),SR0

t_r(HS),SR1

t_r(HS),SR2

t_r(HS),SR3

t_r(HS),SR4

t_r(HS),SR5

t_r(HS),SR6

t_r(HS),SR7

0.05 0.25 0.55 µs

SR-level = SR0

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

SR-level = SR0

–

0.36

0.5

–

µs

0.83

1.0

0.22 1.25 5.00 µs

–

2.5

5.0

3.6

–

µs

–

Switch-ON delay time HS for t_dr(HS),SR0

2.3

4.3

SR0

Switch-ON delay time HS for t_dr(HS),SR1

SR1

–

4.1

4.6

–

µs

SR-level = SR1

SR-level = SR2

Switch-ON delay time HS for t_dr(HS),SR2

SR2

(table continues...)

9

Not subject to production test, specified by design.

Due to active freewheeling, diode is conducting only for a few µs, depending on the selected slew rate SRx.

10

Datasheet

13

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 7

(continued) Power stages – dynamic characteristics

Paragraph condition: V_S= 13.5 V, T_j= -40°C to 150°C, R_load= 2 Ω, 30 µH < L_load< 40 µH (in series to R_load), single

pulse, I_OUT> 90 mA freewheeling, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Switch-ON delay time HS for t_dr(HS),SR3

SR3

–

5.9

–

µs

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

Switch-ON delay time HS for t_dr(HS),SR4

SR4

–

6.8

–

Switch-ON delay time HS for t_dr(HS),SR5

SR5

5.1

–

8.0

10.5 µs

Switch-ON delay time HS for t_dr(HS),SR6

SR6

13.2

23.3

–

µs

Switch-ON delay time HS for t_dr(HS),SR7

–

SR7

Fall-time of HS for SR0

Fall-time of HS for SR1

Fall-time of HS for SR2

Fall-time of HS for SR3

Fall-time of HS for SR4

Fall-time of HS for SR5

Fall-time of HS for SR6

Fall-time of HS for SR7

t_f(HS),SR0

t_f(HS),SR1

t_f(HS),SR2

t_f(HS),SR3

t_f(HS),SR4

t_f(HS),SR5

t_f(HS),SR6

t_f(HS),SR7

0.05 0.25 0.55 µs

SR-level = SR0

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

SR-level = SR0

–

0.36

0.5

–

µs

0.83

1.0

0.22 1.25 5.00 µs

–

2.5

5.0

2.5

–

µs

–

Switch-OFF delay time HS for t_df(HS),SR0

1.5

3.7

SR0

Switch-OFF delay time HS for t_df(HS),SR1

SR1

–

2.8

3.1

3.9

4.4

5.0

8.1

14.0

–

µs

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

Switch-OFF delay time HS for t_df(HS),SR2

SR2

–

Switch-OFF delay time HS for t_df(HS),SR3

SR3

–

Switch-OFF delay time HS for t_df(HS),SR4

SR4

–

Switch-OFF delay time HS for t_df(HS),SR5

SR5

3.2

–

7.9

–

Switch-OFF delay time HS for t_df(HS),SR6

SR6

Switch-OFF delay time HS for t_df(HS),SR7

–

SR7

(table continues...)

Datasheet

14

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 7

(continued) Power stages – dynamic characteristics

Paragraph condition: V_S= 13.5 V, T_j= -40°C to 150°C, R_load= 2 Ω, 30 µH < L_load< 40 µH (in series to R_load), single

pulse, I_OUT> 90 mA freewheeling, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Low-side switch – dynamic characteristics

Rise-time of LS for SR0

Rise-time of LS for SR1

Rise-time of LS for SR2

Rise-time of LS for SR3

Rise-time of LS for SR4

Rise-time of LS for SR5

Rise-time of LS for SR6

Rise-time of LS for SR7

t_r(LS),SR0

t_r(LS),SR1

t_r(LS),SR2

t_r(LS),SR3

t_r(LS),SR4

t_r(LS),SR5

t_r(LS),SR6

t_r(LS),SR7

t_df(LS),SR0

0.05 0.25 0.55 µs

SR-level = SR0

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

SR-level = SR0

–

0.36

0.5

–

µs

0.83

1.0

0.22 1.25 5.00 µs

–

2.5

5.0

3.6

–

µs

–

Switch-ON delay time LS for

SR0

2.3

4.5

Switch-ON delay time LS for

SR1

t_df(LS),SR1

t_df(LS),SR2

t_df(LS),SR3

t_df(LS),SR4

t_df(LS),SR5

t_df(LS),SR6

t_df(LS),SR7

–

4.1

–

µs

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

Switch-ON delay time LS for

SR2

–

4.6

Switch-ON delay time LS for

SR3

–

5.9

Switch-ON delay time LS for

SR4

–

6.8

Switch-ON delay time LS for

SR5

6.2

–

8.0

10.7 µs

Switch-ON delay time LS for

SR6

13.2

23.3

–

µs

Switch-ON delay time LS for

SR7

–

Fall-time of LS for SR0

Fall-time of LS for SR1

Fall-time of LS for SR2

Fall-time of LS for SR3

Fall-time of LS for SR4

Fall-time of LS for SR5

Fall-time of LS for SR6

Fall-time of LS for SR7

t_f(LS),SR0

t_f(LS),SR1

t_f(LS),SR2

t_f(LS),SR3

t_f(LS),SR4

t_f(LS),SR5

t_f(LS),SR6

t_f(LS),SR7

0.05 0.25 0.55 µs

SR-level = SR0

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

–

0.36

0.5

–

µs

0.83

1.0

0.22 1.25 5.00 µs

–

2.5

5.0

–

µs

(table continues...)

Datasheet

15

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 7

(continued) Power stages – dynamic characteristics

Paragraph condition: V_S= 13.5 V, T_j= -40°C to 150°C, R_load= 2 Ω, 30 µH < L_load< 40 µH (in series to R_load), single

pulse, I_OUT> 90 mA freewheeling, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Switch-OFF delay time LS for t_dr(LS),SR0

SR0

1.5

2.5

2.8

3.1

3.9

4.4

5.0

8.1

14.0

3.4

µs

SR-level = SR0

SR-level = SR1

SR-level = SR2

SR-level = SR3

SR-level = SR4

SR-level = SR5

SR-level = SR6

SR-level = SR7

Switch-OFF delay time LS for t_dr(LS),SR1

SR1

–

Switch-OFF delay time LS for t_dr(LS),SR2

SR2

–

Switch-OFF delay time LS for t_dr(LS),SR3

SR3

–

Switch-OFF delay time LS for t_dr(LS),SR4

SR4

–

Switch-OFF delay time LS for t_dr(LS),SR5

SR5

3.2

–

7.0

–

Switch-OFF delay time LS for t_dr(LS),SR6

SR6

Switch-OFF delay time LS for t_dr(LS),SR7

–

SR7

4.2.1

Switching times

IN

t

t_dr(HS)t_r(HS)

t_df(HS)

t

f(HS)

V

OUT

80%

V_OUT

20%

t

Figure 8

Definition of switching times high-side (R_loadto GND)

Datasheet

16

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

IN

t

t_df(LS)t_f(LS)

t_r(LS)

t_dr(LS)

V

OUT

80%

V_OUT

20%

t

Figure 9

Definition of switching times low-side (R_loadto V_S)

Due to the timing diﬀerences for the rising and the falling edge there will be a slight diﬀerence between the

length of the input pulse and the length of the output pulse. It can be calculated using the following formulas

for Δt_xS= t_IN– t_OUT

:

•

Δt_HS= (t_dr(HS)+ 0.5 t_r(HS)) - (t_df(HS)+ 0.5 t_f(HS)

)

Δt_LS= (t_df(LS)+ 0.5 t_f(LS)) - (t_dr(LS)+ 0.5 t_r(LS)

)

One of 8 diﬀerent slew rates (SR) can be selected as described in Chapter 4.4.2.

Aꢀer waking up from stand-by mode, the slew rate level SR0 is selected.

4.3

Protection functions

The device provides integrated protection functions. These are designed to prevent IC destruction under fault

conditions described in the datasheet. Fault conditions are considered as “outside” normal operating range.

Protection functions are not designed to be used for continuous or repetitive operation, with the exception of

the overcurrent protection (Chapter 4.3.3) and undervoltage shutdown (Chapter 4.3.1).

Undervoltage, overtemperature and overcurrent events are indicated by a fault current I_IS(fault)at the IS pin as

described in Chapter 4.4.3.

The protection functions of the BTN9990LV are prioritized in the following way:

Table 8

Protection functions priorities

Function Reference

Undervoltage shutdown Chapter 4.3.1

Overtemperature protection Chapter 4.3.2

Priority

0 (highest)

1

2

3

Overcurrent protection

Stand-by mode

Chapter 4.3.3

The device only goes into stand-by mode if no fault is present

Table 9

Electrical characteristics – protection functions

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Undervoltage shutdown

(table continues...)

Datasheet

17

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 9

(continued) Electrical characteristics – protection functions

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Switch-ON voltage

Switch-OFF voltage

ON/OFF hysteresis

Overcurrent shutdown

V_UV(ON)

V_UV(OFF)

V_UV(HY)

–

5.5

4.5

–

V

V_Sincreasing

3.8

–

V_Sdecreasing

11)

0.8

Overcurrent detection level

high-side

75

95

115

A

V_S= 13.5 V

I_OCH0

I_OCL0

Overcurrent detection level

low-side

Thermal shutdown

11)

Thermal shutdown junction

temperature

T_jSD

T_jSO

ΔT

155

150

–

175

–

200

190

–

°C

K

Thermal switch-ON junction

temperature

Thermal hysteresis

7

Protection and reset timing

Shut-OFF time for HS and LS t_CLS

–

115

210

µs

Undervoltage recovery delay t_UVD

time

Reset pulse at INH and IN pin t_reset

9

–

µs

–

(INH & IN low)

4.3.1

Undervoltage shutdown with restart

To avoid uncontrolled motion of the driven motor at low voltages the device switches oﬀ (output is tri-state), if

the supply voltage drops below the switch-OFF voltage V_UV(OFF)

.

™

If a slew rate level SR0 to SR4 is selected, the NovalithIC + will switch oﬀ with the selected slew rate in case

of an undervoltage detection. For slew rate level SR5 to SR7, the device will switch oﬀ with slew rate level SR4

instead.

As soon as the supply voltage VS rises above the switch-ON voltage V_UV(ON), with a hysteresis of V_UV(HY), the

output channel of the device follows the IN pin again.

The restart is delayed with a time t_UVDwhich protects the device in case the undervoltage condition is caused by

a short circuit event (according to AEC-Q100-012).

Aꢀer power-up, the device is starting without waiting for the delay time t_UVD

.

The slew rate level and the undervoltage event are stored in analog latches, which are supplied by the

INH or/and IN pin. Thus at least one of the two pins always shall be set high during this undervoltage event,

11

Not subject to production test, specified by design.

Datasheet

18

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

until the presence of the I_IS(fault)current, to keep the previously set slew rate level aꢀer the undervoltage

shutdown.

In the case of both INH and IN being 0 during an undervoltage event, a power on reset is performed.

In case of an undervoltage event, the fault current I_IS(fault)is provided at the IS pin, once the supply voltage rises

above V_UV(ON)again.

The fault signal at the IS pin is reset aꢀer t_UVDaꢀer the supply voltage rises above V_UV(ON). This behavior is

shown in Figure 10.

V_S

V_UV(ON)

V_UV(HY)

V_UV(OFF)

t

INH

t

IN

t

V_OUT

t_UVD

t

I_IS

I_IS(fault)

CS

Current sense (CS)

t

Figure 10

Timing diagram for undervoltage behavior for load to GND

4.3.2

Overtemperature protection

™

The NovalithIC + is protected against overtemperature by an integrated temperature sensor. Overtemperature

leads to a shutdown of the output stage (both the high-side and low-side switch).

This state is latched until the device is reset by a low signal with a minimum length of t_resetat the INH and IN pin,

provided that its temperature has decreased at least the thermal hysteresis ΔT in the meantime.

™

If a slew rate level SR0 to SR4 is selected, the NovalithIC + will switch oﬀ with the selected slew rate in case of

overtemperature. For slew rate level SR5 to SR7, the device will switch oﬀ with slew rate level SR4 instead.

4.3.3

Overcurrent protection

The current in the bridge is measured in both switches.

As soon as the current in forward direction in one switch (high-side or low-side) is reaching the limit I_OCx, the

device goes either into current limitation mode or switches oﬀ with latch, depending on the selected SR-level.

The corresponding dependencies are described in Table 10.

Table 10

Slew rate dependent overcurrent strategies

Mode Note

SR-level

SR0

Current limitation (retry)

For details see Chapter 4.3.3.1

(table continues...)

Datasheet

19

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 10

(continued) Slew rate dependent overcurrent strategies

SR-level

SR1

Mode

Note

SR2

SR3

SR4

SR5

Switch-OFF with latch

Requiring reset of the fault latch

For details see Chapter 4.3.3.2

SR6

SR7

4.3.3.1

Current limitation

If this mode is selected according to Table 10 and the current in forward direction in one switch (high-side or

low-side) has reached the limit I_OCx, the aﬀected switch is deactivated and the other switch is activated for t_CLS

During that time all changes at the IN pin are ignored.

.

However, during current limitation, the INH pin can still be used to switch both MOSFETs oﬀ.

Aꢀer t_CLSthe switches follow the IN pin again.

The fault signal at the IS pin is reset aꢀer 1.5 * t_CLS. This behavior is shown in Figure 11.

I_L

t^CLS

I_OCx

I_OCx0

t

1.5 × t_CLS

I_IS

I_IS(fault)

Figure 11

Timing diagram current limitation (inductive load)

For this mode, the MOSFETs are switched oﬀ each with the same slew rates (SR-level) as in normal operation.

In combination with a typical inductive load, such as a motor, this results in a switched mode current limitation.

This method of limiting the current has the advantage of greatly reduced power dissipation in the BTN9990LV

compared to driving the MOSFET in linear mode.

Therefore it is possible to use the current limitation for a short time without exceeding the maximum allowed

junction temperature (e.g. for limiting the inrush current during motor start up). However, the regular use of the

current limitation is allowed as long as the specified maximum junction temperature is not exceeded. Exceeding

this temperature can reduce the lifetime of the device.

4.3.3.2

Switch-OFF with latch

If this mode is selected according to Table 10 and as soon as the current in forward direction in one switch

(high-side or low-side) has reached the limit I_OCx, both output stages are shut down. This state is latched until

Datasheet

20

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

the device is reset by a low signal with a minimum length of t_resetat the INH and IN pin. This behavior is

illustrated in Figure 12.

In order to minimize power dissipation, the MOSFETs are switched oﬀ each with the same slew rate level SR4.

t_OCx(filter)

I_L

I_OCx

I_OCx0

INH

IN

t

t_reset

I_IS

I_IS(fault)

OC fault (latched)

t

Figure 12

Timing diagram switch-OFF with latch (inductive load)

4.3.4

Short circuit protection

The device provides embedded protection functions against

•

Output short circuit to ground

Output short circuit to supply voltage

Short circuit of load

The short circuit protection is realized by the previously described undervoltage and overcurrent protection in

combination with the overtemperature shutdown of the device.

4.4

Control and diagnostics

The control inputs IN and INH consist of TTL/CMOS compatible Schmitt triggers with hysteresis which control

the integrated gate drivers for the MOSFETs. Setting the INH or/and IN pin to high enables the device. When

the INH pin is high, one of the two power switches is switched on depending on the status of the IN pin. To

deactivate both switches, the INH pin has to be set to low. No external driver is needed. The BTN9990LV can be

interfaced directly to a microcontroller, as long as the maximum ratings in Chapter 3.1 are not exceeded.

Table 11

Electrical characteristics – control and diagnostics

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Control inputs (IN and INH)

High level voltage INH, IN

V_INH(H)

V_IN(H)

V_INH(L)

V_IN(L)

–

1.6

1.3

2.1

–

V

–

Low level voltage INH, IN

1.0

(table continues...)

Datasheet

21

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 11

(continued) Electrical characteristics – control and diagnostics

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Low level voltage INH, IN for

VS < 8 V

V_{INH(L)_UV(OFF)}

V_{IN(L)_UV(OFF)}

V_INH(HYS)

V_IN(HYS)

I_INH(H)

I_IN(H)

I_INH(L)

I_IN(L)

0.4

–

V

V_S= 4.5 V, falling V_S

12)

Input voltage hysteresis

Input current high level

Input current low level

Slew rate selection

–

300

50

6

–

mV

µA

25

3

80

10

V_IN= V_INH= 5.5 V

V_IN= V_INH= 1.0 V

Slew rate level selection pulse t_SR

time

0.5

1

–

80

–

µs

See Figure 13

Slew rate selection mode

settling time

t_SRM

Wake-up time

t_wakeup

t_lag

–

5

–

µs

Aꢀer stand-by ¹²⁾

12)

Lag time between IN/INH

state change

0.5

Time to enter stand-by mode t_stdby

100

–

300

µs

Aꢀer both INH and IN

transitioned from high to

low

Sense current for SR-level SR0 I_IS(SR0)

1.8

2.15 2.5

mA

µA

SR-level = SR0

–

Current sense step between

two SR-levels

I_{IS(SR_step)}

200

240

290

Current sense

Diﬀerential current sense ratio dk_ILIS

in static on-condition dkILIS =

dIL/dIIS BTN9990

40

50

60

1 A ≤ I_L< I_OCH0

V_S= 13.5 V

R_IS= 2 kΩ

10³

Sense current in fault

condition

I_IS(fault)

I_IS(CS)

2.51 2.75 3.25 mA

V_S= 13.5 V

Maximum analog sense

current in normal operational

condition

–

2.5

1

mA

µA

V_S= 13.5 V; in CS mode ¹²⁾

Isense leakage current

I_ISL

V_INH= V_IN= 0 V

R_IS= 2 kΩ

(table continues...)

12

Not subject to production test, specified by design.

Datasheet

22

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 11

(continued) Electrical characteristics – control and diagnostics

V_S= 8 V to 18 V, T_j= -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless

otherwise specified)

Parameter

Symbol

Values

Unit

Note or condition

Min. Typ. Max.

Isense oﬀset current

I_IS(oﬀset)

30

160

385

µA

V_INH= 5 V

V_IN= 0 V or I_SD(HS)= 0 A

R_IS= 2 kΩ

Temperature sense at 25°C

I_{IS(T)_25°C}

–

1.2

–

mA

I_IS(T)

T_j= 25°C

R_IS= 2 kΩ

12)

Temperature coeﬀicient for

k_TIS

3.16 3.72 4.28 µA/K

temperature sense

4.4.1

Dead time generation

In bridge applications it has to be assured that the high-side and low-side MOSFET are not conducting at

the same time, connecting directly the battery voltage to GND. This is assured by a circuit in the driver IC,

generating a so called dead time between switching oﬀ one MOSFET and switching on the other.

The dead time generated in the driver IC is dependent on the selected slew rate.

4.4.2

Adjustable slew rate

In order to optimize electromagnetic emission, one of 8 diﬀerent switching speeds for the MOSFETs can be

selected. This selectability allows the user to optimize the balance between emission and power dissipation

within his own application. The slew rate adjustment function is only accessible, if no fault is present.

In case the device was in stand-by mode previously, the function is available aꢀer the device wake-up time

t_wakeup. Therefore the first pulse at pin IN needs to exceed the wake-up time t_wakeup

.

When INH = low and IN = high without a fault being present, the device is in SR selection mode with both

high-side and low-side MOSFETs being switched oﬀ.

When the SR selection mode initially is entered, a temperature information is provided as described in Chapter

4.4.3.2 at the IS pin independently from the selected SR-level.

Only when IN goes low (falling edge) for a duration of t_SR, the next mode is selected when IN rises again. During

this transition pulse, the INH pin has to be low permanently.

In the next mode, the slew rate won’t be changed, but a current sense signal I_IS(SRx)depending on the currently

selected SR-level SRx (as further described in Chapter 4.4.3.2) is provided at the IS pin. This allows to validate if

the desired SR-level has been selected.

For any further transition pulse, the next SR-level will be selected. The newly selected SR-level then will be

indicated at the IS pin with the corresponding I_IS(SRx)

.

Aꢀer reaching SR-level SR7, the next selectable SR-level is SR0 again. This procedure is illustrated in Figure 13.

The SR selection mode is leꢀ if a fault occurs or by setting INH to high. The procedure is shown in the state

diagram in Figure 16.

The states at pin IN and INH may not transition synchronous in the same direction, therefore a time delay of t_lag

need to be applied.

Aꢀer stand-by and power-up, the default value for the slew rate is level SR0.

12

Not subject to production test, specified by design.

Datasheet

23

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Aꢀer an undervoltage event the selected slew rate level is persistent, under the conditions described in Chapter

4.3.1 with more details.

In case an undervoltage event occurs during the slew rate selection mode, the slew rate configuration can

not be guaranteed. Therefore slew rate programming need to be repeated once the undervoltage event has

disappeared.

INH

t_SR

t_Lag

t_SRM

I_IS(T)

0

t_SR

t_wakeup

t

IN

I_IS(SR0)

I_IS(SR1)

I_IS(SR2)

I_IS

I_IS(CS)

I_IS(SR7)

I_IS(offset)

...

0

7

0

1

2

t

Stand-

By-Mode

Slew Rate Selection Mode

Normal operation

t

Figure 13

Slew rate level selection

t_wakeupis only needed if the device was in stand-by-mode before.

Note:

4.4.3

Status flag diagnosis with current and temperature sense capability

The sense pin IS is used as a combined current sense, temperature sense, slew rate level feedback and fault flag

output. Further details, in which state which signal is provided by the IS pin is described in Table 12. The IS pin

has three diﬀerent modes of operation:

4.4.3.1

Current sense

In normal operation (current sense mode), with the IN and INH pin being high (for further details see Table 12),

a current source is connected to the IS pin, which delivers a current proportional to the forward load current

flowing through the active high-side switch.

The sense current can be calculated out of the load current by the following equation.

I_IS= I_L/ dk_ILIS+ I_IS(oﬀset)

The other way around, the load current can be calculated out of the sense current by following equation.

I_L= dk_ILIS· (I_IS– I_IS(oﬀset)

)

The diﬀerential current sense ratio dk_ilisis defined by.

dk_ILIS= (I_L2– I_L1) / (I_IS(I_L2) – I_IS(I_L1))

If the high-side drain current is zero (I_SD(HS)= 0 A) the oﬀset current I_IS= I_IS(oﬀset)still will be driven. The external

resistor R_ISdetermines the voltage per IS output current. The voltage can be calculated by V_IS= R_IS· I_IS.

Datasheet

24

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

I_IS

I_{IS(fault),max}

I_IS(fault)

I_{IS(fault),min}

I_IS(CS),max

Current

sense

0

I_OCx0,min

I_OCx0,max

I_L

Figure 14

Sense current vs. load current

4.4.3.2

Temperature sense and slew rate feedback

In slew rate selection mode, with the IN pin being high and the INH being low aꢀer the first transition (further

details see Chapter 4.4.2) the IS pin provides a constant current I_IS(SRx), allowing to distinguish between the

diﬀerent SR-levels.

The sense current I_IScan be calculated as follows for the slew rate level SRx:

I_IS(SRx)= I_IS(SR0)– x ⋅ I_{IS(SR_step)}

To correctly determine all eight slew rate levels, I_IS(SR0)and each individual device's I_{IS(SR_step)}have to be

calibrated.

When initially entering the SR selection mode, a current source is connected to the IS pin, which delivers a

current proportional to the junction temperature of the control chip T_CC, which is illustrated in Figure 15. The

sense current I_IS(T)can be calculated out of the junction temperature in Kelvin T[K] by the following equation:

I_IS(T)= k_TIS· T_CC

Based on the temperature coeﬀicient k_TIS, the temperature T_CCthen calculates as follows:

T_CC= I_IS(T)/ k_TIS

Datasheet

25

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

I_IS

Max. I_IS(fault)

Min. I_IS(fault)

Max. I_IS(CS)

dI_IS(fault-IS)

k_TIS

T_j

0 K

T_jSD

Figure 15

Sense current vs. junction temperature in the initial state of the SR selection mode

4.4.3.3

Fault feedback

In case of a fault condition, according to the truth table (Table 12), the status output is connected to a current

source which is independent of the load current and provides I_IS(fault). The maximum voltage at the IS pin is

determined by the choice of the external resistor and the supply voltage.

4.4.4

Truth table

Table 12

Truth table

Device state

Inputs

Outputs

Mode

INH IN HSS LSS

IS

OFF OFF I_IS(oﬀset)See note ²⁾

Normal operation

0

Device enters stand-by mode

aꢀer t > t_stdby

tri state – Device in stand-by mode

1

0

1

OFF ON I_IS(oﬀset)LSS active

ON OFF CS ³⁾

HSS active

Slew rate selection

OFF OFF I_IS(SRx,T)Slew rate selection mode

I_IS(oﬀset)During INH = IN = low pulse

Overtemperature (OT) at HSS or LSS

1

X

1

X

1

X

1

0

X

1

X

OFF OFF I_IS(fault)

OFF ON I_IS(fault)

ON OFF I_IS(fault)

OFF OFF I_IS(fault)

OFF OFF * ¹⁾

Shutdown with latch, fault

detected ⁴⁾

Current limitation (CL) mode at HSS or

LSS

Switched mode, fault detected ⁵⁾

Overcurrent (OC) switch-OFF with latch

at HSS or LSS

OC shutdown with latch, fault

detected ⁴⁾

Undervoltage (UV), V_S< V_UV(OFF)

(table continues...)

Datasheet

26

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

Table 12

(continued) Truth table

X

1

OFF OFF

Undervoltage shutdown, fault

detected ⁶⁾

1) Sense current present ≤ I_IS(oﬀset)

.

2) The device only goes into stand-by mode if no fault is present.

3) Current sense - high-side (CS): I_IS= I_L/ dk_ILIS+ I_IS(oﬀset), for details see Chapter 4.4.3.1.

4) Requires the reset of the fault latch with INH = IN = low for t_resetto get back to normal operation.

5) Will return to normal operation aꢀer t_CLS; Fault signal I_IS(fault)is reset aꢀer 1.5*t_CLS(see Chapter 4.3.3.1).

6) When V_S> V_UV(ON)(rising), the device will return to normal operation aꢀer t_UVD; Fault signal I_IS(fault)is reset

aꢀer t_UVD(see Chapter 4.3.1).

Table 13

Switches – states table

Switches

Inputs

0 = logic LOW

1 = logic HIGH

X = 0 or 1

OFF = switched oﬀ

ON = switched on

Datasheet

27

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

4 Block description and characteristics

All states

*: I^ISI_IS(offset)

-: No output, high impedance

(except Standby)

V

_S< V_UV(OFF)

(decreasing)

Undervoltage

delay

Undervoltage

V^S> V^UV(ON)

(increasing)

INH = IN = 0

Unsupplied

INH IN HSS LSS

IS

INH IN HSS LSS

IS

I^IS(fault)

OFF OFF I_IS(fault)

Power-up

1

X

1

OFF OFF

*

V^S< V^UV(OFF)

(decreasing)

1

X

1

OFF OFF

All states

V

_S> V_UV(ON)

V

_S< V_UV(OFF)

T

_j> T_jSD

(decreasing)

after t = t_UVD

Overtemperature &

OC with latch

Stand-by

INH = 1

after t ≥ t^wakeup

T

_j> T_jSDor

INH IN HSS LSS

IS

INH IN HSS LSS

IS

SR - level > 4 &

(I_VS> I_OCH0or

0

OFF OFF

-

1

X

1

OFF OFF I_IS(fault)

I

_GND> I_OCL0)

INH = IN = 0

for t ≥ t_stdby

for t = t_stdby

IN = 1

after t ≥ t^wakeup

T

_j< T_jSO

&

Normal operation

reset fault (IN & INH = 0 for t_reset

)

All states

INH = 0 &

IN = 1

INH IN HSS LSS

IS

OFF ON I_IS(offset)

ON OFF CS

SR - level ≤ 4 & I_GND> I_OCL0

1

0

1

INH = 1

after t = t_CLS

SR selection mode –

Temperature feedback

Current limitation LS

INH = 1

INH IN HSS LSS

IS

INH IN HSS LSS

IS

0

1

OFF OFF

I_IS(T)

1

0

X

ON OFF I_IS(fault)

OFF OFF I_IS(fault)

after t = t_CLS

IN =

SR - level ≤ 4 &

_VS> I_OCH0

I

SR selection mode –

Current SR feedback

IN =

New SR - level:

SR^aà SR^b

SR selection mode –

Change SR

Current limitation HS

INH IN HSS LSS

IS

INH IN HSS LSS

IS

INH IN HSS LSS

IS

0

1

OFF OFF

I^IS(SRx)

0

1

OFF OFF

I_IS(SRx)

1

0

X

OFF ON

I_IS(fault)

OFF OFF I_IS(fault)

IN =

New SR - level:

SR_aà SR_b

:transition pulse

Figure 16

Simplified state diagram

Datasheet

28

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

5 Application information

5

Application information

Note:

The following information is given as a hint for the implementation of the device only and cannot be

regarded as a description or warranty of a certain functionality, condition or quality of the device.

V_BAT

Reverse polarity

protection

Microcontroller

A/D I/O I/O I/O

A/D

C_{DC_LINK}

~1000 µF

C₁

100 nF

optional

R₁₂

1 kΩ

R₂₂

1 kΩ

BTN9990LV

V_S

VS

C₁₁

10 µF

C₂₁

10 µF

R₂₁

1 kΩ

C_1O2V

*

C_2O2V

*

R₁₁

1 kΩ

INH

OUT

M

IN

IS

IN

C₁₀

100 nF

C₂₀

100 nF

C_1OUT

*

C_2OUT

*

IS

GND

C_1IS

1 nF

R_1IS

2 kΩ

R_2IS

2 kΩ

C_2IS

1 nF

*) C_1O2V, C_1OUT, C_2O2V,C_2OUToptional to otpimize EMC

Figure 17

Application circuit: H-bridge with two BTN9990LV

Note:

This is a simplified example of an application circuit. The function must be verified in the real

application.

To stabilize the supply voltage V_Sin PWM operation or in over current limitation a suﬀicient dimensioned low

ESR electrolytic capacitor CDC-Link is needed. It prevents destructive voltage peaks and drops. The voltage

™

ripple at the NovalithIC VS pin to GND must be kept below 1 V peak-to-peak and the capacitors need to be

sized accordingly. Therefore the ceramic capacitors C10/C11 respectively C20/C21 must be placed close to the

device pins VS and GND. The traces should be kept as short as possible to minimize stray inductance. The value

of the capacitors must be verified in the real application to ensure low ripple and transients at the VS pin. The

digital inputs IN and INH need to be protected against over-currents (e.g. caused by induced voltage spikes) by a

series resistor of typical 1 kΩ.

Reverse polarity

protection

V_S

D_Z1

10V

R₃

10 kΩ

R₁

1 kΩ

BTN9990LV

INH

C₁

100 nF

VS

OUT

R₂

1 kΩ

C_O2V

*

C₁₀

100 nF

C_DC-Link

~1000 µF

Micro-

OUT

IN

controller^OUT

M

IN

C₁₁

10 mF

C_OUT

IS

ADC

C_IS

1 nF

R_IS

2 kΩ

GND

*) C_O2V, C_OUT(~10 nF) optional to otpimize EMC

Figure 18

Application circuit: single half-bridge with load (motor) connected to GND

Note:

This is a simplified example of an application circuit. The function must be verified in the real

application.

Datasheet

29

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

5 Application information

The applicable PWM frequency for which the output signal at OUT pin tracks the control signal at IN pin

depends on:

•

Desired duty cycle range of the output OUT (e.g. 20% to 80%)

Selected slew rate for the output OUT

Switch-ON and switch-OFF delay times of HS / LS switches (t_dr(HS), t_df(LS), t_df(HS), t_dr(LS)), depending on slew

rate

•

Rise-time and fall-time of HS / LS switch (t_r(HS), t_f(LS), t_f(HS), t_r(LS)), depending on slew rate

Datasheet

30

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

6 Package

6

Package

Figure 19

PG-HSOF-7 (sTOLL)

To meet the world-wide customer requirements for environmentally friendly products and to be compliant with

government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e

Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).

For further package information, please visit our website:

https://www.infineon.com/packages

Datasheet

31

Rev. 1.0

2021-10-12

BTN9990LV NovalithIC^™+

High current PN half-bridge with integrated driver

7 Revision history

7

Revision history

Document version Date of release Description of changes

1.0

2021-10-12

Initial release

Datasheet

32

Rev. 1.0

2021-10-12

Trademarks

All referenced product or service names and trademarks are the property of their respective owners.

Edition 2021-10-12

Published by

IMPORTANT NOTICE

WARNINGS

The information given in this document shall in no

event be regarded as a guarantee of conditions or

characteristics (“Beschaﬀenheitsgarantie”).

With respect to any examples, hints or any typical

values stated herein and/or any information regarding

the application of the product, Infineon Technologies

hereby disclaims any and all warranties and liabilities

of any kind, including without limitation warranties of

non-infringement of intellectual property rights of any

third party.

In addition, any information given in this document is

subject to customer’s compliance with its obligations

stated in this document and any applicable legal

requirements, norms and standards concerning

customer’s products and any use of the product of

Infineon Technologies in customer’s applications.

Due to technical requirements products may contain

dangerous substances. For information on the types

in question please contact your nearest Infineon

Technologies oﬀice.

Except as otherwise explicitly approved by Infineon

Technologies in a written document signed by

authorized representatives of Infineon Technologies,

Infineon Technologies’ products may not be used in

any applications where a failure of the product or

any consequences of the use thereof can reasonably

be expected to result in personal injury.

Infineon Technologies AG

81726 Munich, Germany

©

2021 Infineon Technologies AG

Do you have a question about any

aspect of this document?

Email: erratum@infineon.com

Document reference

IFX-kdq1633081523313

The data contained in this document is exclusively

intended for technically trained staﬀ. It is the

responsibility of customer’s technical departments to

evaluate the suitability of the product for the intended

application and the completeness of the product

information given in this document with respect to such

application.


型号：	BTN9990LV
厂家：	Infineon
描述：	The MOTIX™ BTN9990LV is part of the MOTIX™ (NovalithIC™) family containing one p-channel highside MOSFET and one n-channel lowside MOSFET with an integrated driver IC in one package. Due to the p-channel highside switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, undervoltage, overcurrent and short circuit. The MOTIX™ BTN9990LV provides a cost optimized solution for protected high current PWM motor drives with very low board space consumption. This device comes in a small HSOF-7-1 package.
文件：	总33页 (文件大小：656K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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