BTS500601EGAAUMA1 概述
Buffer/Inverter Based Peripheral Driver, 外围驱动器
BTS500601EGAAUMA1 规格参数
是否Rohs认证: | 符合 | 生命周期: | Obsolete |
包装说明: | , | Reach Compliance Code: | not_compliant |
ECCN代码: | EAR99 | HTS代码: | 8542.39.00.01 |
Factory Lead Time: | 1 week | 风险等级: | 5.67 |
接口集成电路类型: | BUFFER OR INVERTER BASED PERIPHERAL DRIVER | JESD-609代码: | e3 |
峰值回流温度(摄氏度): | NOT SPECIFIED | 端子面层: | Tin (Sn) |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | Base Number Matches: | 1 |
BTS500601EGAAUMA1 数据手册
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PDF下载Datasheet, V1.0, April 2009
BTS50060-1EGA
Smart High-Side Power Switch
PROFET™
Automotive
Smart High-Side Power Switch
BTS50060-1EGA
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
2.1
2.2
Block Diagram and Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment BTS50060-1EGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
4.2
4.3
4.4
5
Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Output On-State Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching losses for resistive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output Inductive Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Inverse Operation Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Undervoltage shutdown and restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical Characteristics: Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
6
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Short Circuit Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Over Temperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Infineon® INTELLIGENT LATCH - fault acknowledge and latch reset . . . . . . . . . . . . . . . . . . . . . . . . 19
Reverse Polarity Protection - ReverSaveTM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Loss of Ground Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Loss of Load Protection, Loss of Vbb Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Electrical Characteristics: Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7
Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Diagnosis Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Diagnosis during ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Diagnosis during OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Diagnosis Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Electrical Characteristics: Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.1
7.2
7.3
7.4
7.5
8
8.1
8.2
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Hints for PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10
Datasheet
2
V1.0, 2009-04-06
Smart High-Side Power Switch
PROFET™
BTS50060-1EGA
1
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
Part of scalable product family
3.3 and 5V compatible, ground referenced CMOS compatible inputs
Optimized electromagnetic compatibility (EMC)
Very low standby current
Stable behavior at under-voltage
Secure load turn-off while device ground disconnected
ReverSaveTM - Reverse battery protection without external components
Inverse load current capability
PG-DSO-12-16
Infineon INTELLIGENT LATCH
Green Product (RoHS compliant)
AEC qualified
Extended operating voltage range
Vbb(ext)
VDS(CL)
RDS(ON)
RDS(ON)
IL(nom)
6 .. 28V
42 V
6 mΩ
12 mΩ
15 A
Minimum power stage over-voltage protection
Typical on-state resistance at Tj = 25°C
Maximum on-state resistance at Tj = 150°C
Typical nominal load current
Minimum short circuit shutdown Threshold (SCT)
Maximum stand-by current for whole device with load for Tj ≤ 85°C Ibb(OFF)
IL(SC)high
100 A
10 µA
Description
The BTS50060-1EGA is a single channel high-side power switch in PG-DSO-12-16 package providing embedded
protective functions including ReverSaveTM and Infineon INTELLIGENT LATCH.
The power transistor is built by a N-channel vertical power MOSFET with charge pump. The design is based on
Smart power chip on chip technology.
The BTS50060-1EGA has ground referenced CMOS compatible inputs.
ReverSaveTM is a protection feature that causes the power transistor to switch on in case of reverse polarity. As
a result, the power dissipation is reduced.
Infineon INTELLIGENT LATCH ensures a latched switch-off and reporting in case of fault condition.
The Infineon ENHANCED SENSE pin IS provides a sophisticated diagnostic feedback signal including current
sense functionality, open load in ON-state (via sense signal) and open load and short to battery in OFF-state.
Diagnostic reporting can be enabled and disabled by the DEN-Pin in ON-state and OFF-state. In OFF-state, open
load detection can also be disabled by the DEN-Pin to optimize stand-by current.
Type
Package
Marking
BTS50060-1EGA
PG-DSO-12-16
BTS 50060A
Datasheet
3
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Overview
Protective Functions
•
•
•
•
•
•
•
•
•
•
Short circuit protection with latch
Thermal shutdown with latch
Infineon INTELLIGENT LATCH - reset able latch resulting from protective switch-off
ReverSaveTM - Reverse battery protection by self turn on of power MOSFET
Inverse load current capability - Inverse operation function
Under voltage shutdown with restart
Over voltage protection (including load dump)
Loss of ground protection
Loss of Vbb protection (with external diode for charged inductive loads)
Electrostatic discharge protection (ESD)
Diagnostic Functions
•
•
Enable function for diagnosis and reporting
Provides capability for muliplexing of the reporting signal from multiple devices by DEN pin.
In ON-state:
•
•
•
Provides analog sense signal of load current in normal operation mode
Provides defined fault current signal in case of overload, over temperature and short circuit to ground
Open load detection in ON-state by load current sense
In OFF-State:
•
Open load and short to battery detection
Applications
•
•
•
•
µC compatible high-side power switch with diagnostic feedback for 12 V system grounded loads
All types of resistive, inductive and capacitive loads
Most suitable for loads with high inrush currents, such as glow plugs, PTC heaters, or lamps
Replaces electromechanical relays, fuses and discrete circuits
Datasheet
4
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Block Diagram and Terms
2
Block Diagram and Terms
2.1
Block Diagram
control chip
base chip
Vbb
voltage sensor
internal
power
T
over
supply
temperature
clamp for
inductive load
IN
gate control
&
driver
logic
over current
switch-off
charge pump
ESD
DEN
IS
protection
OUT
load current sense
open load detection @OFF
Overview.emf
GND
Figure 1
Block Diagram
2.2
Terms
Vbb
Ibb
VbIS
VDS
or VON
orVOFF
VBB
IIN
IL
IN
OUT
IS
V
VOUT
IDEN
IIS
IN
DEN
VDEN
VIS
GND
RIS
IGND
Terms. emf
Figure 2
Terms
Datasheet
5
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment BTS50060-1EGA
(top view)
GND
IN
1
2
3
4
5
6
12
11
10
9
NC
OUT
OUT
OUT
OUT
NC
IS
DEN
NC
NC
8
7
heatslug (Vbb)
PDSO12.emf
Figure 3
Pin Configuration
3.2
Pin Definitions and Functions
Pin
1
Symbol I/O Function
GND
-
Ground connection for control chip
2
IN
I
Input: activates power switch. Has an internal pull down resistor.
3
IS
O
Sense Output: With diagnosis enabled, provides a sense current proportional to the
load current during normal operation. During open load in ON provides no current.
Provides a defined fault current in case of overload, over temperature or short circuit
during ON or open load or short to battery during OFF (see Table 1 “Truth Table” on
Page 24)
4
DEN
I
Diagnosis ENable: with high level enables diagnosis reporting and open load / short to
battery detection in OFF. Resets a protective, latched switch-off by falling edge
acknowledgement. Has an internal pull down resistor.
5, 6, 7, NC
12
8, 9, 10, OUT
11
-
Not connected. For recommendation on handling the NC pins, please see Chapter 8.1.
Output: output to the load; pins 8 to 11 must be externally shorted together1)
Supply Voltage: positive power supply for logic and output
O
-
heatslug Vbb
1) Not shorting all output pins will considerably increase the on-state resistance, reduce the peak current capability, the
clamping capability and decrease the current sense accuracy.
Datasheet
6
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Operation outside the parameters listed here may cause permanent damage to the device. Exposure to maximum
rating conditions for extended periods may affect device reliability
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Max.
Unit Conditions
Min.
Supply Voltage
4.1.1
4.1.2
4.1.3
Supply voltage
Reverse polarity voltage
Vbb
-Vbb(rev)
0
0
0
42
16
28
V
V
V
Tj = 25 °C 2)
3)
Supply voltage for short circuit protection Vbat(SC)
(single pulse)
4.1.4
Supply Voltage for Load Dump
protection
Vbb(LD)
-
42
V
RI = 2 Ω 4),
RL = 1Ω
td =400 ms
Tj = 25 °C
Input Pins
4.1.5
4.1.6
4.1.7
4.1.8
Voltage at IN pin
Current through IN pin
Voltage at DEN pin
VIN
IIN
VDEN
IDEN
-0.3
-2
-0.3
-2
6
2
6
2
V
mA
V
-
2)
-
2)
Current through DEN pin
mA
Output Pins
4.1.9
4.1.10
Voltage at sense pin
Current through sense pin IS
VIS
IIS
-0.3
VZIS
10
V
mA
-
-
-102)5)
Power Stages
4.1.11
4.1.12
Load current 6)
|IL|
-
-
IL(SC)
A
mJ
-
Inductive load switch-off energy (single EAS
170
Vbb=13.5V7),
pulse)
IL(0) = 50A,
T
j(0) ≤ 150 °C
4.1.13
Inductive load switch-off energy
(repetitive pulses)
EAR
-
83
mJ
Vbb=13.5V7)8)
,
I
L(0) = 20A,
j(0) ≤105 °C
T
Temperatures
4.1.14
4.1.15
Junction temperature
Dynamic temperature increase while
switching
Tj
∆Tj
-40
-
150
60
°C
K
-
-
4.1.16
Storage temperature
Tstg
-55
150
°C
-
ESD Susceptibility
4.1.17
ESD susceptibility HBM
VESD
kV
according to
EIA/JESD 22-A
114B
IN, DEN, IS, Vbb, OUT
-2
-4
2
4
Vbb versus OUT
1) Not subject to production test, specified by design.
2) t ≤ 2 min
Datasheet
7
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
General Product Characteristics
3) Short circuit is defined as a combination of remaining resistances and inductances. See Figure 15.
4) Vbb(LD) is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839. RI is the internal resistance of
the Load Dump pulse generator
5) Valid at disabled diagnosis.
6) Over current threshold switch-off is a protection feature. Protection features are not designed for continuous repetitive
operation.
7) See also Chapter 5.5 .
8) Resuls from simulation of temperature swing. Not subject to production test, specified by design.
Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Pos.
Parameter
Symbol
Limit Values
Max.
Unit
Conditions
Min.
Supply Voltage
4.2.1
4.2.2
4.2.3
Supply voltage range for normal
Vbb(nor)
9
16
V
-
operation
2)
Extended supply voltage range for Vbb(ext)
6
281)
V
operation
Operating current
VIN = 0V, VDS > VDS(OL)
VIN = 5V
IGND
mA
V
DEN = 5V,
VIS < 5.5V,
bb = Vbb(nor)
IIS - IIS(LH) > 30 µA,
IS(lim) > IIS,
bb = Vbb(nor)
-
-
4
24
59
V
4.2.4
Load current range for sense
IL(IS)
1.5
A
functionality 1)
I
V
,
VIN = VDEN = 5 V,
V
bIS > 5 V
4.2.5
Junction temperature
Tj
-40
150
°C
-
1) Not subject to production test, specified by design
2) In extended supply voltage range, the device is functional but electrical parameters are not specified.
Note:Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
Datasheet
8
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
General Product Characteristics
4.3
Thermal Resistance
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
-
Max.
1.3
2)
3)
4.3.1
4.3.2
4.3.3
Junction to case 1)
Rthjc
Rthj(cc)c
Rthja
-
-
K/W
K/W
K/W
Control chip to case 1)
40
-
Junction to ambient 1)
–
device on PCB4)
-
27
-
1) Not subject to production test, specified by design
2) Specified Rthjc value is simulated at natural convection on a cold plate setup. Ta = 25 °C.
3) Specified Rthj(cc)c value is simulated at natural convection on a cold plate setup. Ta = 25 °C, IL = 0A.
4) Specified Rthja value and Figure 4 are according Jedec JESD51_7 at natural convection on FR4 2s2p board. The
BTS50060-1EGA was measured on a 76.2 x 114.3 x 1.6 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu)
applying power losses of 1.4W at the channel. According to JESD51-5 a thermal via array under the exposed pad contacted
the first inner copper layer. Ta = 25 °C.
Figure 4 shows the typical transient thermal impedance of BTS50060-1EGA.
ꢂꢀꢀ
ꢁ ꢁꢂꢃꢄꢅꢆ
ꢆꢇꢈ
ꢂ
ꢀꢁꢂ
ꢃꢄꢅ
ꢂꢀꢀ ꢂꢀꢀꢀ
ꢀ ꢀ
ꢀ
ꢀꢁꢀꢂ ꢀꢁꢂ
ꢂ
Figure 4
Transient Thermal Impedance Zth(JA)=f(tp) 4)
4.4
Package
Pos.
4.4.1
4.4.2
Parameter
Jedec humidity category acc. J-STD-020-D
Jedec classification temperature acc. J-STD-020-D 260°C
Value
MSL3
Test Conditions
-
-
Datasheet
9
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
5
Power Stages
The power stage is built by a N-channel vertical power MOSFET (DMOS) with charge pump.
5.1
Input Circuit
Figure 5 shows the input circuit of the BTS50060-1EGA. The input resistor to ground ensures that the input signal
is low in case of open input pin. The zener diode protects the input circuit against ESD pulses.
IN
RIN
GND
Input.emf
Figure 5
Input Circuit
A high signal at the input pin causes the DMOS to switch on.
5.2
Output On-State Resistance
The on-state resistance RDS(ON) depends on the supply voltage Vbb and the junction temperature Tj. Figure 6
shows these dependencies for the typical on-state resistance. The on-state resistance in reverse polarity mode is
described in Chapter 6.5.
ꢂꢀ
ꢂ ꢇꢈꢃꢉꢊꢆ
ꢂꢀ
ꢂ ꢇꢈꢃꢉꢊꢆ
ꢑꢒꢓꢔ
Vbb = 13.5 V
Tj = 25°C
ꢏꢏꢐΩ
ꢏꢏꢐΩ
ꢊ
ꢉꢁꢊ
ꢀ
ꢊ
ꢉꢁꢊ
ꢀ
ꢑꢒꢓꢔ
ꢏꢏꢛꢜ
ꢂꢎꢀ
ꢚꢌꢀ
ꢀ
ꢌꢀ
ꢍꢀ
ꢀ
ꢌ
ꢍ
ꢂꢉ ꢂꢎ ꢉꢌ ꢉꢍ
ꢏꢏꢕ
ꢄ ꢌ
ꢀ ꢖꢖꢗꢘꢙ
ꢃ ꢋꢋ
Figure 6
Typical On-State Resistance
5.3
Output Timing
The power stage is designed for high side configuration (Figure 9).
Datasheet
10
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
The power stage has a defined switching behavior. Defined slew rates as well as edge shaping support PWM’ing
of the load while achieving lowest EMC emission at minimum switching losses.
VIN
VIN (H ),min
VIN(L),max
t
tON
tr
tOFF
VOU T
90%
t
f
50%
30%
10%
(dV/
(dV/
dt)ON
dt)OFF
t
t
Ibb
tstandby
Ibb(OFF)
SwitchOn.emf
Figure 7
Switching a Load (resistive)
5.4
Switching losses for resistive loads
Switching the device on and off may cause switching losses EON and EOFF. In case of a resistive load, the switching
losses depend on the supply voltage Vbb as well as on the load current IL and the junction temperature Tj. Figure 8
shows this dependencies of the switching losses.
Datasheet
11
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
E ON,
E OFF
E ON,
E OFF
30
100
mJ
typ.,
typ.,
T j = 25°C,
T j = 25°C,
V bb = 13.5V
mJ
R L = 1Ω
20
15
10
5
10
E OFF
E OFF
e addel
E ON
1
E ON
silico.
0,1
0
0
5
10
15
20
V
30
V bb
0,1
1
10
R L
Ω
E
ON, 4
E OFF
E OFF
mJ
2
1
0
E ON
typ.,
V bb=13.5V,
R L = 1Ω
-50
0
50
°C
150
T j
Figure 8
Typical switching losses EON and EOFF
5.5
Output Inductive Clamp
When switching off inductive loads, the output voltage VOUT drops below ground potential due to the inductive
properties of the load ( -diL/dt = -vL/L ; -VOUT ≅ -VL ).
Datasheet
12
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
VBB
control chip
base chip
VDS(CL)
Vbb
iL
OUT
VOUT
GND
OutputClamp.emf
Figure 9
Output Clamp
To prevent destruction of the device, there is a voltage clamp mechanism implemented that keeps the voltage drop
across the device at a certain level. At nominal battery voltage the output is clamped to VOUT(CL). At over voltages
the output is clamped to VDS(CL). See Figure 9 and Figure 10 for details. The maximum allowed load inductance
is limited.
VOUT
ON
OFF
Vbb
Vbb
VDS( CL)
t
t
VDS( CL)
VOUT(CL)
IL
Vbb
VOUT(CL)
VOUT
InductiveLoad.emf
Figure 10 Switching an Inductance
Maximum Load Inductance
While de-energizing inductive loads, energy has to be dissipated in the BTS50060-1EGA. This energy can be
calculated by the following equation:
– VOUT(CL)
RL ⋅ IL
VOUT(CL)
L
RL
------------------------------
------
E = (Vbb + VOUT(CL) ) ⋅
⋅ ln 1 + ------------------------- + IL
⋅
RL
In the event of de-energizing very low ohmic inductances (RL≈0) the following, simplified equation can be used:
VDS(CL)
2
1
--
------------------------------------
VDS(CL) – Vbb
E = LIL
⋅
2
The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 11 for the
maximum allowed energy dissipation.
Datasheet
13
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
Tj(0) = 105°C, Vbb = 13.5V
Tj(0) = 150°C, Vbb = 13.5V
ꢝꢊꢀ
180
ꢆ ꢅꢈ
E AR
mJ
ꢐꢞ
140
120
100
80
ꢉꢊꢀ
ꢉꢀꢀ
ꢂꢊꢀ
ꢂꢀꢀ
ꢊꢀ
60
40
20
ꢀ
0
A
100
I L(0)
!
ꢂꢀꢀ
ꢅ ꢍꢃꢎꢆ
ꢀ
ꢉꢀ
ꢌꢀ
ꢎꢀ
0
20
40
60
Figure 11 Maximum energy dissipation1) 2)
Note:Clamping overrides all protection functionalities. In order to avoid device destruction resulting from inductive
switch-off or over voltage the device has to be operated within the maximum ratings.
5.6
Inverse Operation Capability
The BTS50060-1EGA can be operated in inverse load current condition (+VOUT > +Vbb). The device can not block
the current flow during inverse mode.
In ON condition a voltage drop across the activated channel of
-VON(inv)=RON(inv)*(-IL) can be observed.
In OFF condition a voltage drop across the intrinsic body diode of -VOFF(inv)=f(-IL) can be observed.
As long as the inverse current does not exceed |-IL| ≤ |-IL(inv)| the logic will operate and report according Table 1
and the BTS50060-1EGA will be able to remain in ON mode.
+Vbb
VBB
control chip
base chip
VON(inv)
Vbb
GND
OUT
+
-
-IL
Inverse_capability.emf
Figure 12 Inverse current capability
1) Not subject to production test, specified by design.
2) Resuls for EAR from simulation of temperature swing.
Datasheet
14
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
Note:Activation of any protection mechanism will not block the current flow. Over temperature detection and
current sense is not functional during inverse mode.
5.7
Undervoltage shutdown and restart
The BTS50060-1EGA is supplied by Vbb. The internal logic permanently monitors the supply voltage Vbb. In the
event that the supply voltage drops below the under voltage shutdown threshold Vbb(u), the BTS50060-1EGA will
switch off. If the supply voltage reaches nominal operating voltage range Vbb(ext), the BTS50060-1EGA will switch
on after a delay tdelay(UV), assuming VIN=High. Protective latch is reset by undervoltage shutdown.
Vbb
Vbb(ext)
Vbb(u)
t
VOUT
ON
tdelay(UV)
Z
t
Undervoltage.emf
Figure 13 Undervoltage shutdown and restart
Datasheet
15
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
5.8
Electrical Characteristics: Power Stages
Note:Characteristics show the deviation of parameters at the given supply voltage and junction temperature.
Typical values show the typical parameters expected from manufacturing.
V
bb = 9 V to 16 V, Tj = -40 °C to +150 °C (unless otherwise specified)
typical values: Vbb = 13.5 V, Tj = 25 °C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
General
5.8.1
2)
Stand-by current
Tj = -40 °C, Tj = 25 °C
Tj ≤ 85 °C 1)
Ibb(OFF)
µA
,
-
-
-
6
6
8
10
10
|VIN|=|VDEN|≤0.3V3),
V
OUT=VIS=0V,
Tj = 150 °C
100
t > tstandby,
no fault condition
5.8.2
Stand-by time 1) 2)
tstandby
-
0.5
1
ms
|VIN|=|VDEN|≤0.3V,
V
-
-
OUT=VIS=0V
5.8.3
5.8.4
Undervoltage shutdown1)
Vbb(u)
tdelay(UV)
-
-
5.7
10
6
-
V
ms
Undervoltage recovery time1)
Input characteristics
5.8.5
5.8.6
5.8.7
5.8.8
L-input level
H-input level
input hysteresis
input pull down resistor
VIN(L)
VIN(H)
VIN(hys)
RIN
-0.3
2.0
-
-
-
1.0
5.5
-
V
V
mV
-
-
1)
100
100
50
200 kΩ
-
Output characteristics
5.8.9
On-state resistance
RDS(ON)
mΩ
VIN=5V, IL=20A
Tj=25°C
-
-
-
-
6
8.5
8
-
Tj=150°C
12
-
Vbb=6V, Tj=25°C
Vbb=6V, Tj=150°C
10
20
-
5.8.10 Nominal load current 1)4)
5.8.11 Output leakage current
5.8.12 Output clamp during switch-off
IL(nom)
-
15
3
A
TA = 85 °C
Tj ≤ 150 °C
IL(OFF)
-
100 µA
VIN=VDEN=0V,
V
V
OUT=0V
5)
5)
-VOUT(CL)
16
16
42
42
18
20
50
51
20
25
-
V
V
V
V
OUT≥Vbb−VDS(CL)
,
,
IL = 40 mA
V
OUT≥Vbb−VDS(CL)
IL = 20 A 1)
5)
5.8.13 Output clamp during over voltage VDS(CL)
VDS≤Vbb -VOUT(CL)
,
,
IL = 40 mA
5)
-
VDS≤Vbb -VOUT(CL)
IL = 20 A 1)
5.8.14 Switch-On energy 5N95% VOUT
5.8.15 Switch-Off energy 95P5% VOUT
EON
EOFF
RON(inv)
-
-
3
3.5
5
5
mJ
mJ
mΩ
Vbb = 13.5 V,
RL = 1 Ω
5.8.16 Inverse operation
on-state resistance
Tj=25°C
VIN = 5 V,
IL = -20 A,
no protective
switch-off
-
-
6
8.5
-
12
Tj=150°C
Datasheet
16
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Power Stages
V
bb = 9 V to 16 V, Tj = -40 °C to +150 °C (unless otherwise specified)
typical values: Vbb = 13.5 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
Typ. Max.
Unit
Conditions
Min.
5.8.17 Inverse operation output voltage
-VOFF(inv)
mV
VIN=0V,
drop
IL = -10 A
Tj=25°C
Tj=150°C
-
-
20
700
400
-
900
800
-
5.8.18 Inverse current capability1)
-IL(inv)
A
-
Timings
5.8.19 Turn-on time to
tON
µs
V
bb = 13.5 V
RL = 1Ω
bb = 13.5 V
RL = 1 Ω
bb = 13.5 V
RL = 1 Ω
bb = 13.5 V
RL = 1 Ω
90%VOUT
-
-
250
250
0.12
500
500
0.21
5.8.20 Turn-off time to
tOFF
µs
V
10%VOUT
5.8.21 Slew rate On 30N50% VOUT
(dV/
V/µs
V/µs
V
dt)ON
0.07
5.8.22 Slew rate Off 50P30% VOUT
Tj = -40 °C, Tj = 25 °C
Tj ≤ 85 °C1)
-(dV/
V
dt)OFF
0.07
0.07
0.07
0.12
0.12
0.12
0.23
0.215
0.21
Tj = 150 °C
1) Not subject to production test, specified by design
2) In case of protective switch-off STANDBY is only reached if the fault was acknowledged while IN=LOW by
DEN=HIGHPLOW and tstandby expired. See also Chapter 6.4 for details.
3) Tested at VIN=VDEN=0V only
4) according JESD51_7, FR4 2s2p board, 76.2 x 114.3 x 1.6 mm, 2x70µm Cu, 2x35µm Cu.
5) See Figure 10.
Datasheet
17
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Protection Functions
6
Protection Functions
The BTS50060-1EGA provides embedded protective functions. Integrated protection functions are designed to
prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as
“outside” normal operating range. Protection functions are neither designed for continuous nor repetitive
operation.
6.1
Short Circuit Protection
The internal logic permanently monitors the load current IL. In the event the load current exceeds the short circuit
shutdown threshold (IL>IL(SC)), the device will switch off immediately. Any protective switch off latches the output.
Please refer to Figure 14 for details. The protective switch off remains latched until the fault is acknowledged and
reset by a falling edge at the DEN pin. See also Chapter 6.4.
VIN
t
VDEN
t
IL
IL(SC)
t
reset
latch
reset
latch
reset
reset
latch
latch
latch
I_L(SC)_detect.emf
Figure 14 Shutdown by short circuit current detection
Before switching on, the device is measuring the battery voltage Vbb(0). In case Vbb(0) is above Vbb(SCT), the short
circuit current threshold IL(SC)high is reduced to a lower level IL(SC)low
.
Note:In case of a short circuit between OUT and ground, an impedance between Vbat and Vbb pin of the device
(see Figure 15) may cause the device’s supply voltage to drop below Vbb(u) before short circuit shutdown
threshold is reached. In that case, the device will detect an undervoltage condition and behave as described
in Chapter 5.7.
6.2
Short Circuit Impedance
The capability to handle single short circuit events depends on the battery voltage as well as on the primary and
secondary short impedance. Figure 15 outlines allowable combinations for a single short circuit event of
maximum, secondary inductance for given secondary resistance.
Datasheet
18
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Protection Functions
15
LSC
Vbb
LSC
RSC
µH
5uH
IN OUT
10
PROFET
Applicable impedances
for:
10mΩ
GND
V
bat ≤ Vbat(SC)
Vbat
5
I
L(SC) = IL(SC)High for
Vbb < Vbb(SCT)
IL(SC) = IL(SC)Low for
Vbb ≥ Vbb(SCT)
SHORT
;
CIRCUIT
;
0
short_circuit.emf
0
10
20
30 mΩ 50
RSC
L-R.emf
Figure 15 Short circuit
6.3
Over Temperature Protection
The internal logic permanently monitors the junction temperature of the output stage. In the event of an over
temperature (Tj > Tjt) the output will switch off immediately. Please refer to Figure 16 for details.The protective
switch off remains latched until the fault is acknowledged and reset by a falling edge at the DEN pin. See also
Chapter 6.4.
VIN
t
VDEN
ϑjt
t
t
ϑj
reset
latch
reset
latch
latch
reset
latch
Over_Temp.emf
Figure 16 Over temperature detection
6.4
Infineon® INTELLIGENT LATCH - fault acknowledge and latch reset
®
The BTS50060-1EGA provides Infineon INTELLIGENT LATCH to avoid permanent resetting of a protective,
latched switch off in PWM applications. To reset a latched protective switch off the fault has to be acknowledged
by a falling edge at the DEN pin. For a reset signal it’s recommended to set the DEN signal to HIGH for 20µs before
setting DEN to LOW for 20µs.
Please refer to Figure for details.
Datasheet
19
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Protection Functions
IN
t
t
t
t
t
DEN
over temp. /
short circuit
VOUT
Ibb
latch
reset
latch
reset
fault_acknowledge.emf
Infineon INTELLIGENT LATCH - fault acknowledge and latch reset
6.5
Reverse Polarity Protection - ReverSaveTM
The device can not block a current flow in reverse battery condition. In order to minimize power dissipation, the
device offers ReverSaveTM functionality. Under reverse polarity condition, the output stage will be switched on,
provided a sufficient gate to source voltage is generated VGS≈VGND_bb. Please refer to Figure 17 for details.
-Vbb
VBB
control chip
base chip
VON(rev)
Vbb
OUT
GND
-IL
Reverse.emf
Figure 17 Reverse battery protection
Use the following formula for estimation of overall power dissipation Pdiss(rev) in reverse polarity mode.
2
P
≈ R
⋅ I
diss(rev)
ON(rev)
L
Note:No protection mechanism is active during reverse polarity. The control chip is not functional. Potentials of
logic pins can become negative. Affected pins have to be protected by means of series resistors.
Datasheet
20
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Protection Functions
6.6
ESD Protection
All logic pins have ESD protection. Beside the output clamp for the power stage as described in Section 5.5 there
is a clamp mechanism implemented for pin IS. See Figure 18 for details.
Vbb
control chip
IN
base chip
DEN
IS
OUT
GND
OverVoltage.emf
Figure 18 Over-Voltage Protection
6.7
Loss of Ground Protection
In case of complete loss of the device ground connections the BTS50060-1EGA securely changes to or remains
in OFF state, if the sense resistor RIS is higher than 500Ω.
6.8
Loss of Load Protection, Loss of Vbb Protection
In case of loss of load with charged primary inductances the maximum supply voltage has to be limited. It is
recommended to use a Z-diode, a varistor (VZa < 42 V) or Vbb clamping power switches with connected loads in
parallel.
In case of loss of Vbb connection with charged inductive loads, a current path with load current capability has to
be provided, to demagnetize the charged inductances. It is recommended to use a diode, a Z-diode or a varistor
(VZb < 16 V, VZL+VD < 16 V, ).
For higher clamp voltages currents through all pins have to be limited according to the maximum ratings. Please
refer to Figure 19 for details.
VBB
VBB
control
chip
control
chip
base chip
base chip
VZb
VZa
OUT
OUT
VD
GND
GND
VZL
Vbb_Load_disconnect.emf
Vbb_disconnect.emf
Figure 19 Loss of Vbb
In case of complete loss of Vbb the BTS50060-1EGA remains in OFF state.
Datasheet
21
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Protection Functions
6.9
Electrical Characteristics: Protection Functions
Note:Characteristics show the deviation of parameters at the given supply voltage and junction temperature.
Typical values show the typical parameters expected from manufacturing
V
bb = 9 V to 16 V, Tj = -40 °C to +150 °C (unless otherwise specified)
typical values: Vbb = 13.5 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
Typ. Max.
Unit
Conditions
Min.
Over-Load Protection
6.9.1
6.9.2
6.9.3
6.9.4
Short circuit shutdown threshold
IL(SC)high
100
150
200
95
25
-
A
VIN = 5 V
(SCT)
V
bb(0) < Vbb(SCT)
Short circuit shutdown threshold at IL(SC)low
42
20
70
22
A
VIN = 5 V
high battery voltages
V
bb(0) > Vbb(SCT)
Supply voltage for reduced short
Vbb(SCT)
Tjt
V
-
circuit shutdown threshold1)
Thermal shut down temperature
150
170
°C
-
1)
Reverse Battery
6.9.5
On-State resistance in case of
RON(rev)
mΩ
IL = -10A,
RIS = 1 kΩ
reverse polarity
Vbb=-8V, Tj=150°C 1)
Vbb=-12V, Tj=150°C
-
-
12
10
20
12
Over-Voltage
6.9.6 Over-voltage protection Sense pin VIS(CL)
1) Not subject to production test, specified by design
5.5
7
-
V
IIS = -2 mA
Datasheet
22
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
7
Diagnostic Functions
For diagnosis purposes, the BTS50060-1EGA provides an Infineon ENHANCED SENSE signal at the pin IS.
7.1
Diagnosis Enable
In ON-State, diagnosis is allways enabled. Providing a low signal at the DEN pin will disable the reporting. In OFF-
state, both, reporting and diagnosis can be disabled by a low signal at DEN pin. The pin IS will be set to tri-state
mode when a low signal is provided at the DEN pin. A high signal at the DEN pin enables the reporting and the
open load and short to battery diagnosis during OFF mode. A falling edge at the DEN resets a preceding latched
output and reporting condition. Please see Figure 20 and Table 1 for details.
Vbb
Vb,IS
VDS
VBB
IIS(fault)
IN
1
1
0
current
DEN
IS
IL/kILIS
sense
reporting enable
IL(OL)
VIS
&
ESD
0
1
protection
IL
open load
diagnosis
OUT
IL>IL( SC )
ϑj>ϑjT
&
≥1
&
S
R
Q
Q
IIS
≥1
&
V
DS<VDS(OL)
open load
@OFF detection
INTELLIGENT LATCH
GND
fault
RIS
GND
Sense.emf
Figure 20 Block Diagram: Diagnosis
Datasheet
23
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
Table 1
Truth Table
Operation Mode
Input (IN)
Level
Output Level
Diagnostic Output (IS)
DEN = H
IIS = IL / kILIS
Z
IIS(fault)
IIS(fault)
IIS<IL/kILIS
Z
DEN = L
Normal Operation (ON)
H
~Vbb
>Vbb
Z
Z
Inverse Operation (-IL
Short Circuit to GND
Over Temperature
Short Circuit to Vbb
Open Load
Protective switch-off resulting from
Short Circuit to GND or Over
Temperature 1)
)
Z
Vbb
~Vbb
Z
X
L
IIS(fault)
Z
Z
Normal Operation (OFF)
Z
>Vbb
Z
Z
Inverse Operation (-IL
Short Circuit to GND
Over Temperature
Short Circuit to Vbb
)
IIS(fault)
IIS(fault)2), Z3)
>Vbb-VDS(OL)
<Vbb-VDS(OL)
IIS(fault)
Z
Open Load
>Vbb-VDS(OL)
<Vbb-VDS(OL)
IIS(fault)
Z
L = Low Level, H = High Level, Z = high impedance, only leakage provided, potential depends on external circuit
1) Output and fault reporting remains latched until falling DEN edge acknowledge.
2) Before fault acknowledgement and latch reset.
3) After fault acknowledgement and latch reset.
7.2
Diagnosis during ON
During normal operation, an enabled IS pin provides a sense current, which is proportional to the load current as
long as Vb,IS>5V and as long as IIS*RIS<VZ,IS. The ratio of the output current is defined as kILIS=IL/IIS. During switch-
on sense current is provided after a sense settling time tsIS(ON). During inverse operation and switch-off no current
is provided.
The output sense current is limited to IIS,lim. Please refer to Figure 21 for details.
Datasheet
24
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
normal operation
VIN
t
t
t
VON
IL2
IL
IL1
IIS(lim )
IIS
IIS2
IIS1
0.9*IIS 1
IIS(LL)
t
0.1*IIS
tsIS (ON )
tsIS (LC)
tsIS (off)
SwitchOn.emf
Figure 21 Timing of Diagnosis Signal in ON-state
The accuracy of the provided current sense ratio (kILIS = IL / IIS) depends on the load current. Please refer to
Figure 22 for details. A typical resistor RIS of 1 kΩ is recommended (see also Chapter 6.7).
ꢍꢀꢀꢀꢀ
ꢇ ꢏꢍꢏꢈ
ꢎꢀꢀꢀꢀ
ꢌꢀꢀꢀꢀ
ꢐ"#
ꢑꢒꢓꢔ
ꢐ$%
ꢉꢀꢀꢀꢀ
ꢀ
ꢀ
ꢂꢀ ꢉꢀ ꢝꢀ ꢌꢀ ꢎꢀ
!
ꢅ ꢍ
1)
Figure 22 Current sense ratio kILIS
The diagnosis signal can be switched off by a low signal at the diagnosis enable pin DEN. See Figure 23 for
details on the timing between the DEN pin and the diagnosis signal IIS. Please note that the diagnosis is disabled,
when no signal is provided at the pin DEN.
1) The curves show the behavior based on characterization data. The marked points are described in this Datasheet in
Section 7.5 (Position 7.5.5).
Datasheet
25
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
IIS
t
tsIS( DEN)
tdIS( DEN)
DEN
t
reset protective latch
sense_enable .emf
Figure 23 Timing of Sense Enable Signal
During fault condition an enabled IS pin provides a defined fault current IIS(fault). Fault conditions are over-current,
over-temperature and short circuit switch-off. Any protective switch-off during on-state causes a latched OFF of
the output and reporting, until being reset by a falling edge at the pin DEN. See Figure 24 for details.
IN
t
DEN
t
Short /
Over Temp
t
VOUT
t
IIS(fault)
IIS
IL/kILIS
t
latch
reset
latch
reset
Figure 24 Fault acknowledge and latch reset
7.3
Diagnosis during OFF
During normal operation a disabled IS pin provides no current.
In case of shorted load to battery, open load or inverse operation an enabled IS pin provides a defined fault current
IIS(fault). See Figure 25 for details.
IN
t
DEN
t
t
IOL
VOUT
IIS
Vbb-VDS(OL)
IIS (fault)
t
t
td(OL)
fault@OFF.emf
Figure 25 Fault reporting
Datasheet
26
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
7.4
Diagnosis Disable
In order to achieve minimum standby current, the IN pin and the DEN pin have to be low level. A possible
preceding fault condition and reporting has to be reset by a falling edge at the pin DEN. See also Chapter 6.4 for
details.
Datasheet
27
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
7.5
Electrical Characteristics: Diagnostic Functions
Note:Characteristics show the deviation of parameters at the given supply voltage and junction temperature.
Typical values show the typical parameters expected from manufacturing.
V
bb = 9 V to 16 V, Tj = -40 °C to +150 °C (unless otherwise specified)
typical values: Vbb = 13.5 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Input characteristics for Diagnosis Enable
7.5.1
7.5.2
7.5.3
7.5.4
L-input level
H-input level
input hysteresis
input pull down resistor
VDEN(L)
VDEN(H)
VDEN(hys)
RDEN
-0.3
2.0
–
-
-
1.0
5.5
-
V
V
mV
–
–
1)
100
50
100
21
200 kΩ
–
Load Current Sense
7.5.5
Current sense ratio, static on-
condition
kILIS
-
-
k
VIN = VDEN = 5 V,
IIS < IIS(lim),
VIS < VZ,IS
,
IL=40A
IL=10A
IL=5A
17
15
12.5
9
21
21
21
21
25.6
27.5
31.5
74
V
b,IS > 5 V
IL=1.5A
VIN = 0 (e.g. during de energizing of
disabled
–
–
inductive loads)
7.5.6
7.5.7
Sense saturation current 1)
IIS(lim)
3.5
3.5
6
10
10
mA
V
V
V
V
V
V
DEN = 5 V,
ON < 400 mV, typ.
b,IS > 5 V
Sense current under fault
conditions
IIS(fault)
6
mA
DEN = 5 V,
b,IS > 5 V,
ON > 400 mV,typ.
or VOFF<VDS(OL)
VIN=VDEN=0V
7.5.8
7.5.9
Current sense leakage current
IIS(LL)
IIS(LH)
–
0.1
0.5
µA
µA
Current sense offset current
Tj = -40 °C, Tj = 25 °C
Tj = 150 °C
VIN=VDEN=5V,
–
–
8
18
30
60
IL ≤ 0A
7.5.10 Current sense leakage, while
IIS(dis)
–
1
2
µA
VIN = 5V,
diagnosis disabled
V
DEN = 0V
7.5.11 Current sense settling time to 90% tsIS(ON)
–
350
700 µs
VIN = 0N5V (switch-
1)
IIS_stat.
on),
V
DEN = 5 V,
RL = 0.5 Ω
7.5.12 Current sense settling time to 10% tsIS(OFF)
–
8
30
µs
VIN = 5P0V (switch-
1)
IIS_stat.
off),
V
DEN = 5V,
RL = 0.5Ω
7.5.13 Current sense settling time to 90% tsIS(LC)
–
–
15
8
50
30
µs
µs
VIN=VDEN=5V,
1)
IIS_stat.
IL = 10N20A
7.5.14 Current sense settling time to 90% tsIS(DEN)
VIN = 5V,
1)
IIS_stat.
OUT=ON,
V
DEN = 0N5V
Datasheet
28
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Diagnostic Functions
V
bb = 9 V to 16 V, Tj = -40 °C to +150 °C (unless otherwise specified)
typical values: Vbb = 13.5 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
7.5.15 Current sense deactivation time to tdIS(DEN)
–
2
20
µs
VIN = 5V,
1)
10% IIS_stat.
VDEN = 5P0V
Open Load at OFF state
7.5.16 Open load output current
IL(OL)
3
5
10
mA
VIN = 0V,
V
V
DEN = 5V,
DS = 2V
7.5.17 Open load detection threshold
voltage
VDS(OL)
2
–
2.8
0.3
3.5
1
V
VIN = 0V,
DEN = 5V
VIN = 5P0 V,
V
7.5.18 Open load blanking after negative td(OL)
ms
input slope1)
VDEN = 5V,
Vbb = 13.5V,
1) Not subject to production test, specified by design
Datasheet
29
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Application schematic
8
Application schematic
Figure 26 shows an example for an application schematic.
Vbat
+5V
47nF
VBB
10K
IN
BTS50060-1EGA
10K
10K
LOAD
µC
DEN
OUT
IS
GND
47nF
1k
application_example.emf
GND
Figure 26 application example
Note:This is a simplified example of an application circuit. The function must be verified in the real application.
8.1
Hints for PCB layout
•
•
•
•
Handling of NC pins: It is recommended to connect all NC pins on a defined potential. E.g. pin 7 and pin 12
could be connected to OUT potential, while pin 5 and 6 could be connected to OUT or DEN.
EMC filter cap between Vbb and GND: It is recommended to place the filter cap as close as possible to the
device to minimize the inductance of the loop.
The resistors connecting µC and IN-pin as well as µC and DEN-pin are recommended to protect the µC inputs
against fast electrical transients.
Ground shift: It is recommended to avoid a ground shift between µC ground and device pin GND of more than
0.3V during normal operation.
8.2
Further Application Information
•
•
•
•
Please contact us to get the Pin FMEA
Please contact us to get a test report on short circuit robustness according to AEC Q100-012
Please contact us for Application Note “Diagnosis with BTS500x0-1EGA”
For further information you may contact http://www.infineon.com/
Datasheet
30
V1.0, 2009-04-06
Smart High-Side Power Switch
BTS50060-1EGA
Package Outlines
9
Package Outlines
ꢀ)
±±.ꢀ
7.5
B
+±.±75
-±.±35
±.25
(±.2)
±.ꢀ
C
±±.ꢀ5
±.7
±±.ꢀ
ꢀ2x
±.ꢀ
7.8
(Heatslug)
±±.3
ꢀ±.3
C
±.25 B
Seating Plane
Bottom View
ꢀ)
±±.ꢀ
6.4
A
7
ꢀ2
ꢀ2
7
ꢀ
6
ꢀ
6
Index Marking
±.4+±.ꢀ3
Heatslug
ꢀ
ꢀ2x
±.25
±±.ꢀ
5.ꢀ
M
C A B
5 x ꢀ = 5
ꢀ) Does not include plastic or metal protrusion of ±.ꢀ5 max. per side
PG-DSO-ꢀ2-4, -5, -8, -ꢀꢀ, -ꢀ2, -ꢀ6-PO V±4
8.ꢀ
±.65 MAX.
ꢀ
PG-DSO-ꢀ2-4, -5, -8, -ꢀꢀ, -ꢀ2, -ꢀ6-FP V±ꢀ
Figure 27 PG-DSO-12-16 (Plastic Dual Small Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Dimensions in mm
V1.0, 2009-04-06
Infineon Internet Page “Products”: http://www.infineon.com/products.
Datasheet
31
Smart High-Side Power Switch
BTS50060-1EGA
Revision History
10
Revision History
BTS50060-1EGA
Revision History: V1.0, 2009-04-06
Version
Date
Changes
Datasheet 2009-04-06
Rev. 1.0
Initial version of datasheet.
Datasheet
32
V1.0, 2009-04-06
Edition 2009-04-06
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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