BTS5200-4EKA [INFINEON]
BTS5200-4EKA 是一款 200 mΩ 智能四通道高边电源开关，嵌入 PG-DSO-14-48 -EP，散热焊盘封装，提供保护功能和诊断。功率晶体管由带电荷泵的 N 通道垂直功率 MOSFET 构成。该设备被集成到 Smart6 技术中。专门设计用于驱动高达 R5W 的灯以及恶劣汽车环境中的 LED。;
| 型号： | BTS5200-4EKA |
| 厂家： | 
Infineon |
| 描述： | BTS5200-4EKA 是一款 200 mΩ 智能四通道高边电源开关，嵌入 PG-DSO-14-48 -EP，散热焊盘封装，提供保护功能和诊断。功率晶体管由带电荷泵的 N 通道垂直功率 MOSFET 构成。该设备被集成到 Smart6 技术中。专门设计用于驱动高达 R5W 的灯以及恶劣汽车环境中的 LED。 开关 驱动 泵 电源开关 晶体管 |
| 文件： | 总49页 (文件大小：2123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PROFET™+ 12V
BTS5200-4EKA
Smart High-Side Power Switch
Quad Channel, 200mΩ
Data Sheet
PROFET™+ 12V
Rev. 1.0, 2014-02-06
Automotive Power
BTS5200-4EKA
Table of Contents
Table of Contents
1
2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
3.2
3.3
4
4.1
4.2
4.3
4.3.1
4.3.2
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PCB set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Thermal Impedence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output ON-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Turn ON/OFF Characteristics with Resistive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Inverse Current Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1
5.2
5.3
5.3.1
5.3.2
5.4
5.5
6
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.5.3
6.6
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Loss of Ground Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Undervoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Temperature Limitation in the Power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Short Circuit Appearance with Channels in Parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Electrical Characteristics for the Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7
7.1
7.2
7.3
Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
IS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SENSE Signal in Different Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SENSE Signal in the Nominal Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SENSE Signal Variation as a Function of Temperature and Load Current . . . . . . . . . . . . . . . . . . . 28
SENSE Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SENSE Signal in Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Open Load in ON Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Open Load in OFF Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Open Load Diagnostic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SENSE Signal in Short Circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
SENSE Signal in Case of Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
SENSE Signal in Case of Inverse Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Electrical Characteristics Diagnostic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
7.3.1
7.3.2
7.3.3
7.3.3.1
7.3.3.2
7.3.3.3
7.3.4
7.3.5
7.3.6
7.4
8
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.1
Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Data Sheet
PROFET™+ 12V
2
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Table of Contents
8.2
8.3
8.4
DEN / DSEL0,1 Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Input Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9
Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Diagnostic Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.1
9.2
9.3
9.4
9.5
10
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
10.1
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
11
12
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Data Sheet
PROFET™+ 12V
3
Rev. 1.0, 2014-02-06
Smart High-Side Power Switch
BTS5200-4EKA
1
Overview
Application
•
•
•
Suitable for resistive, inductive and capacitive loads
Replaces electromechanical relays, fuses and discrete circuits
Most suitable for loads with high inrush current, such as lamps
Basic Features
•
•
•
•
•
•
•
•
•
Quad channel device
Very low stand-by current
PG-DSO-14-48-EP
3.3 V and 5 V compatible logic inputs
Electrostatic discharge protection (ESD)
Optimized electromagnetic compatibility
Logic ground independent from load ground
Very low power DMOS leakage current in OFF state
Green product (RoHS compliant)
AEC qualified
Description
The BTS5200-4EKA is a 200 mΩ quad channel Smart High-Side Power Switch, embedded in a PG-DSO-14-48-
EP, Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by an
N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 technology. It is specially
designed to drive lamps up to R5W, as well as LEDs in the harsh automotive environment.
Table 1
Product Summary
Parameter
Symbol
VS(OP)
VS(LD)
Value
5 V ... 28 V
41 V
Operating voltage range
Maximum supply voltage
Maximum ON state resistance at TJ = 150 °C per channel
Nominal load current (one channel active)
Nominal load current (all channels active)
Typical current sense ratio
RDS(ON)
IL(NOM)1
IL(NOM)2
kILIS
400 mΩ
1 A
0.8 A
300
Minimum current limitation
IL5(SC)
IS(OFF)
5.6 A
Maximum standby current with load at TJ = 25 °C
500 nA
Type
Package
Marking
BTS5200-4EKA
BTS5200-4EKA
PG-DSO-14-48-EP
Data Sheet
PROFET™+ 12V
4
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Overview
Diagnostic Functions
•
•
•
•
•
•
Proportional load current sense multiplexed for the 4 channels
Open load detection in ON and OFF
Short circuit to battery and ground indication
Overtemperature switch off detection
Stable diagnostic signal during short circuit
Enhanced kILIS dependency with temperature and load current
Protection Functions
•
•
•
•
•
•
•
Stable behavior during undervoltage
Reverse polarity protection with external components
Secure load turn-off during logic ground disconnection with external components
Overtemperature protection with restart
Overvoltage protection with external components
Enhanced short circuit operation
Voltage dependent current limitation
Data Sheet
PROFET™+ 12V
5
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Block Diagram
2
Block Diagram
Channel 0
VS
voltage sensor
internal
power
supply
over
temperature
T
clamp for
inductive load
gate control
&
charge pump
IN0
driver
logic
over current
switch limit
DEN
ESD
protection
load current sense and
OUT 0
open load detection
IS
forward voltage drop detection
VS
Channel 1
T
IN1
Control and protection circuit equivalent to channel 0
DSEL0
DSEL1
OUT 1
Channel 2
T
Control and protection circuit equivalent to channel0
IN2
OUT 2
Channel 3
T
Control and protection circuit equivalent to channel0
IN3
OUT 3
GND
Block diagram DxS.vsd
Figure 1
Block Diagram for the BTS5200-4EKA
Data Sheet
PROFET™+ 12V
6
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
OUT0
1
2
3
14
13
12
OUT2
OUT3
IS
OUT1
NC
DSEL1
4
11
GND
DSEL0
IN1
5
6
7
10
9
DEN
IN3
IN0
8
IN2
Pinout quad SO14.vsd
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
OUT0
OUT1
NC
Function
1
OUTput 0; Protected high side power output channel 01)
OUTput 1; Protected high side power output channel 1 1)
Not Connected; No internal connection to the chip
2
3
4
DSEL1
DSEL0
IN1
Diagnostic SELection; Digital signal to select the channel to be diagnosed
Diagnostic SELection; Digital signal to select the channel to be diagnosed
INput channel 1; Input signal for channel 1 activation
INput channel 0; Input signal for channel 0 activation
INput channel 2; Input signal for channel 2 activation
INput channel 3; Input signal for channel 3 activation
Diagnostic ENable; Digital signal to enable/disable the diagnosis of the device
GrouND; Ground connection
5
6
7
IN0
8
IN2
9
IN3
10
DEN
GND
IS
11
12
Sense; Sense current of the selected channel
13
OUT3
OUT2
VS
OUTput 3; Protected high side power output channel 3 1)
OUTput 2; Protected high side power output channel 2 1)
Voltage Supply; Battery voltage
14
Cooling Tab
1) All PCB traces that are connected to the ouput pin have to be designed to withstand the maximum current which can flow.
Data Sheet
PROFET™+ 12V
7
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Pin Configuration
3.3
Voltage and Current Definition
Figure 3 shows all terms used in this data sheet, with associated convention for positive values.
VDS3
VDS0
VDS1
VDS2
I S
VS
VS
IIN0
IN0
IN1
IOUT0
VIN0
OUT0
OUT1
OUT2
OUT3
IIN1
VIN1
IIN2
IOUT 1
IOUT2
IOUT3
IN2
IN3
VIN2
IIN3
VIN3
IDEN
DEN
VDEN
IDSEL0
DSEL0
DSEL1
IDSEL1
I
VDSEL0
VDSEL1
IS
IS
VIS
GND
VOUT0
VOUT 1
VOUT 2
VOUT3
IGND
voltage and current convention.vsd
Figure 3
Voltage and Current Definition
Data Sheet
PROFET™+ 12V
8
Rev. 1.0, 2014-02-06
BTS5200-4EKA
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 2
Absolute Maximum Ratings 1)
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note /
Number
Test Condition
Min.
Max.
Supply Voltages
Supply voltage
VS
-0.3
0
–
–
28
16
V
V
–
P_4.1.1
P_4.1.2
Reverse polarity voltage
-VS(REV)
t < 2 min
TA = 25 °C
RL≥ 25 Ω
R
GND = 150 Ω
2) RECU = 20 mΩ P_4.1.3
Cable= 16 mΩ/m
Cable= 1 μH/m,
Supply voltage for short
circuit protection
VBAT(SC)
0
–
24
V
R
L
l = 0 or 5 m
See Chapter 6
and Figure 28
Supply voltage for Load dump VS(LD)
protection
–
–
–
–
–
41
V
k
3)RI = 2 Ω
RL = 25 Ω
P_4.1.12
P_4.1.4
Short Circuit Capability
4)
Permanent short circuit
IN pin toggles
nRSC1
100
cycles tON = 300ms
Input Pins
Voltage at INPUT pins
VIN
-0.3
–
6
7
V
–
P_4.1.13
t < 2 min
Current through INPUT pins IIN
-2
–
–
2
mA
V
–
P_4.1.14
P_4.1.15
Voltage at DEN pin
VDEN
-0.3
–
6
7
–
t < 2 min
Current through DEN pin
Voltage at DSEL pin
IDEN
-2
–
–
2
mA
V
–
P_4.1.16
P_4.1.17
VDSEL
-0.3
–
6
7
–
t < 2 min
Current through DSEL pin
Sense Pin
IDSEL
-2
–
2
mA
–
P_4.1.18
Voltage at IS pin
Current through IS pin
Power Stage
VIS
IIS
-0.3
-25
–
–
VS
V
–
–
P_4.1.19
P_4.1.20
50
mA
Load current
| IL |
–
–
–
–
IL(LIM)
A
–
P_4.1.21
P_4.1.22
Power dissipation (DC)
PTOT
1.4
W
TA = 85 °C
TJ < 150 °C
Data Sheet
PROFET™+ 12V
9
Rev. 1.0, 2014-02-06
BTS5200-4EKA
General Product Characteristics
Table 2
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter Symbol
Absolute Maximum Ratings (cont’d)1)
Values
Typ.
–
Unit Note /
Test Condition
Number
Min.
Max.
Maximum energy dissipation EAS
–
50
mJ
I
L(0) = 0.5 A
P_4.1.23
Single pulse (one channel)
TJ(0) = 150 °C
VS = 13.5 V
Maximum Energy dissipation EAR
repetitive pulse
–
–
–
20
mJ
1Mio cycles
TA < 105 °C
VS = 13.5 V
P_4.1.25
I
L(0) = 350 mA
Voltage at power transistor
Currents
VDS
–
–
41
V
–
P_4.1.26
P_4.1.27
Current through ground pin
I GND
-10
-150
10
20
mA
–
t < 2 min
Temperatures
Junction temperature
Storage temperature
ESD Susceptibility
ESD susceptibility (all pins)
TJ
-40
-55
–
–
150
150
°C
°C
–
–
P_4.1.28
P_4.1.30
TSTG
VESD
-2
-4
–
–
2
4
kV
kV
5) HBM
5) HBM
P_4.1.31
P_4.1.32
ESD susceptibility OUT Pin VESD
vs. GND and VS connected
ESD susceptibility
VESD
VESD
-500
-750
–
–
500
750
V
V
6) CDM
6) CDM
P_4.1.33
P_4.1.34
ESD susceptibility pin
(corner pins)
1) Not subject to production test. Specified by design.
2) Hardware set-up in accordance to AEC Q100-012 and AEC Q101-006.
3) VS(LD) is setup without the DUT connected to the generator per ISO 7637-1.
4) EOL tests according to AECQ100-012. Threshold limit for short circuit failures: 100 ppm. Please refer to the legal disclaimer
for short-circuit capability at the end of this document.
5) ESD susceptibility HBM according to ANSI/ESDA/JEDEC JS-001
6) “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not
designed for continuous repetitive operation.
Data Sheet
PROFET™+ 12V
10
Rev. 1.0, 2014-02-06
BTS5200-4EKA
General Product Characteristics
4.2
Functional Range
Table 3
Functional Range TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
13.5
–
Unit Note /
Test Condition
Number
Min.
Max.
18
Nominal operating voltage
VNOM
8
5
V
V
–
2)
P_4.2.1
P_4.2.2
Extended operating voltage VS(OP)
28
V = 4.5 V
IN
RL = 25 Ω
V
DS < 0.5 V
1)
Minimum functional supply
voltage
VS(OP)_MIN
3.5
2.6
4.3
3.5
5
V
V
V = 4.5 V
P_4.2.3
P_4.2.4
IN
RL = 25 Ω
From IOUT = 0 A
to VDS < 0.5 V;
1)
Undervoltage shutdown
VS(UV)
4.1
V = 4.5 V
IN
VDEN = 0 V
RL = 25 Ω
From VDS < 1 V;
to IOUT = 0 A
See Chapter 9.1
2)
Undervoltage shutdown
hysteresis
VS(UV)_HYS
IGND_4
–
–
850
4
–
mV
mA
–
P_4.2.13
P_4.2.6
Operating current
All channels active
11
VIN = 5.5 V
V
DEN = 5.5 V
Device in RDS(ON)
VS = 18 V
See Chapter 9.1
Standby current for whole
device with load (ambiente)
IS(OFF)
–
–
–
0.1
0.5
10
–
µA
µA
mA
1) VS = 18 V
P_4.2.7
P_4.2.10
P_4.2.8
V
OUT = 0 V
VIN floating
DEN floating
V
TJ ≤ 85 °C
Maximum standby current for IS(OFF)_150
whole device with load
–
VS = 18 V
V
OUT = 0 V
VIN floating
DEN floating
V
TJ = 150 °C
2) VS = 18 V
Standby current for whole
device with load, diagnostic
active
IS(OFF_DEN)
1.2
V
OUT = 0 V
VIN floating
DEN = 5.5 V
V
1) Test at TJ = -40°C only
2) Not subject to production test. Specified by design.
Note:Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Data Sheet
PROFET™+ 12V
11
Rev. 1.0, 2014-02-06
BTS5200-4EKA
General Product Characteristics
4.3
Thermal Resistance
Table 4
Thermal Resistance
Symbol
Parameter
Values
Typ.
5
Unit Note /
Number
Test Condition
Min.
Max.
1)
Junction to soldering point
RthJS
RthJA
–
–
–
–
K/W
K/W
P_4.3.1
P_4.3.2
1)2)
Junction to ambient
All channels active
40
1) Not subject to production test. Specified by design.
2) Specified Rthja value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (chip +
package) was simulated on a 76.4 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where
applicable, a thermal via array under the exposed pad contacts the first inner copper layer. Please refer to Figure 4.
4.3.1
PCB set up
70µm
35µm
1.5mm
0.3mm
PCB 2s2p.vsd
Figure 4
2s2p PCB Cross Section
Data Sheet
PROFET™+ 12V
12
Rev. 1.0, 2014-02-06
BTS5200-4EKA
General Product Characteristics
4.3.2
Thermal Impedence
Figure 5
Typical Thermal Impedance. 2s2p PCB set up according Figure 4
110
100
90
80
70
1s0p
60
50
40
0
100
200
300
400
500
600
700
Area [mm2]
footprint
Figure 6
Typical Thermal Resistance. PCB set-up 1s0p
Data Sheet
PROFET™+ 12V
13
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Power Stage
5
Power Stage
The power stages are built using an N-channel vertical power MOSFET (DMOS) with charge pump.
5.1
Output ON-state Resistance
The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature TJ. Figure 7
shows the dependencies in terms of temperature and supply voltage for the typical ON-state resistance. The
behavior in reverse polarity is described in Chapter 6.4.
400
350
350
300
300
250
250
200
200
150
150
100
-50
0
50
100
150
0
5
10
15
20
25
30
35
Junction Temperature TJ [°C]
Supply Voltage VS [V]
Figure 7
Typical ON-state Resistance
A high signal at the input pin (see Chapter 8) causes the power DMOS to switch ON with a dedicated slope, which
is optimized in terms of EMC emission.
5.2
Turn ON/OFF Characteristics with Resistive Load
Figure 8 shows the typical timing when switching a resistive load.
IN
VIN_H
VIN_L
t
VOUT
dV/dt ON
dV/dt OFF
tON
90% VS
tOFF_delay
70% VS
30% VS
10% VS
tON_delay
tOFF
t
Switching times.vsd
Figure 8
Switching a Resistive Load Timing
Data Sheet
PROFET™+ 12V
14
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Power Stage
5.3
Inductive Load
5.3.1
Output Clamping
When switching OFF inductive loads with high side switches, the voltage VOUT drops below ground potential,
because the inductance intends to continue driving the current. To prevent the destruction of the device by
avalanche due to high voltages, there is a voltage clamp mechanism ZDS(AZ) implemented that limits negative
output voltage to a certain level (VS - VDS(AZ)). Please refer to Figure 9 and Figure 10 for details. Nevertheless,
the maximum allowed load inductance is limited.
VS
ZDS(AZ)
VDS
INx
LOGIC
IL
VBAT
OUTx
GND
VIN
L, RL
VOUT
ZGND
Output clamp.vsd
Figure 9
Output Clamp
IN
t
VOUT
VS
t
VS-VDS(AZ)
IL
t
Switching an inductance.vsd
Figure 10 Switching an Inductive Load Timing
5.3.2
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the BTS5200-4EKA. This energy can
be calculated with following equation:
VS – VDS(AZ)
--------------------------------
RL
RL × IL
L
RL
⎛
⎞
⎠
------
E = VDS(AZ)
×
×
× ln 1 –
+ IL
(1)
--------------------------------
VS – VDS(AZ)
⎝
Data Sheet
PROFET™+ 12V
15
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Power Stage
Following equation simplifies under the assumption of RL = 0 Ω.
VS
1
2
2
⎛
⎞
⎠
--
E = × L × I × 1 –
(2)
--------------------------------
VS – VDS(AZ)
⎝
The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 11 for the
maximum allowed energy dissipation as a function of the load current.
100
10
1
0
0.5
1
1.5
2
2.5
3
3.5
4
IL(A)
Figure 11 Maximum Energy Dissipation Single Pulse, TJ_START = 150 °C; VS = 13.5V
5.4
Inverse Current Capability
In case of inverse current, meaning a voltage VINV at the OUTput higher than the supply voltage VS, a current IINV
will flow from output to VS pin via the body diode of the power transistor (please refer to Figure 12). The output
stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that particular
case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current IINV should not
be higher than IL(INV). If the channel is OFF, the diagnostic will detect an open load at OFF. If the affected channel
is ON, the diagnostic will detect open load at ON (the overtemperature signal is inhibited). At the appearance of
VINV, a parasitic diagnostic can be observed. After, the diagnosis is valid and reflects the output state. At VINV
vanishing, the diagnosis is valid and reflects the output state. During inverse current, no protection functions are
available.
Data Sheet
PROFET™+ 12V
16
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Power Stage
VBAT
VS
Gate driver
VINV
IL(INV)
Device
logic
INV
Comp.
OUT
GND
IS
ZGND
inverse current.vsd
Figure 12 Inverse Current Circuitry
Data Sheet
PROFET™+ 12V
17
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Power Stage
5.5
Electrical Characteristics Power Stage
Table 5
Electrical Characteristics: Power Stage
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
Unit Note /
Test Condition
Number
Min.
RDS(ON)_150 300
Max.
ON-state resistance per
channel
360
400
mΩ
IL = IL4 = 0.5 A
P_5.5.1
VIN = 4.5 V
TJ = 150 °C
See Figure 7
ON-state resistance per
channel
RDS(ON)_25
IL(NOM)1
–
200
1
–
mΩ
A
1) TJ = 25 °C
P_5.5.21
P_5.5.2
P_5.5.3
Nominal load current
One channel active
–
–
1) TA=85 °C
TJ < 150 °C
Nominal load current
All channels active
IL(NOM)2
–
0.8
10
47
–
A
Output voltage drop limitation VDS(NL)
at small load currents
–
25
53
mV
V
IL = IL0 = 25 mA P_5.5.4
See Chapter 9.3
Drain to source clamping
voltage
VDS(AZ)
41
I
DS = 20 mA
P_5.5.5
P_5.5.6
P_5.5.8
See Figure 10
See Chapter 9.1
VDS(AZ) = [VS - VOUT]
2)
Output leakage current TJ ≤ IL(OFF)
85 °C per channel
–
–
0.1
–
0.5
2.5
μA
μA
A
V floating
IN
VOUT = 0 V
TJ ≤ 85 °C
Output leakage current TJ = IL(OFF)_150
150 °C per channel
VIN floating
VOUT = 0 V
TJ = 150 °C
1) VS< VOUTX
Inverse current capability
IL(NV)
–
0.8
–
P_5.5.9
Slew rate
30% to 70% VS
dV/dtON
0.1
0.25
0.5
V/μs RL = 25 Ω
VS = 13.5 V
P_5.5.11
See Figure 8
Slew rate
70% to 30% VS
-dV/dtOFF
∆dV/dt
0.1
-0.15
30
0.25
0
0.5
V/μs
P_5.5.12
P_5.5.13
P_5.5.14
P_5.5.15
P_5.5.16
P_5.5.17
P_5.5.18
See Chapter 9.1
V/μs
Slew rate matching
dV/dtON - dV/dtOFF
0.15
230
230
50
Turn-ON time to VOUT = 90% tON
VS
90
90
5
μs
μs
μs
μs
μs
Turn-OFF time to VOUT = 10% tOFF
VS
30
Turn-ON / OFF matching
OFF - tON
∆tSW
-50
10
t
Turn-ON time to VOUT = 10% tON_delay
VS
35
35
100
100
Turn-OFF time to VOUT = 90% tOFF_delay
10
VS
Data Sheet
PROFET™+ 12V
18
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Power Stage
Table 5
Electrical Characteristics: Power Stage (cont’d)
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
Unit Note /
Test Condition
Number
Min.
Max.
Switch ON energy
EON
–
210
–
µJ
1) RL = 25 Ω
OUT = 90% VS
P_5.5.19
V
VS = 18 V
See Chapter 9.1
Switch OFF energy
EOFF
–
140
–
µJ
1) RL = 25 Ω
P_5.5.20
VOUT = 10% VS
VS = 18 V
See Chapter 9.1
1) Not subject to production test, specified by design.
2) Test at TJ = -40°C only
Data Sheet
PROFET™+ 12V
19
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Protection Functions
6
Protection Functions
The device provides integrated protection functions. These functions are designed to prevent the destruction of
the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside” normal
operating range. Protection functions are designed for neither continuous nor repetitive operation.
6.1
Loss of Ground Protection
In case of loss of the module ground and the load remains connected to ground, the device protects itself by
automatically turning OFF (when it was previously ON) or remains OFF, regardless of the voltage applied on IN
pins.
In case of loss of device ground, it’s recommended to use input resistors between the microcontroller and the
BTS5200-4EKA to ensure switching OFF of channels.
In case of loss of module or device ground, a current (IOUT(GND)) can flow out of the DMOS. Figure 13 sketches
the situation.
ZGND is recommended to be a diode in parallel to a resistor (1 kΩ).
ZIS(AZ)
VS
ZD(AZ)
VBAT
ZDS(AZ)
IS
RSENSE
DSEL0
RDSEL
DSEL1
RDSEL
DEN
LOGIC
RDEN
INx
RIN
IOUT(GND)
OUTx
ZDESD
GND
RIS
IS
ZGND
Loss of ground protection.vsd
Figure 13 Loss of Ground Protection with External Components
6.2
Undervoltage Protection
Between VS(UV) and VS(OP), the undervoltage mechanism is triggered. VS(OP) represents the minimum voltage
where the switching ON and OFF can takes place. VS(UV) represents the minimum voltage the switch can hold ON.
If the supply voltage is below the undervoltage mechanism VS(UV), the device is OFF (turns OFF). As soon as the
supply voltage is above the undervoltage mechanism VS(OP), then the device can be switched ON. When the switch
is ON, protection functions are operational. Nevertheless, the diagnosis is not guaranteed until VS is in the VNOM
range. Figure 14 sketches the undervoltage mechanism.
Data Sheet
PROFET™+ 12V
20
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Protection Functions
VOUT
undervoltage behavio.rvsd
VS
VS(UV)
VS(OP)
Figure 14 Undervoltage Behavior
6.3
Overvoltage Protection
There is an integrated clamp mechanism for overvoltage protection (ZD(AZ)). To guarantee this mechanism
operates properly in the application, the current in the Zener diode has to be limited by a ground resistor. Figure 15
shows a typical application to withstand overvoltage issues. In case of supply voltage higher than VS(AZ), the power
transistor switches ON and the voltage across the logic section is clamped. As a result, the internal ground
potential rises to VS - VS(AZ). Due to the ESD Zener diodes, the potential at pin INx, DSELx, and DEN rises almost
to that potential, depending on the impedance of the connected circuitry. In the case the device was ON, prior to
overvoltage, the BTS5200-4EKA remains ON. In the case the BTS5200-4EKA was OFF, prior to overvoltage, the
power transistor can be activated. In the case the supply voltage is in above VBAT(SC) and below VDS(AZ), the output
transistor is still operational and follows the input. If at least one channel is in the ON state, parameters are no
longer guaranteed and lifetime is reduced compared to the nominal supply voltage range. This especially impacts
the short circuit robustness, as well as the maximum energy EAS capability. ZGND with a resistor (27 Ω) in series to
the diode will offer better results.
ISOV
ZIS(AZ)
VS
ZD(AZ)
VBAT
ZDS(AZ)
IS
RSENSE
DSEL0
DSEL1
DEN
RDSEL
RDSEL
RDEN
LOGIC
INx
RIN
OUTx
ZDESD
GND
RIS
ZGND
Overvoltage protection.vsd
Figure 15 Overvoltage Protection with External Components
Data Sheet
PROFET™+ 12V
21
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Protection Functions
6.4
Reverse Polarity Protection
In case of reverse polarity, the intrinsic body diodes of the power DMOS causes power dissipation. The current in
this intrinsic body diode is limited by the load itself. Additionally, the current into the ground path and the logic pins
has to be limited to the maximum current described in Chapter 4.1 with an external resistor. Figure 16 shows a
typical application. RGND resistor is used to limit the current in the Zener protection of the device. Resistors RDSEL
,
RDEN, and RIN are used to limit the current in the logic of the device and in the ESD protection stage. RSENSE is used
to limit the current in the sense transistor which behaves as a diode. The recommended value for RDEN = RDSEL
RIN = RSENSE = 4.7 kΩ. ZGND is recommended to be a 1 kΩ resistor in parallel to a diode.
=
During reverse polarity, no protection functions are available.
Micro controller
protection diodes
ZIS(AZ)
VS
ZD(AZ)
ZDS(AZ)
IS
RSENSE
VDS(REV)
DSEL0
DSEL1
RDSEL0
RDSEL1
RDEN
RIN
DEN
INx
LOGIC
-VS(REV)
OUTx
ZDESD
GND
IS
ZGND
RIS
Reverse Polarity.vsd
Figure 16 Reverse Polarity Protection with External Components
6.5
Overload Protection
In case of overload, such as high inrush of cold lamp filament, or short circuit to ground, the BTS5200-4EKA offers
several protection mechanisms.
6.5.1
Current Limitation
At first step, the instantaneous power in the switch is maintained at a safe value by limiting the current to the
maximum current allowed in the switch IL(SC). During this time, the DMOS temperature is increasing, which affects
the current flowing in the DMOS. The current limitation value is VDS dependent. Figure 17 shows the behavior of
the current limitation as a function of the drain to source voltage.
Data Sheet
PROFET™+ 12V
22
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Protection Functions
8
7
6
5
4
3
2
1
0
IL5(SC)
typical
IL28(SC)
2
7
12
17
22
27
Drain Source Voltage VDS (V)
current limitation_200m.vsd
Figure 17 Current Limitation (typical behavior)
6.5.2
Temperature Limitation in the Power DMOS
Each channel incorporates an absolute (TJ(SC)) temperature sensor and a switch OFF timer that is started by an
overcurrent event. The activation of these protection mechanisms will cause an overheated channel to switch OFF
to prevent destruction. A temperature limitation switch OFF latches the output until the temperature has reached
an acceptable value. Figure 18 gives a sketch of the situation.
A retry strategy is implemented such that when the DMOS temperature has cooled down enough, the switch is
switched ON again, if the IN pin signal is still high (restart behavior).
Data Sheet
PROFET™+ 12V
23
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Protection Functions
IN
t
IL
LOAD CURRENT BELOW
LIMITATION PHASE
LOAD CURRENT LIMITATION PHASE
IL(x)SC
IL(NOM)
t
TDMOS
ΔTJ(SW)
TJ(SC)
ΔTJ(SW)
ΔTJ(SW)
TA
tsIS(FAULT)
t
t
ΔTSTEP
tsIS(OT_blank)
IIS
IIS(FAULT)
IL(NOM) / kILIS
0A
tsIS(OFF )
VDEN
0V
t
Hard start.vsd
Figure 18 Overload Protection
Note:For better understanding, the time scale is not linear. The real timing of this drawing is application dependant
and cannot be described.
6.5.3
Short Circuit Appearance with Channels in Parallel
The four channels are not synchronised in the restart event. When the channels are in temperature limitation, the
channel which has cooled down the fastest doesn’t wait for the other to be cooled down as well to restart. Thus,
it is not recommended to use the device with channels in parallel.
Data Sheet
PROFET™+ 12V
24
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Protection Functions
6.6
Electrical Characteristics for the Protection Functions
Table 6
Electrical Characteristics: Protection
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
Unit Note /
Test Condition
Number
Min.
Max.
Loss of Ground
Output leakage current while IOUT(GND)
GND disconnected
–
0.1
–
mA
mV
1)2) VS = 28 V
See Figure 13
P_6.6.1
P_6.6.2
Reverse Polarity
Drain source diode voltage
during reverse polarity
VDS(REV)
200
41
650
700
53
3) IL = - 0.5 A
TJ = 150 °C
See Figure 16
Overvoltage
Overvoltage protection
VS(AZ)
47
V
I
SOV = 5 mA
P_6.6.3
See Figure 15
Overload Condition
4)
Load current limitation
IL5(SC)
5.6
–
7.3
3
9
–
–
A
A
A
V
= 5 V
P_6.6.4
P_6.6.7
P_6.6.12
DS
See Figure 17 and
Chapter 9.3
2) VDS = 28 V
See Figure 17 and
Load current limitation
IL28(SC)
Chapter 9.3
2)
Short circuit average current IL(RMS)
after several minutes of
thermal toggling
–
1
V = 4.5 V
IN
R
L
SHORT = 100 mΩ
SHORT = 5 µH
3) 5) See Figure 18 P_6.6.10
Thermal shutdown
temperature
TJ(SC)
150
–
170
20
200
–
°C
K
Thermal shutdown hysteresis ΔTJ(SC)
2) See Figure 18
P_6.6.11
1) All pins are disconnected except VS and OUT.
2) Not Subject to production test, specified by design
3) Test at TJ = +150°C only
4) Test at TJ = -40°C only
5) Functional test only
Data Sheet
PROFET™+ 12V
25
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
7
Diagnostic Functions
For diagnosis purpose, the BTS5200-4EKA provides a combination of digital and analog signals at pin IS. In case
the diagnostic is disabled via DEN, pin IS becomes high impedance. In case DEN is activated, the sense current
of the channel X is enabled/disabled via associated pins DSEL0 and DSEL1. Table 7 gives the truth table.
Table 7
Diagnostic Truth Table
DEN
DSEL1
DSEL0
IS0
Z
IS1
Z
IS2
Z
IS3
Z
0
1
1
1
1
don’t care
don’t care
0
0
1
1
0
1
0
1
IIS0
0
0
0
0
IIS1
0
0
0
0
IIS2
0
0
0
0
IIS3
7.1
IS Pin
The BTS5200-4EKA provides a sense signal called IIS at pin IS. As long as no “hard” failure mode occurs (short
circuit to GND / current limitation / overtemperature / excessive dynamic temperature increase or open load at
OFF) a proportional signal to the load current (ratio kILIS = IL / IIS) is provided. The complete IS pin and diagnostic
mechanism is described on Figure 19. The accuracy of the sense current depends on temperature and load
current. The sense pin multiplexes the currents IIS(0), IIS(1), IIS(2) and IIS(3) via the pins DSEL0 and DSEL1. Thanks
to this multiplexing, the matching between kILISCHANNEL0, kILISCHANNEL1, kILISCHANNEL2 and kILISCHANNEL3 is optimized.
Due to the ESD protection, in connection to VS, it is not recommended to share the IS pin with other devices if
these devices are using another battery feed. The consequence is that the unsupplied device would be fed via the
IS pin of the supplied device.
VS
IIS 3
=
IIS1
=
IIS0
=
IIS2
=
IIS(FAULT)
IL3 / kILIS
I
L1 / kILIS
I
L0 / kILIS
I
L2 / kILIS
ZIS(AZ)
0
1
0
1
FAULT
1
0
IS
DEN
0
1
FAULT
DSEL1
Sense schematic.vsd
DSEL0
Figure 19 Diagnostic Block Diagram
Data Sheet
PROFET™+ 12V
26
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
7.2
SENSE Signal in Different Operating Modes
Table 8 gives a quick reference for the state of the IS pin during device operation.
Table 8 Sense Signal, Function of Operation Mode
Operation Mode
Normal operation
Short circuit to GND
Overtemperature
Short circuit to VS
Open Load
Input level Channel X
DEN1)
Output Level Diagnostic Output
OFF
H
Z
Z
Z
Z
~ GND
Z
VS
IIS(FAULT)
< VOL(OFF)
> VOL(OFF)
Z
2)
IIS(FAULT)
Inverse current
~ VINV
~ VS
< VS
~ GND
Z
IIS(FAULT)
Normal operation
Current limitation
Short circuit to GND
ON
IIS = IL / kILIS
IIS(FAULT)
IIS(FAULT)
Overtemperature TJ(SW
)
IIS(FAULT)
event
Short circuit to VS
Open Load
VS
IIS < IL / kILIS
IIS < IIS(OL)
3)
~ VS
4)
Inverse current
Underload
~ VINV
IIS < IIS(OL)
5)
~ VS
IS(OL) < IIS < IL / kILIS
Don’t care
Don’t care
L
Don’t care
Z
1) The table doesn’t indicate but it is assumed that the appropriate channel is selected via the DSEL pins.
2) Stable with additional pull-up resistor.
3) The output current has to be smaller than IL(OL)
4) After maximum tINV
5) The output current has to be higher than IL(OL)
.
.
.
7.3
SENSE Signal in the Nominal Current Range
Figure 20 and Figure 21 show the current sense as a function of the load current in the power DMOS. Usually, a
pull-down resistor RIS is connected to the current sense IS pin. This resistor has to be higher than 560 Ω to limit
the power losses in the sense circuitry. A typical value is 1.2 kΩ. The blue curve represents the ideal sense
current, assuming an ideal kILIS factor value. The red curves shows the accuracy the device provides across full
temperature range at a defined current.
Data Sheet
PROFET™+ 12V
27
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
IL
kILIS
3
2.5
2
IIS
=
kILIS4
1.5
1
kILIS3
kILIS2
kILIS1
0.5
min/max Sense Current
typical Sense Current
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
IL [A]
BTS5200-4EKA
Figure 20 Current Sense for Nominal Load
7.3.1
SENSE Signal Variation as a Function of Temperature and Load Current
In some applications a better accuracy is required at smaller currents. To achieve this accuracy requirement, a
calibration on the application is possible. To avoid multiple calibration points at different load and temperature
conditions, the BTS5200-4EKA allows limited derating of the kILIS value, at a given point (IL3; TJ = +25 °C). This
derating is described by the parameter ∆kILIS. Figure 21 shows the behavior of the sense current, assuming one
calibration point at nominal load at +25 °C.
The blue line indicates the ideal kILIS ratio.
The green lines indicate the derating on the parameter across temperature and voltage, assuming one calibration
point at nominal temperature and nominal battery voltage.
The red lines indicate the kILIS accuracy without calibration.
Data Sheet
PROFET™+ 12V
28
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
550
500
450
400
350
300
250
200
150
calibrated kILIS
min/max kILIS
typical kILIS
Calibration Point
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
IL [A]
BTS5200-4EKA
Figure 21 Improved Current Sense Accuracy with One Calibration Point
7.3.2
SENSE Signal Timing
Figure 22 shows the timing during settling and disabling of the SENSE.
VINx
t
ILx
tONx
tOFFx
tONx
90% of
L static
I
t
VDEN
t
IIS
tsIS(LC)
tsIS(chC)
tsIS(OFF)
tsIS(ON)
tsIS(ON_DEN)
90% of
IS static
I
t
t
VDSEL
VINy
t
ILy
tONy
t
current sense settling disabling time .vsd
Figure 22 Current Sense Settling / Disabling Timing
Data Sheet
PROFET™+ 12V
29
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
7.3.3
SENSE Signal in Open Load
Open Load in ON Diagnostic
7.3.3.1
If the channel is ON, a leakage current can still flow through an open load, for example due to humidity. The
parameter IL(OL) gives the threshold of recognition for this leakage current. If the current IL flowing out the power
DMOS is below this value, the device recognizes a failure, if the DEN (and DSEL) is selected. In that case, the
SENSE current is below IIS(OL). Otherwise, the minimum SENSE current is given above parameter IIS(OL)
.
Figure 23 shows the SENSE current behavior in this area. The red curve shows a typical product curve. The blue
curve shows the ideal current sense.
IIS
IIS(OL)
IL
IL(OL)
Sense for OL .vsd
Figure 23 Current Sense Ratio for Low Currents
7.3.3.2
Open Load in OFF Diagnostic
For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For the
calculation of pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) have to be
taken into account. Figure 24 gives a sketch of the situation. Ileakage defines the leakage current in the complete
system, including IL(OFF) (see Chapter 5.5) and external leakages, e.g, due to humidity, corrosion, etc... in the
application.
To reduce the stand-by current of the system, an open load resistor switch SOL is recommended. If the channel x
is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is recognized by
the device as an open load. The voltage threshold is given by VOL(OFF). In that case, the SENSE signal is switched
to the IIS(FAULT)
.
An additional RPD resistor can be used to pull VOUT to 0V. Otherwise, the OUT pin is floating. This resistor can be
used as well for short circuit to battery detection, see Chapter 7.3.4.
Data Sheet
PROFET™+ 12V
30
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
Vbat
SOL
VS
IIS(FAULT)
OL
comp.
OUT
IS
ILOFF
Ileakage
GND
ZGND
VOL(OFF)
Open Load in OFF.vsd
Figure 24 Open Load Detection in OFF Electrical Equivalent Circuit
7.3.3.3
Open Load Diagnostic Timing
Figure 25 shows the timing during either Open Load in ON or OFF condition when the DEN pin is HIGH. Please
note that a delay tsIS(FAULT_OL_OFF) has to be respected after the falling edge of the input, when applying an open
load in OFF diagnosis request, otherwise the diagnosis can be wrong.
Load is present
Open load
VIN
VOUT
t
VS-VOL(OFF)
shutdown with load
RDS(ON) x IL
t
t
IOUT
tsIS(FAULT_OL_OFF)
IIS
tsIS(LC)
90% of IIIS(FAULT) static
t
Error Settling Disabling Time.vsd
Figure 25 Sense Signal in Open Load Timing
Data Sheet
PROFET™+ 12V
31
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
7.3.4
SENSE Signal in Short Circuit to VS
In case of a short circuit between the OUTput-pin and the VS pin, all or portion (depending on the short circuit
impedance) of the load current will flow through the short circuit. As a result, a lower current compared to the
normal operation will flow through the DMOS of the BTS5200-4EKA, which can be recognized at the current sense
signal. The open load at OFF detection circuitry can also be used to distinguish a short circuit to VS. In that case,
an external resistor to ground RSC_VS is required. Figure 26 gives a sketch of the situation.
Vbat
VS
IIS(FAULT)
VBAT
OL
comp.
IS
OUT
VOL(OFF)
GND
IS
ZGND
RIS
RSC_VS
Short circuit to Vs.vsd
Figure 26 Short Circuit to Battery Detection in OFF Electrical Equivalent Circuit
7.3.5
SENSE Signal in Case of Overload
An overload condition is defined by a current flowing out of the DMOS reaching the current limitation and / or the
absolute dynamic temperature swing TJ(SW) is reached, and / or the junction temperature reaches the thermal
shutdown temperature TJ(SC). Please refer to Chapter 6.5 for details.
In that case, the SENSE signal given is by IIS(FAULT) when the diagnostic is selected.
The device has an thermal restart behavior, such that when the overtemperature or the exceed dynamic
temperature condition has disappeared, the DMOS is reactivated if the IN is still at logical level one. If the DEN
pin is activated, and DSEL pin is selected to the correct channel, the IS pin is not toggling with the restart
mechanism and remains to IIS(FAULT)
.
7.3.6
SENSE Signal in Case of Inverse Current
In the case of inverse current, the sense signal of the affected channel will indicate open load in OFF state and
indicate open load in ON state. The unaffected channels indicate normal behavior as long as the IINV current is not
exceeding the maximum value specified in Chapter 5.4.
Data Sheet
PROFET™+ 12V
32
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
7.4
Electrical Characteristics Diagnostic Function
Measurement setup used for kILIS (unless otherwise specified):
All channels are ON at the same time with equal IL.
Table 9
Electrical Characteristics: Diagnostics
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
Unit Note /
Test Condition
Number
Min.
Max.
Load Condition Threshold for Diagnostic
1)
Open load detection
threshold in OFF state
VS - VOL(OFF)
4
–
–
6
V
V = 0 V
DEN = 4.5 V
P_7.5.1
IN
V
See Figure 25
Open load detection
threshold in ON state
IL(OL)
2
9
mA VIN = VDEN = 4.5 V
IIS(OL) = 15 µA
P_7.5.2
See Figure 23
See Chapter 9.4
Sense Pin
1)
IS pin leakage current when IIS_(DIS)
sense is disabled
–
1
–
–
1
3
μA
V = 4.5 V
DEN = 0 V
P_7.5.4
P_7.5.6
IN
V
IL = IL4 = 0.5 A
3)
Sense signal saturation
voltage
VS -
VIS(RANGE)
V
V = 0 V
IN
V
V
OUT = VS > 10 V
DEN = 4.5 V
IIS = 6 mA
See Chapter 9.4
Sense signal maximum
current in fault condition
IIS(FAULT)
6
15
30
mA VIS = VIN = VDSEL = 0 V P_7.5.7
V
V
OUT = VS > 10 V
DEN = 4.5 V
See Figure 19
See Chapter 9.4
Sense pin maximum voltage VIS(AZ)
41
47
53
V
IIS = 5 mA
P_7.5.3
See Figure 19
Current Sense Ratio Signal in the Nominal Area, Stable Load Current Condition
Current sense ratio
L0 = 10 mA
Current sense ratio
L1 = 0.025 A
Current sense ratio
L2 = 0.05 A
Current sense ratio
L3 = 0.1 A
Current sense ratio
kILIS0
kILIS1
kILIS2
kILIS3
kILIS4
-50%
-35%
-22%
-18%
-10%
-8
360
350
340
330
320
0
+50%
+35%
+22%
+18%
+10%
+8
VIN = 4.5 V
VDEN = 4.5 V
See Figure 20
P_7.5.8
I
P_7.5.9
TJ = -40 °C; 150 °C
I
P_7.5.10
P_7.5.11
P_7.5.12
P_7.5.17
I
I
I
L4 = 0.5 A
kILIS derating with current and ∆kILIS
%
3) kILIS4 versus kILIS3
See Figure 21
temperature
Diagnostic Timing in Normal Condition
Data Sheet
PROFET™+ 12V
33
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
Table 9
Electrical Characteristics: Diagnostics (cont’d)
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
–
Unit Note /
Test Condition
Number
Min.
Max.
3)
Current sense settling time to tsIS(ON)
ILIS function stable after
0
250
μs
μs
μs
V
= VIN = 0 to
P_7.5.18
P_7.5.19
P_7.5.20
DEN
k
4.5 V
VS = 13.5 V
RIS = 1.2 kΩ
positive input slope on both
INput and DEN
C
SENSE < 100 pF
IL = IL4 = 0.5 A
1)
Current sense settling time
with load current stable and
transition of the DEN
tsIS(ON_DEN)
0
0
–
–
20
20
V = 4.5 V
IN
V
DEN = 0 to 4.5 V
RIS = 1.2 kΩ
SENSE < 100 pF
C
IL = IL4 = 0.5 A
See Figure 22
1)
Current sense settling time to tsIS(LC)
IIS stable after positive input
slope on current load
V = 4.5 V
IN
V
DEN = 4.5 V
RIS = 1.2 kΩ
SENSE < 100 pF
IL = IL3 = 0.1 A to IL =
L4 = 0.5 A
C
I
See Figure 22
Diagnostic Timing in Open Load Condition
1)
Current sense settling time to tsIS(FAULT_OL_
0
–
100
450
μs
μs
V = 0V
P_7.5.22
P_7.5.23
IN
IIS stable for open load
V
DEN = 0 to 4.5 V
RIS = 1.2 kΩ
SENSE < 100 pF
OUT = VS = 13.5 V
OFF)
detection in OFF state
C
V
See Figure 25
1)
Current sense settling time to tsIS(FAULT_OL_
0
200
V = 4.5V to 0
IN
IIS stable for open load
detection in ON-OFF
transition
V
DEN = 4.5 V
RIS = 1.2 kΩ
SENSE < 100 pF
OUT = VS = 13.5 V
ON_OFF)
C
V
Diagnostic Timing in Overload Condition
1)2)
Current sense settling time to tsIS(FAULT)
IIS stable for overload
detection
0
–
–
250
μs
μs
V = VDEN = 0 to
P_7.5.24
P_7.5.32
IN
4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
V
DS = 5 V
See Figure 18
3)
Current sense over
tsIS(OT_blank)
350
–
V = VDEN = 4.5 V
IN
temperature blanking time
RIS = 1.2 kΩ
C
SENSE < 100 pF
DS = 5 V to 0 V
See Figure 18
V
Data Sheet
PROFET™+ 12V
34
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Diagnostic Functions
Table 9
Electrical Characteristics: Diagnostics (cont’d)
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
–
Unit Note /
Test Condition
Number
Min.
Max.
1)
Diagnostic disable time
DEN transition to
tsIS(OFF)
0
30
μs
V = 4.5 V
P_7.5.25
IN
V
DEN = 4.5 V to 0 V
IIS < 50% IL /kILIS
RIS = 1.2 kΩ
SENSE < 100 pF
C
IL = IL4 = 0.5 A
See Figure 22
Current sense settling time
from one channel to another
tsIS(ChC)
0
–
20
μs
V
V
V
IN0 = VIN1 = 4.5 V
DEN = 4.5 V
DSEL = 0 to 4.5 V
P_7.5.26
RIS = 1.2 kΩ
SENSE < 100 pF
C
I
I
L(OUT0) = IL4 = 0.5 A
L(OUT1) == IL3= 0.1 A
See Figure 22
1) DSEL pin select channel 0 only.
2) Test at TJ = -40°C only
3) Not subject to production test, specified by design
Data Sheet
PROFET™+ 12V
35
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Input Pins
8
Input Pins
8.1
Input Circuitry
The input circuitry is compatible with 3.3 and 5 V microcontrollers. The concept of the input pin is to react to voltage
thresholds. An implemented Schmitt trigger avoids any undefined state if the voltage on the input pin is slowly
increasing or decreasing. The output is either OFF or ON but cannot be in a linear or undefined state. The input
circuitry is compatible with PWM applications. Figure 27 shows the electrical equivalent input circuitry. In case the
pin is not needed, it must be left opened, or must be connected to device ground (and not module ground) via an
input resistor.
IN
GND
Input circuitry .vsd
Figure 27 Input Pin Circuitry
8.2
DEN / DSEL0,1 Pin
The DEN / DSEL0,1 pins enable and disable the diagnostic functionality of the device. The pins have the same
structure as the INput pins, please refer to Figure 27.
8.3
Input Pin Voltage
The IN, DSEL and DEN use a comparator with hysteresis. The switching ON / OFF takes place in a defined region,
set by the thresholds VIN(L) Max. and VIN(H) Min. The exact value where the ON and OFF take place are unknown
and depends on the process, as well as the temperature. To avoid cross talk and parasitic turn ON and OFF, a
hysteresis is implemented. This ensures a certain immunity to noise.
Data Sheet
PROFET™+ 12V
36
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Input Pins
8.4
Electrical Characteristics
Table 10
Electrical Characteristics: Input Pins
VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 13.5 V, TJ = 25 °C
Parameter
Symbol
Values
Typ.
Unit Note /
Test Condition
Number
Min.
Max.
INput Pins Characteristics
Low level input voltage range VIN(L)
High level input voltage range VIN(H)
-0.3
2
–
0.8
6
V
See Chapter 9.5 P_8.4.1
–
V
See Chapter 9.5 P_8.4.2
1)
Input voltage hysteresis
VIN(HYS)
–
250
–
mV
P_8.4.3
See Chapter 9.5
Low level input current
High level input current
IIN(L)
IIN(H)
1
2
10
10
20
25
µA
µA
VIN = 0.8 V
P_8.4.4
P_8.4.5
VIN = 5.5 V
See Chapter 9.5
DEN Pin
Low level input voltage range VDEN(L)
High level input voltage range VDEN(H)
-0.3
2
–
0.8
6
V
–
P_8.4.6
P_8.4.7
P_8.4.8
P_8.4.9
P_8.4.10
–
V
–
1)
Input voltage hysteresis
Low level input current
High level input current
DSEL Pins
VDEN(HYS)
IDEN(L)
–
250
10
10
–
mV
µA
µA
1
20
25
V
DEN = 0.8V
DEN = 5.5 V
IDEN(H)
2
V
Low level input voltage range VDSEL(L)
High level input voltage range VDSEL(H)
-0.3
2
–
0.8
6
V
–
P_8.4.11
P_8.4.12
P_8.4.13
P_8.4.14
P_8.4.15
–
V
–
1)
Input voltage hysteresis
Low level input current
High level input current
VDSEL(HYS)
IDSEL(L)
–
250
10
10
–
mV
µA
µA
1
20
25
V
DSEL = 0.8V
DSEL = 5.5 V
IDSEL(H)
2
V
1) Not subject to production test, specified by design
Data Sheet
PROFET™+ 12V
37
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Characterization Results
9
Characterization Results
The characterization have been performed on 3 lots, with 3 devices each. Characterization have been performed
at 8 V, 13.5 V and 18 V over temperature range. When there is no voltage dependency seen, only a single curve
is sketched.
9.1
General Product Characteristics
P_4.2.3
P_4.2.4
4
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3
4.7
4.65
4.6
4.55
4.5
4.45
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Minimum Functional Supply Voltage
S(OP)_MIN = f(TJ)
Undervoltage Threshold VS(UV) = f(TJ)
V
P_4.2.6
P_4.2.7, P_4.2.10
9
1.8
1.6
1.4
1.2
1
VS=8V
8
7
6
5
4
3
2
VS=13.5 V
VS=18V
VS=8V
VS=13.5 V
VS=18V
0.8
0.6
0.4
0.2
0
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Current Consumption for Whole Device with Load. All Standby Current for Whole Device with Load.
Channels Active IGND_4 = f(TJ;VS)
I
S(OFF) = f(TJ;VS)
Data Sheet
PROFET™+ 12V
38
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Characterization Results
9.2
Power Stage
P_5.5.4
P_5.5.5
46.3
14
13
12
11
10
9
VS=8V
46.2
46.1
46
VS=13.5 V
VS=18V
45.9
45.8
45.7
45.6
45.5
45.4
VS=8V
8
VS=13.5 V
VS=18V
7
6
5
4
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25 50 75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Output Voltage Drop Limitation at Low Load Current
DS(NL) = f(TJ;VS)
Drain to Source Clamp Voltage VDS(AZ) = f(TJ)
V
P_5.5.11
P_5.5.12
0.24
0.35
0.22
0.2
0.3
0.25
0.2
0.18
0.16
0.14
0.12
0.1
VS=8V
0.15
0.1
VS=13.5 V
VS=18V
VS=8V
VS=13.5 V
VS=18V
0.05
0
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Slew Rate at Turn ON
Slew Rate at Turn OFF
dV/dtON = f(TJ;VS), RL = 25 Ω
- dV/dtOFF = f(TJ;VS), RL = 25 Ω
Data Sheet
PROFET™+ 12V
39
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Characterization Results
P_5.5.14
P_5.5.15
180
160
140
120
100
80
130
VS=8V
VS=8V
VS=13.5 V
VS=18V
VS=13.5 V
VS=18V
120
110
100
90
60
40
80
20
70
0
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Turn ON TON = f(TJ;VS), RL = 25 Ω
Turn OFF TOFF = f(TJ;VS), RL = 25 Ω
P_5.5.19
P_5.5.20
300.00
250.00
VS=8V
VS=8V
VS=13.5 V
VS=18V
VS=13.5 V
VS=18V
250.00
200.00
150.00
100.00
50.00
200.00
150.00
100.00
50.00
0.00
0.00
‐50 ‐25
0
25 50 75 100 125 150
‐50 ‐25
0
25 50 75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Switch ON Energy EON = f(TJ;VS), RL = 25 Ω
Switch OFF Energy EOFF = f(TJ;VS), RL = 25 Ω
Data Sheet
PROFET™+ 12V
40
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Characterization Results
9.3
Protection Functions
P_6.6.4
P_6.6.7
5
9
4.5
4
8.5
8
3.5
3
7.5
7
2.5
2
6.5
6
1.5
1
‐50 ‐25
0
25 50 75 100 125 150
‐50 ‐25
0
25 50 75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Overload Condition in the Low Voltage Area
L5(SC) = f(TJ);
Overload Condition in the High Voltage Area
IL28(SC) = f(TJ);
I
Data Sheet
PROFET™+ 12V
41
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Characterization Results
9.4
Diagnostic Mechanism
P_7.5.2
3
2.5
2
7
VS=8V
VS=13.5 V
VS=18V
6.5
6
1.5
1
5.5
5
VS=8V
VS=13.5V
VS=18V
4.5
4
0.5
0
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Current Sense at no Load IIS
= f(TJ), IL = 0
Open Load Detection ON State Threshold IIL(OL)
= f(TJ;VS)
P_7.5.3
P_7.5.7
44.6
44.5
44.4
44.3
44.2
44.1
44
25
VS=8V
VS=13.5 V
VS=18V
20
15
VS=8V
10
5
VS=13.5 V
VS=18V
43.9
43.8
43.7
43.6
43.5
0
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Sense Signal Maximum Voltage (Clamping Voltage)
IS(AZ) = f(TJ)
Sense Signal Maximum Current in Fault Condition
S(FAULT) = f(TJ)
V
I
Data Sheet
PROFET™+ 12V
42
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Characterization Results
9.5
Input Pins
P_8.4.1
P_8.4.2
1.36
1.34
1.32
1.3
1.57
1.56
1.55
1.54
1.53
1.52
1.51
1.5
VS=8V
VS=8V
VS=13.5 V
VS=18V
VS=13.5 V
VS=18V
1.28
1.26
1.24
1.22
1.2
1.49
1.48
1.47
1.18
1.16
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Input Voltage Threshold
VIN(L)= f(TJ;VS)
Input Voltage Threshold
VIN(H)= f(TJ;VS)
V
V
P_8.4.3
P_8.4.5
16
350
14
12
10
8
300
250
200
150
100
50
VS=8V
VS=8V
VS=13.5 V
VS=18V
VS=13.5 V
VS=18V
6
4
2
0
0
‐50 ‐25
0
25
50
75 100 125 150
‐50 ‐25
0
25
50
75 100 125 150
JunctionTemperature[°C]
JunctionTemperature[°C]
Input Voltage Hysteresis
VIN(HYS) = f(TJ;VS)
Input Current High Level
IN(H) = f(TJ)
I
Data Sheet
PROFET™+ 12V
43
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Application Information
10
Application Information
Note:The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
VBAT
Voltage Regulator
OUT
VS
GND
Z
CVS
VDD
VS
RDEN
I/O
DEN
OUT0
OUT1
Relay
I/O
I/O
RDSEL
DSEL0
DSEL1
86
85
30
87
RDSEL
RIN
RIN
RIN
RIN
I/O
I/O
I/O
I/O
IN0
IN1
IN2
IN3
Micro
controller
+
-
OUT2
OUT3
E.C.U.
OT3
OUT4
RSENSE
IS
A/D
GND
R5W
LED
GND
CSENSE
D
Figure 28 Application Diagram with BTS5200-4EKA
Note:This is a very simplified example of an application circuit. The function must be verified in the real application.
Table 11
Bill of Material
Reference Value
Purpose
RIN
10 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Guarantee BTS5200-4EKA channels OFF during loss of ground
RDSEL
RDEN
RPD
10 kΩ
10 kΩ
47 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Protection of the microcontroller during overvoltage, reverse polarity
Polarization of the output for short circuit to VS detection
Improve BTS5200-4EKA immunity to electomagnetic noise
RIS
1.2 kΩ
4.7 kΩ
Sense resistor
RSENSE
Overvoltage, reverse polarity, loss of ground. Value to be tuned with micro
controller specification.
Data Sheet
PROFET™+ 12V
44
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Application Information
Table 11
Bill of Material (cont’d)
Reference Value
Purpose
CSENSE
RLED
RGND
D
100 pF
680 Ω
1 kΩ
Sense signal filtering.
Overvoltage protection of the LED. Value to be tuned with LED specification.
Protection of the BTS5200-4EKA during loss of inductive load
Protection of the BTS5200-4EKA during reverse polarity
Protection of the device during overvoltage
BAS21
Z
36 V Zener
diode
CVS
100 nF
Filtering of voltage spikes at the battery line
Data Sheet
PROFET™+ 12V
45
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Application Information
10.1
Further Application Information
Please contact us to get
•
•
Existing App. Notes
For further information you may visit http://www.infineon.com/profet
Data Sheet
PROFET™+ 12V
46
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Package Outlines
11
Package Outlines
0.35 x 45˚
1)
0.1
3.ꢀ
0.1 C D 2x
8˚ MAX.
8˚ MAX.
0˚...8˚
0.08
Seating Plane
C
C
1.27
0˚...8˚
2)
0.0ꢀ
0.2
0.41
6
M
M
0.2
D
0.2
C A-B D 14x
D
Bottom View
0.1
6.4
A
14
8
1
7
1
7
14
8
B
0.1 C A-B 2x
0.1
8.65
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.13 max.
3) JEDEC reference MS-012 variation BB
GPS01207
Figure 29 PG-DSO-14-48-EP (Plastic Dual Small Outline Package) (RoHS-Compliant)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Data Sheet
PROFET™+ 12V
47
Rev. 1.0, 2014-02-06
BTS5200-4EKA
Revision History
12
Revision History
Revision Date
Changes
1.0
2014-02-06
Creation of the document
Data Sheet
PROFET™+ 12V
48
Rev. 1.0, 2014-02-06
Edition 2014-02-06
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2014 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Legal Disclaimer for short-circuit capability
Infineon disclaims any warranties and liabilities, whether expressed nor implied, for any short-circuit failures below
the threshold limit.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
相关型号：
BTS5215LAUMA1
Buffer/Inverter Based Peripheral Driver, 7.4A, PDSO12, GREEN, PLASTIC, SOP-12
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