BUZ71S2 [INFINEON]
SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated); SIPMOS大功率晶体管(N沟道增强型雪崩额定)型号: | BUZ71S2 |
厂家: | Infineon |
描述: | SIPMOS Power Transistor (N channel Enhancement mode Avalanche-rated) |
文件: | 总9页 (文件大小:133K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BUZ 71 S2
Not for new design
®
SIPMOS Power Transistor
• N channel
• Enhancement mode
• Avalanche-rated
Pin 1
Pin 2
Pin 3
G
D
S
Type
V
I
R
Package
Ordering Code
DS
D
DS(on)
Ω
BUZ 71 S2
60 V
14 A
0.1
TO-220 AB
C67078-S1316-A9
Maximum Ratings
Parameter
Symbol
Values
Unit
Continuous drain current
I
I
I
A
D
T = 28 °C
14
C
Pulsed drain current
Dpuls
T = 25 °C
56
14
1
C
Avalanche current,limited by T
jmax
AR
Avalanche energy,periodic limited by T
Avalanche energy, single pulse
E
mJ
jmax
AR
AS
E
Ω
I = 14 A, V = 25 V, R = 25
D
DD
GS
L = 30.6 µH, T = 25 °C
6
j
±
Gate source voltage
Power dissipation
V
P
20
V
GS
W
tot
T = 25 °C
40
C
Operating temperature
Storage temperature
T
T
-55 ... + 150 °C
-55 ... + 150
j
stg
≤
≤
Thermal resistance, chip case
R
R
3.1
75
K/W
thJC
Thermal resistance, chip to ambient
DIN humidity category, DIN 40 040
IEC climatic category, DIN IEC 68-1
thJA
E
55 / 150 / 56
Semiconductor Group
1
07/96
BUZ 71 S2
Not for new design
Electrical Characteristics, at T = 25°C, unless otherwise specified
j
Parameter
Symbol
Values
Unit
min.
typ.
max.
Static Characteristics
Drain- source breakdown voltage
V
V
V
(BR)DSS
GS(th)
DSS
V
= 0 V, I = 0.25 mA, T = 25 °C
60
-
-
GS
D
j
Gate threshold voltage
I = 1 mA
V
=V
2.1
3
4
GS DS, D
Zero gate voltage drain current
I
I
µA
V
V
= 60 V, V = 0 V, T = 25 °C
-
-
0.1
10
1
DS
DS
GS
j
= 60 V, V = 0 V, T = 125 °C
100
GS
j
Gate-source leakage current
= 20 V, V = 0 V
nA
GSS
V
-
-
10
100
0.1
GS
DS
Ω
Drain-Source on-resistance
= 10 V, I = 9 A
R
DS(on)
V
0.08
GS
D
Semiconductor Group
2
07/96
BUZ 71 S2
Not for new design
Electrical Characteristics, at T = 25°C, unless otherwise specified
j
Parameter
Symbol
Values
Unit
min.
typ.
max.
Dynamic Characteristics
Transconductance
g
S
fs
≥
V
2 I
R I = 9 A
4
-
7.7
450
220
85
-
DS
* D * DS(on)max, D
Input capacitance
= 0 V, V = 25 V, f = 1 MHz
C
C
C
pF
iss
V
600
350
150
GS
DS
Output capacitance
= 0 V, V = 25 V, f = 1 MHz
oss
V
-
GS
DS
Reverse transfer capacitance
= 0 V, V = 25 V, f = 1 MHz
rss
V
-
GS
DS
Turn-on delay time
= 30 V, V = 10 V, I = 3 A
t
t
t
t
ns
d(on)
V
DD
GS
D
Ω
R
= 50
-
-
-
-
20
40
55
40
30
60
70
55
GS
Rise time
= 30 V, V = 10 V, I = 3 A
r
V
DD
GS
D
Ω
= 50
R
GS
Turn-off delay time
= 30 V, V = 10 V, I = 3 A
d(off)
V
DD
GS
D
R
= 50 Ω
GS
Fall time
= 30 V, V = 10 V, I = 3 A
f
V
DD
GS
D
R
= 50 Ω
GS
Semiconductor Group
3
07/96
BUZ 71 S2
Not for new design
Electrical Characteristics, at T = 25°C, unless otherwise specified
j
Parameter
Symbol
Values
Unit
min.
typ.
max.
Reverse Diode
Inverse diode continuous forward current I
A
S
T = 25 °C
-
-
-
-
-
-
14
56
1.8
-
C
Inverse diode direct current,pulsed
I
SM
T = 25 °C
-
C
Inverse diode forward voltage
V
V
SD
V
= 0 V, I = 28 A
1.5
60
0.1
GS
F
Reverse recovery time
t
ns
µC
rr
=
V = 30 V, I l di /dt = 100 A/µs
R
F S,
F
Reverse recovery charge
Q
rr
=
V = 30 V, I l di /dt = 100 A/µs
-
R
F S,
F
Semiconductor Group
4
07/96
BUZ 71 S2
Not for new design
Drain current
Power dissipation
ƒ
I = (T )
ƒ
P
= (T )
D
C
tot
C
≥
parameter: V
10 V
GS
15
A
45
W
35
30
25
20
15
10
5
12
11
10
9
ID
Ptot
8
7
6
5
4
3
2
1
0
0
0
0
20
40
60
80 100 120
°C 160
TC
20
40
60
80 100 120
°C 160
TC
Safe operating area
Transient thermal impedance
ƒ
ƒ
I = (V
)
Z
= (t )
th JC
D
DS
p
parameter: D = 0.01, T = 25°C
parameter: D = t / T
C
p
10 1
10 2
t
= 4.0µs
10 µs
p
I
K/W
A
100 µs
V
ID
ZthJC
10 0
R
10 1
1 ms
10 -1
10 ms
D = 0.50
0.20
0.10
0.05
0.02
0.01
10 0
10 -2
DC
single pulse
10 -1
10 -3
10 0
10 1
V 10 2
10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1s 10 0
VDS
tp
5
07/96
Semiconductor Group
BUZ 71 S2
Not for new design
Typ. output characteristics
ƒ(
Typ. drain-source on-resistance
ƒ(
I =
V
)
R
=
I )
D
D
DS
DS (on)
parameter: t = 80 µs
parameter: V
p
GS
32
0.32
P
tot = 40W
l
a
b
c
d
e
f
g
k
j
i
Ω
A
24
20
16
12
8
V
h
[V]
GS
a
4.0
ID
RDS (on)
0.24
b
c
d
e
f
4.5
5.0
g
e
5.5
0.20
0.16
0.12
0.08
6.0
f
6.5
g
h
i
7.0
7.5
8.0
h
j
9.0
d
b
i
k
l
10.0
20.0
j
k
c
a
V
[V] =
b
GS
a
4
0
0.04
0.00
c
d
e
f
g
h
i
j
k
4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 9.0 10.0 20.0
0.0
1.0
2.0
3.0
4.0
V
6.0
0
4
8
12
16
20
24
A
30
VDS
ID
Typ. transfer characteristics I = f (V
)
Typ. forward transconductance g = f (I )
D
D
GS
fs
parameter: t = 80 µs
parameter: t = 80 µs,
p
p
≥
≥
V
DS
2 x I x R
V
DS
2 x I x R
D
DS(on)max
D
DS(on)max
10
S
8
18
A
ID
gfs
14
12
10
8
7
6
5
4
6
3
4
2
2
0
1
0
0
1
2
3
4
5
6
7
8
V
VGS
10
0
2
4
6
8
10
12
A
ID
16
Semiconductor Group
6
07/96
BUZ 71 S2
Not for new design
Gate threshold voltage
Drain-source on-resistance
ƒ
= (T )
j
V
ƒ
= (T )
j
R
GS (th)
DS (on)
parameter: V = V , I = 1 mA
parameter: I = 9 A, V = 10 V
GS
DS
D
D
GS
0.32
4.6
V
98%
Ω
4.0
VGS(th)
RDS (on)
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.24
0.20
0.16
0.12
0.08
typ
2%
98%
typ
0.04
0.00
0.4
0.0
-60
-20
20
60
100
°C
Tj
160
-60
-20
20
60
100
°C
Tj
160
Typ. capacitances
Forward characteristics of reverse diode
ƒ
C = f (V )
I = (V
)
DS
F
SD
parameter: T , t = 80 µs
parameter:V = 0V, f = 1MHz
j
p
GS
10 1
10 2
nF
A
C
IF
10 0
10 -1
10 -2
10 1
10 0
10 -1
Ciss
Coss
Crss
Tj = 25 °C typ
Tj = 150 °C typ
Tj = 25 °C (98%)
Tj = 150 °C (98%)
0
5
10
15
20
25
30
V
VDS
40
0.0
0.4
0.8
1.2
1.6
2.0
2.4
V
VSD
3.0
7
07/96
Semiconductor Group
BUZ 71 S2
Not for new design
ƒ
Avalanche energy E = (T )
Typ. gate charge
AS
j
ƒ
parameter: I = 14 A, V = 25 V
V
= (Q
)
D
DD
GS
Gate
Ω
R
= 25 , L = 30.6 µH
parameter: I
= 22 A
D puls
GS
6.5
mJ
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
16
V
EAS
VGS
12
V
V
DS max
0,2
0,8
DS max
10
8
6
4
2
0.5
0.0
0
0
20
40
60
80
100
120
°C
Tj
160
4
8
12
16
20
24 nC 30
QGate
Drain-source breakdown voltage
ƒ
= (T )
j
V
(BR)DSS
71
V
68
V(BR)DSS
66
64
62
60
58
56
54
-60
-20
20
60
100
°C
Tj
160
Semiconductor Group
8
07/96
BUZ 71 S2
Not for new design
Package Outlines
TO-220 AB
Dimension in mm
Semiconductor Group
9
07/96
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