CY8CMBR3002-SX1I [INFINEON]
CAPSENSE™ MBR3;
| 型号： | CY8CMBR3002-SX1I |
| 厂家： | 
Infineon |
| 描述： | CAPSENSE™ MBR3 |
| 文件： | 总44页 (文件大小：1002K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Please note that Cypress is an Infineon Technologies Company.
The document following this cover page is marked as “Cypress” document as this is the
company that originally developed the product. Please note that Infineon will continue
to offer the product to new and existing customers as part of the Infineon product
portfolio.
Continuity of document content
The fact that Infineon offers the following product as part of the Infineon product
portfolio does not lead to any changes to this document. Future revisions will occur
when appropriate, and any changes will be set out on the document history page.
Continuity of ordering part numbers
Infineon continues to support existing part numbers. Please continue to use the
ordering part numbers listed in the datasheet for ordering.
www.infineon.com
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
CapSense Express Controllers with SmartSense
Auto-tuning - 16 Buttons, 2 Sliders, Proximity Sensors
CapSense Express Controllers with SmartSense Auto-tuning - 16 Buttons, 2 Sliders, Proximity Sensors
General Description
The CY8CMBR3xxx CapSense® Express™ controllers enable advanced, yet easy-to-implement, capacitive touch sensing user
interface solutions. This register-configurable family, which supports up to 16 capacitive sensing inputs, eliminates time-consuming
firmware development. These controllers are ideal for implementing capacitive buttons, sliders, and proximity sensing solutions with
minimal development-cycle times.
The CY8CMBR3xxx family features an advanced analog sensing channel and the Capacitive Sigma Delta PLUS (CSD PLUS) sensing
algorithm, which delivers a signal-to-noise ratio (SNR) of greater than 100:1 to ensure touch accuracy even in extremely noisy
environments. These controllers are enabled with Cypress’s SmartSense™ Auto-tuning algorithm, which compensates for
manufacturing variations and dynamically monitors and maintains optimal sensor performance in all environmental conditions. In
addition, SmartSense Auto-tuning enables a faster time-to-market by eliminating the time-consuming manual tuning efforts during
development and production ramp-up.
Advanced features, such as LED brightness control, proximity sensing, and system diagnostics, save development time. These
controllers enable robust liquid-tolerant designs by eliminating false touches due to mist, water droplets, or streaming water. The
CY8CMBR3xxx controllers are offered in a variety of small form factor industry-standard packages.
The ecosystem for the CY8CMBR3xxx family includes development tools—software and hardware—to enable rapid user interface
designs. For example, the EZ-Click Customizer tool is a simple graphical user interface software for configuring the device features
through the I2C interface. This tool also supports CapSense data viewing to monitor system performance and support validation and
debugging. Another tool, the Design Toolbox, simplifies circuit board layout by providing design guidelines and layout
recommendations to optimize sensor size, trace lengths, and parasitic capacitance. To quickly evaluate the CY8CMBR3xxx family
features, use the CY3280-MBR3 Evaluation Kit.
❐ Flanking Sensor Suppression (FSS) to eliminate false touch-
es in closely spaced buttons
Features
❐ Analog voltage output
■ Register-configurable CapSense Express controller
❐ Attention line interrupt to the host to indicate any change in
❐ No firmware development required
❐ Patented CSD sensing algorithm
❐ High sensitivity (0.1 pF)
sensor status
■ System diagnostics to detect
• Overlay thickness of up to 15 mm for glass and 5 mm for
plastic
• Proximity solutions
❐ Improper value of the modulating capacitor (CMOD)
❐ Out of range sensor parasitic capacitance (CP)
❐ Sensor shorts
• Sensitivity up to 2 fF per count
■ EZ-Click™ Customizer tool
❐ Simple GUI for device configuration
❐ Data viewing and monitoring for CapSense buttons, sliders,
and proximity sensors
❐ Best-in-class >100:1 SNR performance
• Superior noise-immunity performance against conducted
and radiated noise
• Ultra-low radiated emissions
❐ System diagnostics for rapid debug
❐ SmartSense Auto-tuning
• Sets and maintains optimal sensor performance during
run time
• Eliminates manual tuning during development and produc-
tion
■ I2C slave
❐ Supports up to 400 kHz
❐ Wake-on-hardware address match
❐ No bus-stalling or clock-stretching during transactions
■ Low-power 1.71-V to 5.5-V operation
■ Low-power CapSense
❐ Average current consumption of 22 µAper sensor at 120-ms
refresh interval
❐ Deep Sleep mode with wake-up on interrupt and I2C address
detect
■ Industrial temperature range: –40 °C to +85 °C
❐ Wide parasitic capacitance (CP) range: 5–45 pF
■ Advanced user interface features
■ Package options
❐ Liquid tolerance
❐ 8-pin SOIC (150 mil)
❐ User-configurable LED brightness for visual touch feedback
• Up to eight high-sink current GPOs to drive LEDs
❐ Buzzer signal output for audible touch feedback
❐ 16-pin SOIC (150 mil)
❐ 16-pin QFN (3 × 3 × 0.6 mm)
❐ 24-pin QFN (4 × 4 × 0.6 mm)
Cypress Semiconductor Corporation
Document Number: 001-85330 Rev. *Q
•
198 Champion Court
•
San Jose, CA 95134-1709
•408-943-2600
Revised March 15, 2021
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
1. Getting Started with CapSense – an ideal starting point for all
CapSense users
More Information
Cypress provides a wealth of data at www.cypress.com to help
you to select the right CapSense device for your design, and to
help you to quickly and effectively integrate the device into your
design. For a comprehensive list of resources, see the
knowledge base article KBA92181, Resources Available for
CapSense® Controllers. Following is an abbreviated list for
CapSense devices:
2. CY8CMBR3xxx CapSense Design Guide – provides
complete system design guidelines for CY8CMBR3xxx
You can download these design guides from our website:
www.cypress.com/go/capsense.
Registers TRM
The CY8CMBR3xxx Registers TRM lists and details all the
registers of the CY8CMBR3xxx family of controllers in order of
their addresses. These registers may be accessed through an
I2C interface with the host.
■ Overview: CapSense Portfolio, CapSense Roadmap
■ Product Selectors: Refer to the "CapSense Selector Guide"
chapter in the Getting Started with CapSense design guide.
Software Utility
CY8CMBR3xxx Ecosystem
Cypress provides a complete ecosystem to enable a quick devel-
opment cycle with the CY8CMBR3xxx CapSense controller
family. This ecosystem includes simple tools for device configu-
ration, design validation, and diagnostics.
EZ-Click Customizer Tool
The EZ-Click Customizer Tool is a simple, GUI-based software
utility that can be used to customize the CY8CMBR3xxx device
configurations.
Documentation
Use this GUI-based tool to do the following:
1. Select the appropriate part number based on an end-applica-
tion requirement using the Product Selector
Design Guides
Design guides are an excellent introduction to a variety of
possible CapSense-based designs. They provide an intro-
duction to the solution and complete system design guidelines.
Refer to the following design guides for CY8CMBR3xxx:
2. Configure the device features
3. Observe CapSense data for button and proximity sensors
4. Use the System Diagnostics and built-in test self-test (BIST)
features for debug and production-line testing
Figure 1. Configuring CY8CMBR3xxx using Ez-Click
1
2
3
4
Document Number: 001-85330 Rev. *Q
Page 2 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Online
Tools
In addition to print documentation, there are abundant web
resources. The dedicated web page for the CY8CMBR3xxx
family has all the current information.
Design Toolbox
The Design Toolbox is an interactive spreadsheet tool that
provides application-specific design guidelines for capacitive
buttons. It is used to configure and validate the CapSense
system.
Training
Free PSoC and CapSense technical training (on-demand,
webinars, and workshops) is available online at
www.cypress.com/training. The training covers a wide variety of
topics and supports different skill levels to assist you in your
designs.
The Design Toolbox:
■ Provides general layout guidelines for a CapSense PCB
■ Estimates button dimensions based on end-application
requirements
Technical Support
■ Calculates power consumption based on button dimensions
■ Validates layout design
For assistance with technical issues, search the Knowledge
Base articles and forums at www.cypress.com/support. If you
cannot find an answer to your question, create a technical
support case or call technical support at 1-800-541-4736.
Evaluation Kits
The CY3280-MBR3 Evaluation Kit can be used to quickly
evaluate the various features of the CY8CMBR3xxx solution.
The kit also functions as an Arduino shield, making it compatible
with the variousArduino-based controllers in the market. You can
purchase this kit at the Cypress online store.
Document Number: 001-85330 Rev. *Q
Page 3 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Contents
System Overview ..............................................................5
Features Overview ............................................................6
CapSense Sensors .....................................................6
Sliders .........................................................................6
Proximity Sensors .......................................................6
SmartSense Auto-tuning .............................................6
Liquid Tolerance ..........................................................6
Noise Immunity ............................................................6
Flanking Sensor Suppression (FSS) ...........................6
Touch Feedback ..........................................................6
General-Purpose Outputs (GPOs) ..............................6
Buzzer Drive ................................................................6
Register Configurability ...............................................7
Communication to Host ...............................................7
System Diagnostics .....................................................7
Ultra-Low Power Consumption ....................................7
MPN versus Features Summary .................................8
Pinouts ..............................................................................9
CY8CMBR3116 (16 Sensing Inputs) ...........................9
CY8CMBR3106S
(16 Sensing Inputs; Sliders Supported) ............................11
CY8CMBR3108 (8 Sensing Inputs) ...........................12
CY8CMBR3110 (10 Sensing Inputs) .........................13
CY8CMBR3102 (2 Sensing Inputs) ...........................14
CY8CMBR3002 (2 Sensing Inputs) ...........................14
Unused SPO Pin Connection ....................................15
Unused SPO Pin Connection for AXRES pins ..........15
Unused GPO Pin Connection ....................................15
Device Feature Details ...................................................16
Automatic Threshold .................................................16
Sensitivity Control ......................................................16
Sensor Auto Reset ....................................................16
Noise Immunity ..........................................................17
Flanking Sensor Suppression ...................................17
General-Purpose Outputs .........................................17
LED ON Time ............................................................18
Toggle .......................................................................18
Buzzer Signal Output ................................................18
Host Interrupt .............................................................19
Latch Status Output ...................................................19
Analog Voltage Output ..............................................19
System Diagnostics ...................................................20
Register Configurability .................................................20
Example Application Schematics .................................21
Power Supply Information .............................................23
Electrical Specifications ................................................24
Absolute Maximum Ratings .......................................24
Operating Temperature .............................................24
DC Electrical Characteristics .....................................24
AC Electrical Specifications .......................................25
Memory .....................................................................26
I2C Specifications ......................................................26
System Specifications ...................................................27
Power Consumption and Operational States ..............29
Response Time ...............................................................31
CY8CMBR3xxx Resets ...................................................31
Host Communication Protocol ......................................31
I2C Slave Address .....................................................31
I2C Communication Guidelines .................................32
Write Operation .........................................................32
Setting the Device Data Pointer ................................32
Read Operation .........................................................33
Layout Guidelines and Best Practices .........................34
Ordering Information ......................................................34
Ordering Code Definitions .........................................34
Packaging Dimensions ..................................................35
Thermal Impedances .................................................37
Solder Reflow Specifications .....................................37
Document Conventions .................................................38
Units of Measure .......................................................38
Glossary ..........................................................................39
Reference Documents ....................................................39
Document History Page .................................................40
Sales, Solutions, and Legal Information ......................43
Worldwide Sales and Design Support .......................43
Products ....................................................................43
PSoC® Solutions ......................................................43
Cypress Developer Community .................................43
Technical Support .....................................................43
Document Number: 001-85330 Rev. *Q
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CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
which senses the change in capacitance based on touch or
proximity, and controls the user interface system accordingly.
The sensing algorithm, built in the controllers, determines the
presence of touch and drives the outputs or sends signals to the
host processor. This algorithm can distinguish between the
signal (based on touch or proximity) and noise, which can be
caused by environmental or electrical conditions.
System Overview
Acapacitive sensor detects changes in capacitance to determine
the presence of a touch or proximity to conductive objects. The
capacitive sensor can be a capacitive button that replaces the
traditional mechanical buttons, a capacitive slider that replaces
mechanical knobs, or a proximity sensor that replaces an
infrared sensor in a user interface solution. A typical capacitive
user interface system consists of the following:
Figure 2 shows a typical user interface system with capacitive
buttons connected to a CY8CMBR3xxx CapSense Express
controller, which controls the system and also communicates
with the host processor through I2C.
■ A capacitive sensor
■ An audio-visual output, such as a buzzer or an LED
■ A capacitive sensing controller connected to the sensor
■ A host processor
Traditionally, capacitive sensing controllers require firmware
development to perform specific user interface functions and
manual system tuning to achieve optimal performance.
However, the CY8CMBR3xxx CapSense Express family of
controllers does not require any firmware development, acceler-
ating time-to-market. These devices feature SmartSense
Auto-tuning, which eliminates the need for manual tuning,
providing optimal performance even under extremely noisy
conditions.
The capacitive controller connects the sensor and the output to
the host processor through a communication interface, such as
an I2C or a GPO.
The capacitive user interface system serves as a
human-machine interface that takes the user’s touch inputs and
provides audio-visual feedback through a buzzer or an LED.
CY8CMBR3xxx is a family of capacitive sensing controllers,
Figure 2. Typical CapSense System
CapSense Buttons
Linear Slider
Radial Slider
I2C
HI
Host
Processor
CY8CMBR3xxx
CapSense Controller
Host Interrupt
CapSense Sensors
Buzzer
LEDs
Outputs
Document Number: 001-85330 Rev. *Q
Page 5 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
The CY8CMBR3xxx family offers liquid-tolerance to liquids such
as water, ketchup, oil, and blood.
Features Overview
CapSense Sensors
Enable the shield electrode through the register map, using
EZ-Click, to prevent false touches under wet conditions and
enable both the shield electrode and guard sensor to prevent
false touches in streaming water conditions. The shield electrode
and guard sensor consume a port pin each in the CapSense
controller. Refer to the CY8CMBR3xxx CapSense Design Guide
for best practices and design guidelines for implementing
liquid-tolerant designs.
The CY8CMBR3xxx family of controllers supports up to 16
capacitive sensors. These can be configured as follows:
■ Up to 16 CapSense buttons
■ Up to two sliders: Configurable as linear or radial sliders
■ Up to two proximity sensors that can detect up to 30-cm
proximity distance
Noise Immunity
Sliders
The CY8CMBR3xxx family features the robust CSD PLUS
capacitive sensing algorithm. Additionally, it implements the
advanced noise immunity algorithm, EMC, for stable operation
in extremely noisy conditions.
■ Supports up to two 5-segment sliders
■ Configures each slider individually as linear or radial
■ Combines both sliders to form one 10-segment slider
■ Slider resolution is user-configurable
The EMC algorithm has higher average power consumption. For
low-power applications, where noise conditions are not extreme,
you can disable this feature through the I2C interface.
Proximity Sensors
Flanking Sensor Suppression (FSS)
■ The CY8CMBR3xxx family supports up to two proximity
sensors with a detection range of up to 30 cm. These proximity
sensors are capable of detecting both proximity and touch
events.
This feature distinguishes between signals from closely spaced
buttons, eliminating false touches. It ensures that the system
recognizes only the first button touched.
Touch Feedback
■ The wake-on-approach feature wakes the devices from a
The CY8CMBR3xxx family has pins that you can configure for
audio-visual feedback through a buzzer or an LED.
low-power state to Active mode on a proximity event.
■ The device also features driven shield, which enhances the
proximity sensing range in the presence of metal objects.
General-Purpose Outputs (GPOs)
■ The device supports proximity sensors with CP ranging from
8 pF to 45 pF.
The GPOs are high-sink current outputs that can drive most
LEDs. The GPO status can be controlled directly by the
CapSense sensors so that a sensor 'ON' status automatically
turns ON a corresponding LED. Alternatively, GPOs can be
controlled by the host through the I2C interface.
SmartSense Auto-tuning
The CY8CMBR3xxx family features SmartSense Auto-tuning,
Cypress's patented CapSense algorithm, which continuously
compensates for system and environmental changes during run
time. SmartSense Auto-tuning has the following advantages:
The GPOs also support advanced features, such as:
■ CSx to GPOx Direct Drive: Directly control the GPOs upon
button touch or proximity event.
■ Reduces design effort by eliminating manual tuning
■ Pulse width modulation (PWM): Controls LED brightness.
■ Adapts to variations in PCB, overlay, paint, and manufacturing
that degrade touch-sensing performance
■ Toggle: The GPO status is toggled upon every touch event on
the button sensors, and proximity event on proximity sensors,
to mimic the functionality of the mechanical toggle switch.
■ Eliminates manual tuning in production
■ Adapts to changes in the system environment due to noise
■ Voltage output: Analog voltage that represents the button
status.
■ Allows a platform design approach with different overlays,
button shapes, and trace lengths
Buzzer Drive
The output pins of the CY8CMBR3xxx controllers can be
configured for driving a single-input DC Piezo-electric buzzer
through a PWM. The PWM frequency and buzzer activation
duration are configurable. The buzzer output is activated for a
finite amount of time when a finger touch is detected.
Liquid Tolerance
The CY8CMBR3xxx family delivers water-tolerant designs that
eliminate false touches due to wet conditions, such as water
droplets, moisture, mist, steam, or even wet hands. The
CapSense controller locks up the user interface in firmware to
prevent touch inputs in streaming water.
Document Number: 001-85330 Rev. *Q
Page 6 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
avoid failure of the user interface design. The system diagnostic
features also help to monitor system-level parameters to debug
the design during development.
Register Configurability
The CY8CMBR3xxx registers may be configured through the I2C
interface. Device features may be enabled, disabled, or modified
by writing appropriate values to the I2C configurable register
map. This register map also provides various status outputs to
indicate the touch/release status and system performance and
debug parameters.
The built-in system diagnostics detects the following fault condi-
tions at power-up and helps to monitor the following:
■ Improper value of the modulating capacitor (CMOD
)
You can access the register map of the device through the I2C
interface by a host controller, such as a microcontroller or the
EZ-Click Customizer.
■ CP value out of range
■ Sensor shorts
Ultra-Low Power Consumption
The CY8CMBR3xxx devices feature a safe register map update
mechanism to overcome configuration data corruption, which
can occur due to power failure during flash writes or any other
spurious events. If the configuration data is corrupted during a
register map update, the devices reconfigure themselves to the
last known valid configuration.
For low-power applications, such as those operated by a battery,
select a capacitive sensing controller that has ultra-low average
power consumption.
The CY8CMBR3xxx controllers draw an average current of
22 µA per sensor at 1.8 V.
Communication to Host
The CY8CMBR3xxx family supports two operating modes:
The CY8CMBR3xxx family communicates to a host processor
through the following methods:
■ Active: The sensors are scanned periodically for power
optimization.
■ The I2C interface allows the host to configure parameters and
receive status information on touch events
■ Deep Sleep: The sensors are not scanned until a command
from the host is received to resume sensor scanning.
■ The host interrupt alerts the host when a new touch event
occurs. This helps to build effective communication between
the host and the CapSense controller. Alternatively, the CPU
can poll the device status by reading through I2C.
In theActive mode, CY8CMBR3xxxfamily implements additional
techniques, such as optimizing the average power consumption
and providing a smooth user interface experience without
increasing the refresh interval.
In addition to these modes, the device has a wake-on approach
feature, which uses proximity sensing to reduce the average
power consumption, ensuring power saving when the system is
inactive.
■ The GPO provides the ON or OFF sensor status to the host.
The GPO ports can also be used to implement analog voltage
and DC output (DCO) using an external resistor network.
System Diagnostics
Details of all features are documented in Device Feature Details
on page 16.
The CY8CMBR3xxx devices are equipped with a system
diagnostics feature to detect system-level fault conditions and to
Document Number: 001-85330 Rev. *Q
Page 7 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
MPN versus Features Summary
The CY8CMBR3xxx family consists of six MPNs, each MPN supporting a different feature set. The following table lists all MPNs and
a summary of the features supported by each.
#
Feature
CY8CMBR3116
CY8CMBR3106S CY8CMBR3110 CY8CMBR3108 CY8CMBR3102 CY8CMBR3002
1
Maximum number of
buttons
16
11
10
8
2
2
2
3
4
Maximum number of
sliders
×
2
2
×
×
×
×
Maximum number of
proximity sensors
2
2
2
2
×
×
Shield electrode
✔
✔
✔
✔
✔
5
6
Guard Sensor
✔
✔
×
✔
✔
✔
✔
×
×
×
Wake-on-approach
✔
✔
7
8
Liquid tolerance
✔
×
✔
✔
✔
×
Automatic threshold
✔
✔
✔
✔
✔
✔
Configurable
Configurable
Configurable
Configurable
Configurable
9
Threshold Override
×
✔
✔
✔
×
✔
✔
✔
✔
✔
✔
×
×
10 Sensitivity Control
11 Sensor auto-reset
✔
✔
✔
✔
✔
20s
12 Median & IIR filter
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
13 Advanced-Low-Pass
Filter
×
×
14 Electromagnetic
Compatibility (EMC)
✔
✔
✔
✔
✔
×
15 FSS
✔
✔
✔
✔
✔
×
2
16 Maximum number of
GPOs/LED drive outputs
8
0
5
4
1
17 GPO/LED Sink and
Source Drive Support
✔
×
×
✔
✔
✔
Sink
×
Configurable
Configurable
Configurable
Configurable
18 LED brightness control
✔
✔
✔
✔
19 LED ON time
✔
✔
✔
✔
✔
✔
×
×
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
×
×
×
20 Toggle
21 Buzzer Signal Output
22 Host interrupt
✔
✔
✔
×
×
×
×
23 Latch Status Output
24 Analog Voltage Output
✔
✔
×
✔
25 System diagnostics
26 I2C Interface
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
×
Document Number: 001-85330 Rev. *Q
Page 8 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Pinouts
CY8CMBR3116 (16 Sensing Inputs)
Table 1. Pin Diagram and Definitions - CY8CMBR3116
24-QFN
Pin Diagram
Default
If unused
Pin # Pin Name
Type
Description
Configuration
1
2
3
CS0/PS0
CS1/PS1
–
CapSense button/proximity sensor,
controls GPO0
Ground/Ground
CS0
CS1
CS2
–
–
CapSense button/proximity sensor,
controls GPO1
Ground/Ground
Ground/Ground
CS2/GUARD
CapSense button/guard sensor, controls
GPO2
4
5
CS3
–
–
CapSense button, controls GPO3
Ground
NA
CS3
CS0/PS0
CS1/PS1
CS2/GUARD
CS3
18 CS6
17
1
2
3
4
5
6
CS7
CMOD
External modulator capacitor. Connect
2.2 nF/5 V/X7R or NPO capacitor
CMOD
QFN
(Top View)
16 CS8/GPO0
15 CS9/GPO1
CMOD
VCC
14
CS10/GPO2
6
VCC
Power Internal regulator output. Connect a 0.1-µF NA
decoupling capacitor if VDD > 1.8 V. If VDD
is 1.71 V to 1.89 V, short this pin to VDD.
VCC
13
CS11/GPO3
7
8
9
VDD
VSS
Power Power
Power Ground
NA
NA
VDD
VSS
HI
CS15/SH/HI I/DO CapSense button/shield electrode/Host
Interrupt (SPO1 in the register map)
Refer to Unused
SPOPinConnection
on page 15
Document Number: 001-85330 Rev. *Q
Page 9 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Table 1. Pin Diagram and Definitions - CY8CMBR3116 (continued)
24-QFN
Pin Diagram
Default
If unused
Pin # Pin Name
Type
Description
Configuration
10 CS14/GPO6 I/DO CapSense button/general purpose output Ground/Refer to
GPO6
GPO5
GPO4
GPO3
GPO2
GPO1
GPO0
(GPO)
Unused GPO Pin
Connection on
page 15
11
CS13/GPO5 I/DO CapSense button/GPO
Ground/Refer to
Unused GPO Pin
Connection on
page 15
12 CS12/GPO4 I/DO CapSense button/GPO
13 CS11/GPO3 I/DO CapSense button/GPO
14 CS10/GPO2 I/DO CapSense button/GPO
Ground/Refer to
Unused GPO Pin
Connection on
page 15
Ground/Refer to
Unused GPO Pin
Connection on
page 15
Ground/Refer to
Unused GPO Pin
Connection on
page 15
15
16
CS9/GPO1
CS8/GPO0
CS7
I/DO CapSense button/GPO
I/DO CapSense button/GPO
Ground/Refer to
Unused GPO Pin
Connection on
page 15
Ground/Refer to
Unused GPO Pin
Connection on
page 15
17
18
19
20
21
22
23
–
–
–
–
CapSense button, controls GPO7
CapSense button, controls GPO6
CapSense button, controls GPO5
CapSense button, controls GPO4
Ground
CS7
CS6
[1]
CS6
Connect to VDD
Ground
CS5
CS4
CS5
Ground
CS4
I2C SDA
I2C SCL
DIO I2C data
DIO I2C clock
Pull up
I2C SDA
I2C SCL
GPO7
Pull up
HI/BUZ/
GPO7
DO Host Interrupt/buzzer output/GPO
(SPO0 in the register map)
Refer to Unused
SPOPinConnection
on page 15
24
XRES
XRES Active Low external reset (an active low
pulse on this pin resets the CapSense
Controller)
Leave open
XRES
E-pad
[2]
25 Center Pad
E-pad Connect to VSS for best mechanical,
thermal, and electrical performance
Floating, not
connected to any
other signal
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, DO = Digital Output, CS = CapSense Button, PS = Proximity Sensor
SH = Shield Electrode, BUZ = Buzzer Output, GPO = General Purpose Output, GUARD = Guard Sensor, SPO = Special purpose output.
Notes
1. This I/O functions as reset (AXRES) pin during boot-up. Make certain that this pin is not grounded during power-up for the device to boot up properly. After boot-up,
this I/O functions as indicated by the pin name.
2. The center pad on the QFN package should be connected to ground (VSS) for best mechanical, thermal, and electrical performance. If it is not connected to ground,
it should be left floating without being connected to any other signal.
Document Number: 001-85330 Rev. *Q
Page 10 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
CY8CMBR3106S (16 Sensing Inputs; Sliders Supported)
Table 2. Pin Diagram and Definitions - CY8CMBR3106S
24-QFN
Pin Diagram
Default
If unused
Pin #
Pin Name
Type
Description
Configuration
1
CS0/PS0
–
CapSense button/proximity
sensor
Ground/Ground
CS0
CS1
2
CS1/PS1
–
CapSense button/proximity
sensor
Ground/Ground
3
4
5
CS2
CS3
–
–
–
CapSense button
CapSense button
Ground
Ground
NA
CS2
CS3
CS0/PS0
18 CS15/SLD24
17 CS14/SLD23
16
1
2
3
4
5
6
CS1/PS1
CS2
CS3
CMOD
VCC
CMOD
External modulator capacitor.
Connect 2.2 nF/5 V/X7R or
NPO capacitor
CMOD
CS13/SLD22
QFN
(Top View)
15
14
13
CS12/SLD21
CS11/SLD20
SLD14
6
VCC
Power Internal regulator output.
Connect a 0.1-µF decoupling
capacitor if VDD > 1.8 V. If VDD
is 1.71 V to 1.89 V, short this pin
to VDD.
NA
VCC
7
VDD
VSS
Power Power
Power Ground
NA
VDD
8
NA
VSS
9
SLD10
–
–
–
–
–
–
Slider1, segment0
Slider1, segment1
Slider1, segment2
Slider1, segment3
Slider1, segment4
Ground
Ground
Ground
Ground
Ground
Ground/Ground
SLD10
SLD11
SLD12
SLD13
SLD14
SLD20
10
11
12
13
14
SLD11
SLD12
SLD13
SLD14
CS11/SLD20
CapSense button/Slider2,
segment0
15
16
17
18
19
CS12/SLD21
CS13/SLD22
CS14/SLD23
–
–
–
–
–
CapSense button/Slider2,
segment1
Ground/Ground
Ground/Ground
Ground/Ground
SLD21
SLD22
SLD23
SLD24
CS5
CapSense button/Slider2,
segment2
CapSense button/Slider2,
segment3
[3]
CS15/SLD24
CS5/SH/HI
CapSense button/Slider2,
segment4
Connect to VDD/Connect
to VDD
CapSense button/shield
electrode/host interrupt.
(SPO1 in the register map)
Refer to Unused SPO Pin
Connection on page 15
20
21
22
23
CS4
–
CapSense Button
I2C Data
Ground
Pull up
Pull up
CS4
I2C SDA
I2C SCL
HI
I2C SDA
I2C SCL
HI/BUZ
DIO
DIO
O
I2C Clock
Host interrupt/buzzer output.
This pin acts as SPO0 for this
device (SPO0 in register map).
Refer to Unused SPO Pin
Connection on page 15
24
25
XRES
XRES External reset
Leave open
XRES
E-pad
[4]
Center Pad
E-pad Connect to VSS for best
mechanical, thermal and
electrical performance
Floating, not connected to
any other signal
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, CS = CapSense Button,
PS = Proximity Sensor, SH = Shield Electrode, BUZ = Buzzer Output, SPO = Special Purpose Output.
Notes
3. This I/O functions as reset (AXRES) pin during boot-up. Make certain that this pin is not grounded during power-up for the device to boot up properly. After boot-up,
this I/O functions as indicated by the pin name.
4. The center pad on the QFN package should be connected to ground (VSS) for best mechanical, thermal, and electrical performance. If it is not connected to ground,
it should be left floating without being connected to any other signal.
Document Number: 001-85330 Rev. *Q
Page 11 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
CY8CMBR3108 (8 Sensing Inputs)
Table 3. Pin Diagram and Definitions - CY8CMBR3108
16-QFN
Pin Diagram
Default
If unused
Pin #
Pin Name
Type
Description
Configuration
1
CS0/PS0
–
CapSense button/proximity
sensor, controls GPO0
Ground/Ground
Ground/Ground
CS0
CS1
2
3
CS1/PS1
CMOD
–
–
CapSense button/proximity
sensor, controls GPO1
External modulator capacitor. NA
Connect 2.2 nF/5 V/X7R or
NPO capacitor
CMOD
CS0/PS0
CS1/PS1
1
2
12
11
10
9
CS2/GUARD
CS7/GPO3/SH
CS6/GPO2
QFN
(Top View)
CMOD
VCC
3
4
4
VCC
Power Internal regulator output.
Connect a 0.1-µF decoupling
capacitor if VDD > 1.8 V. If VDD
is 1.71 V to 1.89 V, short this pin
to VDD
NA
VCC
CS5/GPO1
5
6
7
8
VDDIO
VDD
Power Power for I2C and HI lines
Power Power
Connect to VDD
VDDIO
VDD
NA
NA
VSS
Power Ground
VSS
CS4/GPO0
I/DO
I/DO
I/DO
I/DO
CapSense button/GPO
CapSense button/GPO
CapSense button/GPO
Ground/Refer to Unused
GPO Pin Connection on
page 15
GPO0
9
CS5/GPO1
CS6/GPO2
Ground/Refer to Unused
GPO Pin Connection on
page 15
GPO1
GPO2
GPO3
10
11
Ground/Refer to Unused
GPO Pin Connection on
page 15
CS7/GPO3/
SH
CapSense button/GPO/shield Refer to Unused SPO Pin
electrode.
(SPO1 in the register map)
Connection on page 15
[5]
12
13
CS2/GUARD
CS3
–
–
CapSense button, controls
GPO2/guard sensor
Connect to VDD/Connect
to VDD
CS2
CS3
CapSense button, controls
GPO3
Ground
14
15
16
I2C SDA
I2C SCL
HI/BUZ
DIO
DIO
DO
I2C data
I2C clock
Pull up
Pull up
I2C SDA
I2C SCL
HI
Host interrupt/buzzer output
Supply voltage for buzzer and
pull-up resistor on HI should be
equal to VDDIO
Refer to Unused SPO Pin
Connection on page 15
(SPO0 in the register map).
[6]
17
Center Pad
E-pad Connect to VSS for best
mechanical, thermal and
electrical performance
Floating,notconnectedto
any other signal
E-pad
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, DO = Digital Output, CS = CapSense Button, PS = Proximity Sensor
SH = Shield Electrode, BUZ = Buzzer Output, GPO = General Purpose Output, GUARD = Guard Sensor, SPO = Special Purpose Output.
Notes
5. This I/O functions as reset (AXRES) pin during boot-up. Make certain that this pin is not grounded during power-up for the device to boot up properly. After boot-up,
this I/O functions as indicated by the pin name.
6. The center pad on the QFN package should be connected to ground (VSS) for best mechanical, thermal, and electrical performance. If it is not connected to ground,
it should be left floating without being connected to any other signal.
Document Number: 001-85330 Rev. *Q
Page 12 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
CY8CMBR3110 (10 Sensing Inputs)
Table 4. Pin Diagram and Definitions - CY8CMBR3110
16-SOIC
If unused
Pull up
Default
Pin #
Pin Name
Type
Description
I2C data
Pin Diagram
Configuration
1
2
3
I2C SDA
I2C SCL
CS0/PS0
DIO
DIO
–
I2C SDA
I2C SCL
CS0
I2C clock
Pull up
I2C SDA
I2C SCL
CS0/PS0
CS1/PS1
CMOD
VCC
CS4/SH
CS3
1
2
3
4
5
6
7
8
16
15
14
CapSense button/proximity
sensor, controls GPO0
Ground/Ground
CS9/GPO4/HI/BUZ
CS2/GUARD
13
4
5
CS1/PS1
CMOD
–
–
CapSense button/proximity
sensor, controls GPO1
Ground/Ground
CS1
SOIC
CS8/GPO3
CS7/GPO2
12
11
10
9
External modulator capacitor. NA
Connect 2.2 nF/5 V/X7R or
NPO capacitor
CMOD
VDD
CS6/GPO1
CS5/GPO0
VSS
6
VCC
Power Internal regulator output.
Connect a 0.1-µF decoupling
capacitor if VDD > 1.8 V. If
VDD is 1.71 V to 1.89 V, short
this pin to VDD
NA
VCC
7
8
9
VDD
VSS
Power Power
NA
NA
VDD
VSS
Power Ground
CS5/GPO0
I/DO CapSense button/GPO
Ground/Refer to
Unused GPO Pin
Connection on
page 15
GPO0
10
11
12
CS6/GPO1
CS7/GPO2
CS8/GPO3
CS2/GUARD
I/DO CapSense button/GPO
I/DO CapSense button/GPO
I/DO CapSense button/GPO
Ground/Refer to
Unused GPO Pin
Connection on
page 15
GPO1
GPO2
GPO3
Ground/Refer to
Unused GPO Pin
Connection on
page 15
Ground/Refer to
Unused GPO Pin
Connection on
page 15
13
14
–
CapSense button, controls
GPO2/guard sensor
Ground/Ground
CS2
CS9/GPO4/HI/
BUZ[7]
I/DO CapSense button/GPO/host Refer Unused SPO
GPO4
interrupt/buzzer output.
(SPO1 in the register map)
Pin Connection for
AXRES pins on
page 15
15
16
CS3
–
CapSense button, controls
GPO3
Ground
CS3
CS4
CS4/SH
I/O
CapSense button, controls
GPO4/shield electrode
(SPO0 in the register map).
Refer to Unused
SPO Pin
Connection on
page 15
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, DO = Digital Output, CS = CapSense Button, PS = Proximity Sensor
SH = Shield Electrode, BUZ = Buzzer Output, GPO = General Purpose Output, GUARD = Guard Sensor, SPO = Special Purpose Output.
Note
7. This I/O functions as reset (AXRES) pin during boot-up. Make certain that this pin is not grounded during power-up for the device to boot up properly. After boot-up,
this I/O functions as indicated by the pin name.
Document Number: 001-85330 Rev. *Q
Page 13 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
CY8CMBR3102 (2 Sensing Inputs)
Table 5. Pin Diagram and Definitions - CY8CMBR3102
8-SOIC
If unused
Default
Configuration
Pin # Pin Name
Type
Description
Pin Diagram
1
2
I2C SCL
CMOD
DIO
–
I2C clock
Pull up
NA
I2C SCL
CMOD
External modulator capacitor.
Connect 2.2 nF/5 V/X7R or NPO
capacitor
I2C SCL
I2C SDA
,
1
2
3
8
7
6
5
, CMOD
CVCC
CS0/PS0
CS1/PS1/GPO0/SH
3
VCC
Power Internal regulator output. Connect a NA
0.1-µF decoupling capacitor if VDD
> 1.8 V. If VDD is 1.71 V to 1.89 V,
short this pin to VDD.
VCC
SOIC
VDD
VSS
4
4
5
6
VDD
VSS
Power Power
Power Ground
NA
NA
VDD
VSS
CS1/PS1/
GPO0/SH
I/DO/O CapSense button/proximity sensor/ Refer to Unused
GPO/shield electrode (SPO0 in the SPO Pin Connection
GPO0
register map).
on page 15
7
8
CS0/PS0[8]
–
CapSense button/proximity sensor, Connect to VDD/
CS0
controls GPO0
I2C data
Connect to VDD
Pull up
I2C SDA
DIO
I2C SDA
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, DO = Digital Output, CS = CapSense Button, PS = Proximity Sensor,
SH = Shield Electrode, GPO = General Purpose Output, SPO = Special Purpose Output.
CY8CMBR3002 (2 Sensing Inputs)
Table 6. Pin Diagram and Definitions - CY8CMBR3002
8-SOIC
Pin #
Pin Name
Type
Description
If unused
Pin Diagram
1
GPO1
DO
Active-low GPO with
open-drain-low drive mode
Ground
2
3
CMOD
VCC
I/O
External modulator capacitor.
Connect 2.2 nF/5 V/X7R or NPO
capacitor
NA
NA
, GPO1
, CMOD
CVCC
1
2
3
8
GPO0
CS0
CS1
7
SOIC 6
5
Power
Internal regulator output. Connect
a 0.1-µF decoupling capacitor if
VDD > 1.8 V. If VDD is 1.71 V to
1.89 V, short this pin to VDD.
VDD
VSS
4
4
5
6
7
8
VDD
VSS
Power
Power
–
Power
NA
NA
Ground
CS1
CapSense button, controls GPO1
CapSense button, controls GPO0
Ground
CS0[8]
–
Connect to VDD
Ground
GPO0
DO
Active-low GPO with
open-drain-low drive mode
Legend: I = Analog Input, DO = Digital Output, CS = CapSense Button, GPO = General Purpose Output
Note
8. This I/O functions as reset (AXRES) pin during boot-up. Make certain that this pin is not grounded during power-up for the device to boot up properly. After boot-up,
this I/O functions as indicated by the pin name.
Document Number: 001-85330 Rev. *Q
Page 14 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Unused SPO Pin Connection
The following table lists the recommended pin connections for different configurations of SPO pins if an SPO pin is unused. Note that
this table is not applicable to SPO pins which act as AXRES during boot up.
Table 7. Unused SPO Pin Connection
SPO Pin Configuration Recommended pin connection if unused
CS
Connect to Ground
HI
Leave Open
SH
Leave Open
GPO
BUZ
Disabled
Refer to “Unused GPO Pin Connection” Table
Leave Open
Leave Open
Unused SPO Pin Connection for AXRES pins
Unused SPO pins which act asAXRES during boot up should be left open and should be disabled through the I2C configurable register
map (using Ez-Click or any other configuration tool mentioned in section “Configuring CY8CMBR3xxx” of CY8CMBR3xxx CapSense
Design Guide).
Unused GPO Pin Connection
The following table lists the recommended pin connections for different drive modes of GPO pins if a GPO pin is unused. Note that
this table is not applicable to GPO pins which act as AXRES during boot up.
Table 8. Unused GPO Pin Connection
GPO drive mode
Open Drain Low
Strong
Recommended pin connection if unused
Connect to Ground
Leave Open
Document Number: 001-85330 Rev. *Q
Page 15 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Automatic Threshold
Device Feature Details
■ Dynamically sets all threshold parameters for button sensors,
depending on the noise in the environment.
Table 9. Device Feature Benefits
Feature
Benefits
■ Can be enabled or disabled through the register map.
■ Applicable only to button sensors.
Automatic Threshold
Sensitivity Control
Sensor Auto Reset
Automatically tunes all the threshold
parameters of the sensors for
different noise settings
■ Mutually exclusive from the EMC feature. If EMC is enabled,
automatic threshold is automatically disabled.
Maintains optimal button
performance for different overlay
and noise conditions
■ Allowsoverridingofcalculatedthresholdswithparticularvalues
specifiedthroughtheregistermap.RefertotheCY8CMBR3xxx
CapSense Design Guide for more details.
Recalibrates the sensor when a
stuck-sensor (fault) condition
occurs, and avoids invalid sensor
output status to host
Sensitivity Control
This feature allows specification of the minimum change in
sensor capacitance that can trigger a sensor state change (OFF
to ON or vice-versa).
Noise Immunity
Provides immunity against external
noise and the ability to detect
touches without false trigger in noisy
environments
■ Sensitivity can be specified individually for each CapSense
button and slider.
■ Sensitivity can be specified as one of the four available values:
0.1 pF, 0.2 pF, 0.3 pF, and 0.4 pF.
Flanking Sensor
Suppression (FSS)
Avoids multiple button triggers in a
design with closely spaced buttons
GPO pins, which can be controlled
by the host processor through I2C
■ Higher sensitivity values can be used for thick overlays or small
button diameters.
Host Controlled GPOs
■ Lower sensitivity values should be used for large buttons or
thin overlays to minimize power consumption.
LED On time
GPO output status stays ON for a
set duration after the touch is
released to provide better visual
feedback to the user
Sensor Auto Reset
This feature resets the CapSense sensors to the OFF state after
a specific time period, even though they continue to be activated.
Toggle
Sensor output status toggles on
every sensor activation to mimic the
mechanical toggle button
functionality
■ Resets the sensor baseline to the current raw count after a
specific time period, even though the sensors continue to be
activated.
■ Prevents a stuck sensor when a metal object is placed close
to that sensor.
Buzzer Signal Output
Provides audio feedback on button
touch
■ The Auto Reset period can be set to 5 or 20 seconds and can
be configured through two global settings provided in the
register map:
Host Interrupt
Provides interrupt to host when
there is a change in sensor status
❐ Global setting for all proximity sensors
❐ Global setting for all CapSense buttons and slider segments
Latch Status Output
Latches the sensor status changes
in the register until the host reads
the activated sensor status; this
ensures that the sensor status is
always read by the host even if the
host is late to service the host
■ The guard sensor does not undergo Auto Reset.
Figure 3. Example of ButtonAuto Reset on GPO0 (DCActive
Low Output)
Sensor
Activated
interrupt signal from CY8CMBR3xxx
Analog Voltage Output Indicates the button status through
voltage levels
Auto Reset Period
System Diagnostics
Supports production testing and
debugging
Touch on Sensor
CSx
GPOx
Low-Power Sleep Mode Reduces power consumption
and Deep Sleep Mode
GPOx turns inactive as Auto
Reset period expired for CSx
Document Number: 001-85330 Rev. *Q
Page 16 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Noise Immunity
General-Purpose Outputs
■ The CY8CMBR3xxx family features the robust CSD PLUS
capacitive sensing algorithm.
■ Supports up to eight GPOs, multiplexed with sensor inputs or
other functionality, depending on the part number.
■ Uses pseudo-random sequence (PRS) clock source to
minimize electromagnetic interference.
■ Provides GPO status control. GPOs can be configured to be
controlled by the sensor input or the host through the I2C
interface.
■ Provides advanced noise immunity algorithm, that is, electro-
magnetic compatibility (EMC), for superior noise immunity
against external radiated and conducted noise
❐ EMC algorithm has higher average power consumption. For
low-power applications, where noise conditions are not ex-
treme, this feature can be disabled using the EZ-Click tool.
■ AllowsforconfigurableActiveLOWorActiveHIGHlogicoutput.
TheActive LOW logic output can be configured to directly drive
LEDs in the current sink mode. The Active HIGH logic output
can be configured tointerface theGPOs with the hostand other
circuits.
■ Provides median and IIR filters for button and slider sensors.
■ The GPOx status will not be retained in the Deep Sleep mode.
TheGPOxoutputstatewillberesettodefaultduringdeepsleep
and upon wake-up from deep sleep.
■ Provides an Advanced-Low-Pass (ALP) filter for proximity
sensors.
Figure 5. CSx Controls GPOx (Active HIGH Logic)
Flanking Sensor Suppression
Sensor
Deactivated
■ Distinguishes between signals from closely spaced buttons,
eliminating false touches.
Sensor
Activated
■ Can be enabled or disabled individually on each CapSense
button.
■ On touch detection by two or more sensors on which FSS is
enabled, only the first touched sensor reports active status.
CSx
■ Allows only one button at a time to be in the Touch state.
■ Supported only on CapSense buttons.
GPOx
Figure 4. Reported Sensor Status with FSS Enabled
■ Supports two drive modes:
❐ Open-drain drive mode (HIGH-Z and GND) for analog volt-
age outputs and LED direct drive
CS0
CS1
CS2
CS3
No sensor touched
❐ Strong drive mode (VDD and GND) to interface with the host
and other circuits
■ Supports PWM on GPOs for LED brightness control. Two
different duty cycles can be configured for Sensor Touch and
No Touch states (Active and Inactive state duty cycles). When
the GPO is host-controlled, and if the PWM control is enabled
for the GPO, the same Touch and No Touch duty cycles will be
used for the On and Off states of the host-controlled GPO.
CS1 is touched, CS1 reported ON
CS0
CS1
CS2
CS3
■ When the proximity sensor is enabled, the proximity event
controls the respective GPOs. A touch event on a proximity
sensor is indicated only through the I2C register map.
CS2 also touched along with CS1,
CS1 is reported ON
CS0
CS1
CS2
CS3
■ Sensor fault conditions are indicated with the pulse signal on
the respective GPOs at power-up by system diagnostics.
Only CS2 is touched; reported ON
CS0
CS1
CS2
CS3
Document Number: 001-85330 Rev. *Q
Page 17 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
LED ON Time
Buzzer Signal Output
■ Keeps the GPO status ON for a particular period of time after
the falling edge of a sensor, for better visual indication through
LEDs
■ Produces a PWM signal to drive a Piezo-Buzzer that generates
audiofeedbackwhenatouchisdetectedonaCapSensebutton
or a guard sensor.
Figure 6. CSx Controls GPOx with LED ON Time Enabled
■ Supports buzzer connection, as shown in the following figure.
Figure 8. Buzzer Connection[9]
Sensor
Deactivated
Sensor
Activated
VDDIO
CSx physical
status
Buzzer
BUTTON_STAT
register shows
sensor inactivation
CSx bit in
BUTTON_STAT
CY8CMBR3xxx
BUZ
GPOx
LED ON Time
Button response time
■ Can be enabled only when the GPO is directly controlled by a
CapSense sensor
■ PWM frequency is configurable: The buzzer frequency is
configurabletomeetdifferentPiezo-Buzzerdriverequirements
and to provide different tones. The buzzer frequency may be
configured either by using the EZ-Click tool or by writing to the
corresponding control register. Refer to System Specifications
on page 27 for the supported buzzer frequencies.
■ Can be enabled or disabled on each sensor and the ON Time
duration can be configured from 0 to 2 seconds in 20-ms incre-
ments
■ Can beenabled inall configurations of GPOs except theToggle
mode
■ Generates PWM output for a fixed duration (ON time) when a
touch is detected. The ON time is configurable through
EZ-Click, from 100 ms to 12.7 s, in steps of 100 ms,
■ Not applicable when the sensor status is turned off by Sensor
Auto Reset
Toggle
■ Buzzer signal output and EMC (refer to the CY8CMBR3xxx
Registers TRM) are mutually exclusive features. These must
not be enabled simultaneously.
■ The controller can toggle the GPO state at every rising edge
of a sensor activation event to mimic the functionality of a
mechanical toggle switch (a touch event for a button sensor
and a proximity event for proximity sensors activates a sensor).
Figure 9. Buzzer Activation on a Touch Event
Sensor
Activated
Figure 7. CSx Controls GPOx with the Toggle Enabled
Sensor
Activated
Sensor
Deactivated
Sensor
Activated
CSx Active
CSx
CSx
GPOx
BUZ
Buzzer ON Time
■ Can be enabled only when the GPO is directly controlled by a
capacitive sensor.
■ Can be enabled or disabled individually on each capacitive
sensor.
The buzzer output does not restart if multiple trigger events occur
before the Buzzer ON Time elapses.
■ Can be enabled in all configurations of GPOs—that is, Active
LOW and Active HIGH DC output, PWM output, open-drain,
and strong drive modes.
Note
9. Buzzer must be connected between V
and the BUZ pin. If V
is not available on the device, connect the buzzer to V instead of V
.
DDIO
DDIO
DDIO
DD
Document Number: 001-85330 Rev. *Q
Page 18 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Figure 10. Buzzer Operation with Consecutive Touches
Latch Status Output
Sensor
Activated
Sensor
Re‐activated
■ Allows to read both current status (CS) and latch status (LS)
to avoid missing button touches.
■ CS and LS can be read through registers, BUTTON_STAT, and
LATCHED_BUTTON_STAT respectively.
CSx
Table 10 explains the various combinations of CS and LS.
Table 10. Latch Status Read
BUZ
CS LS
Description
Buzzer ON Time
0
0
1
CSx is not touched during the current I2C read
Host has already acknowledged any previous CSx touch in
the previous I2C read
CSx was touched before the current I2C read
This CSx touch was missed by the host
If the buzzer is not currently active, the buzzer output starts on
each trigger event.
0
■ Whenthebuzzerisenabled,thebuzzeroutputtogglesbetween
a Logic HIGH state and a Logic LOW state, to drive the buzzer
when active. When the buzzer is inactive, the buzzer output
maintains a Logic HIGH state.
Analog Voltage Output
Some of the applications use analog voltage as an effective
method to indicate the sensor status to the host controller. A
simple external resistor network can be used with GPOs of
CY8CMBR3xxx to generate analog voltage output upon touch
detection for such applications.
■ The buzzer ON Time has a range of (1 to 127) × 100 ms.
Host Interrupt
The CY8CMBR3xxx GPOs support the open-drain low-drive
mode. In this mode, the sensor “touch” state is indicated by a
logic LOW signal on the GPO and a "no touch" state is indicated
by the HIGH-Z signal. With the external resistor shown in Figure
12, when a sensor is touched, the respective GPO is driven to a
logic LOW signal. This forms a simple voltage divider and
produces a voltage output. All the other GPOs are in HIGH-Z
states because their respective sensors are in the "no touch"
state.
This feature generates a pulse signal on any change in the
CapSense sensors' status.
■ The host interrupt is an active LOW pulse signal generated on
the HI pin during any change in the sensor status or slider
position.
■ The duration of the active LOW host interrupt pulse is THI (refer
to System Specifications on page 27).
■ The minimum time between two HI pulses is equal to one
refresh interval.
Figure 12. Voltage Output Using GPO and Resistor Network
Figure 11. Host Interrupt Line with CSx Buttons Touched
Separately
R0
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS0
CS2
CS4
CS6
GPO0
GPO1
R1
R2
CS1
CS3
CS5
CS7
Sensor
Activated
Sensor
Deactivated
R
GPO2
GPO3
GPO4
VOUT
R3
R4
R5
GPO5
CSx
HI
R6
R7
GPO6
GPO7
The output analog voltage can be calculated based on the
following equation:
THI
■ The host interrupt pin has the open-drain low-drive mode.
■ This pin is powered by VDDIO in CY8CMBR3108. This allows
communication with a host processor at voltage levels lower
Here, Rn represents the series resistor value of any given GPO.
than the chip VDD
.
Note If more than one button is activated at the same time, the
Rn becomes equivalent (parallel) to all Rn resistors.
■ Only one pin can be configured as the host interrupt on devices
that have a host interrupt functionality on multiple pins.
Document Number: 001-85330 Rev. *Q
Page 19 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
■ For the circuit represented in Figure 12 to work, GPOs should
be configured in the Active LOW logic, open-drain drive mode.
PWM must be disabled and the CSx-to-GPOx direct drive must
be enabled (that is, GPOs must be configured as
sensor-controlled).
Register Configurability
The CY8CMBR3xxx family features an I2C configurable register
map. The CY8CMBR3xxx registers are divided into three
categories, as Table 11 shows.
■ The FSS feature can be enabled so only one button is reported
Table 11. CY8CMBR3xxx Registers
ON at a time.
Register
Register
Category
Map
Address
range
System Diagnostics
Description
System Diagnostics is a BIST feature that tests for faulty sensor,
shield, or CMOD conditions at device resets.
Configu-
ration
Registers
0x00-0x7E These registers contain the config-
uration data for the CY8CMBR3xxx
controllers. A host can write into
these registers and save the data to
non-volatile memory by writing to
CTRL_CMD command register.
Note that the new configuration
takes effect only after the configu-
ration is saved to non-volatile
memoryandthedeviceisreset (see
CY8CMBR3xxx Resets on
■ If any sensor fails these tests, a 50-ms pulse is sent out on the
corresponding GPO (that is, the pulse is observed on GPOx if
CSx fails the test), and the sensor is disabled.
■ If theshieldfailsthetests, a50-ms pulseissentoutonallGPOs
and all the sensors are disabled.
■ If CMOD fails the tests, a 50-ms pulse is sent out on all GPOs
and all the sensors are disabled.
■ System Diagnostics failure pulses are sent within device
boot-up time.
page 31).
Command 0x80-0x87 These registers accept commands
■ The System Diagnostics status is also updated in the register
map. Therefore, the host can also read test results through the
I2C interface.
Registers
from host. Any command written to
these register is executed within
T
I2C_LATENCY_ MAX from the I2C
Sensor CP > 45 pF
acknowledgement of the command.
If the parasitic capacitance of a sensor is more than 45 pF, the
sensor is disabled.
Status
Registers
0x88-0xFB These are read only registers and
indicate the status of command
execution, system diagnostics and
sensor data.
Improper value of CMOD
If the value of CMOD is less than 1 nF or greater than 4 nF, all
sensors are disabled (the recommended value of CMOD is
2.2 nF).
The CY8CMBR3xxx devices feature a safe register map update
mechanism to overcome configuration data corruption, which
can occur due to power failure during execution of "Save"
command or any other spurious events.
Sensor shorts
System Diagnostics also checks for the following errors:
If the configuration data is corrupted when the device is saving
data, on the next reset, the devices reconfigure themselves to
the last known valid configuration. If there is no valid configu-
ration saved by user, the devices load the factory default config-
uration as specified in Register TRM.
[10]
■ Sensor shorted to Vss
■ Sensor shorted to VDD
■ Sensor shorted to another sensor
■ Sensor shorted to shield
Note
10. Sensor shorts to Vss are detected for all pins other than the pin, which is AXRES also for a given package.
Document Number: 001-85330 Rev. *Q
Page 20 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Example Application Schematics
Figure 13. Example Schematics Demonstrating Four Buttons and Four GPOs
CS3
VDDIO
VDD
C5
1uF
C4
J1
VDD
1
C2
C6
0.1uF
1uF
0.1uF
2
3
I2C_SCL
I2C_SDA
4
5
I2C HEADER
U1
1
2
3
4
12
11
10
9
560E
560E
R3
R5
R4
560E
1K
CS0
CS1
CS2
CS0/PS0
CS1/PS1
CMOD
VCC
CS2/GUARD
VDD
D4
D1
D2
R9
R6
R7
CS7/GPO3/SH
CS6/GPO2
CMOD
VCC
C1
1K
1K
CS5/GPO1
C3
2.2nF
0.1uF
CY8CMBR3108(16-QFN)
VDDIO
D3
VDD
R8
1K
VDD
In Figure 13[11, 12], the CY8CMBR3108 device is configured in
the following manner:
■ VDD pin: To external supply voltage
❐ 1-µF and 0.1-µF decoupling capacitors connected to VDD
■ CS0–CS3: CapSense buttons
❐ All CapSense pins must have a 560-ohm series resistance
(placed close to the chip) for improved noise immunity.
■ VDDIO pin: To supply voltage, which is VDD
❐ VDDIO powers I2C and HI lines.
❐ 1-µF and 0.1-µF decoupling capacitors connected to VDDIO.
■ I2C_SCL and I2C_SDA pins: 330 ohms to the I2C header
■ GPO0–GPO3: To external LEDs
❐ LEDs are connected in sinking mode because the
CY8MBR3xxx devices have high sink current capability.
❐ Series resistances are connected to limit the GPO current to
be with IIL limits.
❐ For I2C communication: It is assumed that the I2C line pull-up
resistors are present on the host side outside the I2C header.
■ HI pin: To host
❐ To prompt the host to initiate an I2C transaction for reading
■ CMOD pin: 2.2 nF to ground
■ VCC pin: 0.1 µF to ground
the changed sensor status.
Notes
11. VCC should be connected to VDD for 1.71 V VDD 1.89 V.
12. Proper ground layout is important for better SNR performance. Refer to the CY8CMBR3xxx CapSense Design Guide and Getting started with CapSense guide for
all layout guidelines.
Document Number: 001-85330 Rev. *Q
Page 21 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Figure 14. Example Schematics Demonstrating Multiple Sensor Types
BUZZER
J1
VDD
1
2
3
4
5
CSS1
VDD
VDD
SLD10
SLD11
SLD12
SLD13
SLD14
I2C_SCL
I2C_SDA
C1
C4
I2C HEADER
1uF
0.1uF
U1
CapSense Linear Slider 5 Seg
PSO
1
2
3
4
5
6
18
17
16
15
14
13
SLD24
560E
560E
560E
560E
R4
R6
R5
560E
CS0/PS0
CS6/SLD24
CS7/SLD23
CS8/SLD22
CS9/SLD21
CS10/SLD20
SLD14
R7
560E
560E
560E
560E
560E
SLD23
SLD22
SLD21
SLD20
SLD14
CS1
CS1/PS1
CS2
R8
R9
CS2
CS3
R10
CMOD
VCC
R11
R12
R13
CS3
CMOD
VCC
SLD20
SLD21
C2
2.2nF
C3
0.1uF
CY8CMBR3106S(24-QFN)
VDD
SLD22
SLD23
SLD24
CapSense Radial slider 5-Seg
In Figure 14[13, 15], the CY8CMBR3106S device is configured in
the following manner:
❐ AC buzzer (1-pin).
❐ Buzzer second pin to ground.
■ PS0: CapSense proximity sensor
■ CS1–CS4: CapSense buttons[14]
■ CMOD pin: 2.2 nF to ground
■ VCC pin: 0.1 uF to ground
■ I2C_SCL and I2C_SDA pins: 330 ohm to the I2C header. It is
assumed that the I2C line pull-up resistors are present on the
host side outside the I2C header.
❐ For I2C communication.
■ HI pin: To host
❐ To prompt the host to initiate an I2C transaction for reading
■ VDD pin: To external supply voltage
❐ 1-µF and 0.1-µF decoupling capacitors connected to VDD
the changed sensor status.
■ XRES pin: Floating
❐ For external reset.
■ SLD10-SLD14: CapSense linear slider segments
■ SLD20-SLD24: CapSense radial slider segments
■ BUZ: To buzzer
Notes
13. VCC should be shorted to VDD for 1.71 V VDD 1.89 V.
14. All CapSense pins have 560-ohm series resistance (placed close to the chip) for improved noise immunity.
15. Proper ground layout is important for better SNR performance. Refer to the CY8CMBR3xxx CapSense Design Guide and Getting started with CapSense guide for
all layout guidelines.
Document Number: 001-85330 Rev. *Q
Page 22 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
■ 1.8-V externally regulated operation: When VDD is powered
with a 1.8 V ±5% supply, the VCC and VDD pins should be
shorted externally and the SUPPLY_LOW_POWER bit in the
DEVICE_CFG3 register should be set to 1 through the I2C
interface(refertotheCY8CMBR3xxxRegistersTRMfordetails
on the register). When the VCC and VDD pins are shorted, this
bypasses the internal voltage regulator. Under this condition,
make certain that VDD does not exceed 1.89 V.
Power Supply Information
The CY8CMBR3xxx family of controllers contains three supply
domains: VDD, VCC, and VDDIO
.
■ VDD: This is the primary supply to the chip and can be powered
from 1.8 V ± 5% (Externally regulated mode) or 1.8 to 5.5 V
(Internally regulated mode). The CapSense controller is
powered by the VDD supply, and all the I/O signal levels (except
I2C lines, HI, and XRES) are referenced with respect to the VDD
supply. For packages and MPNs that do not have VDDIO, the
I2C SDA, I2C SCL, HI, and XRES signal levels are also
referenced with respect to the VDD supply.
Note: If EZ-Click is used to configure the device, it automatically
takes care of the required register settings based on the voltage
settings selected in EZ-Click.
The CY8CMBR3xxx family of controllers is factory-configured for
1.8-V to 5.5-V operation. To configure a factory-configured
device for 1.8-V externally regulated operation, you can use the
following procedure:
■ VDDIO: This is the supply input for I2C SDA, I2C SCL, HI, and
XRES lines. The signal levels of these I/Os are referenced with
respect to VDDIO. The VDDIO supply can be as low as 1.71 V
and as high as the voltage of the VDD supply. The VDDIO should
not be powered at a voltage higher than that of the VDD supply.
The VDDIO is available only on select packages. For a package
that does not have VDDIO, the I2C SDA, I2C SCL, HI, and XRES
signal levels are referenced with respect to the VDD supply.
■ Short VDD and VCC
.
■ Power the device at 1.8 V (note that regardless of the value of
the SUPPLY_LOW_POWER bit, the device can be powered at
1.8 V for configuring the device; only CapSense operation is
not guaranteed if the SUPPLY_LOW_POWER bit is not
properly configured)
■ VCC: This is the internal regulator output, which powers the
core and capacitive sensing circuits. A 0.1-µF, 5-V ceramic
capacitor should be connected close to the VCC pin for better
performance.
■ Use EZ-Click to configure the device for 1.8-V operation.
■ Save and reset the device.
■ Power sequencing: The CY8CMBR3xxx device does not
require any power supply sequencing for the VDD and VDDIO
supplies. Either of these supplies can ramp earlier or later than
the other. The only requirement is that VDDIO should not be
greater than VDD.
■ Ground consideration: Both the VSS pin and the metal pad
(E-pad) of the device should be connected to board ground.
Figure 15. Power Supply Connections for CY8CMBR3xxx CapSense Controllers[16]
Power supply connections when 1.8 < VDD < 5.5 V
Power supply connections* when 1.71 < VDD < 1.89 V
1.71 V to 1.89 V
CY8CMBR3xxx
VDD
1.8 V to 5.5 V
CY8CMBR3xxx
VDD
0.1 F
0.1 F
1 F
VCC
VCC
1 F
0.1 F
0.1 F
1.71 V < VDDIO < VDD
1.71 V < VDDIO < VDD
VDDIO
VDDIO
0.1 F
1 F
1 F
VSS
VSS
*SUPPLY_LOW_POWER bit in DEVICE_CFG3 register should be set to 1
to operate device at 1.8V (±5%)
Note
16. Proper ground layout is important for best performance. Refer to the layout guidelines mentioned in the CY8CMBR3xxx CapSense Design Guide and Getting started
with CapSense guide.
Document Number: 001-85330 Rev. *Q
Page 23 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Electrical Specifications
Absolute Maximum Ratings
Table 12. Absolute Maximum Ratings[17]
Parameter
Description
Conditions
Min
Typ
–
Max
6
Units
VDD_MAX Max voltage on the VDD pin relative to VSS –40 °C to +85 °C TA, absolute maximum –0.5
VDDIO_MAX Max voltage on the VDDIO pin relative to VSS –40 °C to +85 °C TA, absolute maximum 0.5
V
V
V
–
6
VCC_MAX Max voltage on the VCC pin relative to VSS Absolute maximum
–0.5
–
1.89
VIO DC input voltage relative to VSS on I/O –40 °C to +85 °C TA, absolute maximum –0.5
–
–
–
VDD+0.5
V
V
V
ESD_HBM Electrostatic discharge, human body model Human body model ESD.
Electrostatic discharge, charged device
2200
500
–
–
ESD_CDM
Charged device model ESD
model
Maximum/minimum current to any input
or output, pin-to-pin or pin-to-supply
ILU
IIO
Latch-up current limits
–140
–
–
–
140
25
mA
mA
Current per GPIO
Operating Temperature
Table 13. Operating Temperature
Parameter
Description
Conditions
Min
–40
–40
Typ
25
–
Max
85
Units
°C
Ambient temperature inside system
enclosure
TO
TJ
Operation temperature
Junction temperature
100
°C
DC Electrical Characteristics
DC Chip-Level Specifications
The specifications in Table 14 are valid under these conditions: –40 °C TA 85 °C. Typical values are specified at TA = 25 °C,
VDD = 3.3 V, and are for design guidance only.
Table 14. DC Chip-Level Specifications
Parameter
Description
Chip supply voltage
Conditions/Details
VCC shorted to VDD
CC not shorted to VDD. VCC connected
Min
Typ
Max
Units
1.71
1.8
1.89
V
VDD
V
1.8
1.71
1.71
–
–
–
5.5
VDD
VDD
±50
±25
–
V
V
to 0.1 µF decoupling capacitor
1.71 V < VDD < 1.89 V
VDDIO
Supply voltage I/O
1.8 V < VDD < 5.5 V
–
V
+25 °C TA, VDD > 2 V, sensitivity 0.1 pF
–
mV
mV
µF
µF
Maximum allowed ripple on power
supply, DC to 10 MHz
VDD_RIPPLE
+25 °C TA, VDD > 1.75 V, CP < 20 pF,
sensitivity = 0.4 pF
–
–
External regulator voltage bypass
(capacitor to be connected to the VCC pin)
CEFC
CEXC
X5R ceramic ±10% or better
X5R ceramic or better
–
0.1
1
Power supply decoupling capacitor on
VDD
–
–
Note
17. Usage above the absolute maximum conditions listed in Table 12 may cause permanent damage to the device. Exposure to absolute maximum conditions for
extended periods of time may affect device reliability. The maximum storage temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High
Temperature Storage Life. When used below absolute maximum conditions, but above normal operating conditions, the device may not operate to specification.
Document Number: 001-85330 Rev. *Q
Page 24 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
XRES DC Specifications
Table 15. XRES DC Specifications
Parameter
Description
Conditions/Details
Min
Typ
Max
Units
VIH_XRES Input voltage high threshold on XRES pin CMOS input
VIL_XRES Input voltage low threshold on XRES pin CMOS input
CIN_XRES Input capacitance on XRES pin
0.7*VDD
–
–
V
–
–
–
0.3*VDD
V
–
0.05*VDD
–
7
–
pF
V
DD ≤ 4.5 V
DD > 4.5 V
–
mV
mV
k
VHYSXRES Input voltage hysteresis on XRES pin
V
200
3.5
–
RPULLUP Pull-up resistor
5.6
8.5
DC I/O Port Specifications
The specifications in Table 16 are valid at –40 °C TA +85 °C. Typical parameters are specified at TA = 25 °C and are for design
guidance only.
Table 16. DC I/O Port Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
IOH = –4 mA at 3 V VDD
VDD–0.6
–
–
V
VOH
Output voltage HIGH level
I
OH = –1 mA at 1.8 V VDD
OL = 4 mA at 1.8 V VDD
VDD–0.5
–
–
–
V
V
I
–
–
0.6
VOL
Output voltage LOW level
Pin capacitance
IOL = 10 mA at 3 V VDD
–
0.6
V
All VDD, all packages, all I/Os
CPIN
–
–
3
–
7
pF
ITOT_GPIO Maximum total sink chip current
85
mA
AC Electrical Specifications
Table 17. AC Chip-Level Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
Power supply slew rate at power-up and
power-down
TSR_POWER_UP
–40 °C ≤ TA ≤ 85 °C, all VDD
1
–
67
V/ms
XRES AC Specifications
Table 18. XRES AC Specifications
Parameter
Description
External reset pulse width
Conditions/Details
Min
Typ
Max
Units
TXRES
–40 °C ≤ TA ≤ 85 °C, all VDD
5
–
–
µs
Note
18. V must not exceed V + 0.2 V.
IH
DD
Document Number: 001-85330 Rev. *Q
Page 25 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Memory
Table 19. Flash Specifications
Parameter
Description
Min
100 K
20
Typ
–
Max
–
Units
cycles
years
Details/Conditions
[19]
FEND
Flash endurance
[19]
FRET
Flash retention. TA 55 °C, 100 K P/E cycles
–
–
2
I C Specifications
Table 20. I2C Specifications
Parameter
Description
I2C SCL clock frequency
Min
Typ
Max
Units
Conditions
FSCLI2C_FM
0
–
–
400
kHz
Hold time (repeated) START condition; after this
period, the first clock pulse is generated
THDSTAI2C_FM
0.6
–
µs
TSUSTAI2C_FM
TLOWI2C_FM
THIGHI2C_FM
THDDATI2C
Setup time for a repeated START condition
LOW period of the SCL clock
HIGH period of the SCL clock
Data hold time
0.6
1.3
0.6
0
–
–
–
–
–
–
–
–
–
–
–
–
µs
µs
µs
µs
ns
µs
TSUDATI2C_FM
TSUSTOI2C_FM
Data setup time
100
0.6
Setup time for I2C STOP condition
Capacitive load for each I2C bus line
Data valid time
CB_FM
TVDDATI2C_FM
TVDACKI2C_FM
TSPI2C_FM
TBUFI2C_FM
VIL_I2C
–
–
–
–
–
–
–
400
0.9
pF
µs
µs
ns
µs
V
–
–
Data valid acknowledge time
0.9
Pulse width of spikes suppressed by the input filter
Bus-free time between STOP and START condition
Input LOW voltage
–
50
1.3
–
0.3 * VDD
–0.5
0.7* VDD
2-mA sink
3-mA sink
DD < 2 V, 3-mA sink
VIH_I2C
Input HIGH Voltage
–
–
–
–
V
V
V
VOL_I2C_L
VOL_I2C_H
0.2 * VDD
V
Output LOW voltage, low supply range
Output LOW voltage, high supply range
–
–
VDD > 2 V, 3-mA sink
0.4
Fast Mode, 1.71 V ≤ VDD
mA 5.5 V, load = CB_SM, VOL
0.6 V
≤
I2C output low current
IOL_I2C_FM
6
–
–
=
Fast and standard mode I2C
speeds. 2 V ≤ VDD ≤ 4.5 V
I2C input hysteresis
I2C input hysteresis
I2C input hysteresis
I2C_VHYS_HV
I2C_VHYS_5V5
I2C_VHYS_LV
0.05 * VDD
–
–
–
–
–
–
mV
mV
mV
Fast and standard mode I2C
speeds. 4.5 V < VDD < 5.5 V
200
Fast and standard mode I2C
speeds. VDD < 2 V
0.1 * VDD
Note
19. Guaranteed by characterization.
Document Number: 001-85330 Rev. *Q
Page 26 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Figure 16. I2C Bus Timing Diagram for Fast or Standard Modes
System Specifications
The specifications in the following table are valid at TA = 25 °C and VDD = 5 V, unless otherwise specified.
Table 21. System Specifications
Parameter
Description
Conditions/Details
0.2-pF sensitivity, SNR 5:1
0.1-pF sensitivity, SNR 5:1
0.1-pF sensitivity, SNR 4:1
Min
5
Typ
–
Max Units
45
35
45
pF
pF
pF
Supported parasitic capacitance range of
sensors
CP
12
5
–
–
5-V rating, X7R or NP0 Cap.
CP ≤ 45 pF
CMOD
Value for CMOD external capacitor
–
2.2
–
–
nF
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
Average current per button with no finger CP = 10 pF, 2 buttons,
IAVG_NT
–
22
A
touch
Refresh interval = 120 ms, EMC
disabled, 0.4-pF sensitivity
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
CP = 10 pF, 8 buttons,
IAVG_WT
Average current with finger touch
–
–
600
A
Refresh interval =120 ms, EMC
disabled, 0.4-pF sensitivity
Note
20. Save command takes 220 ms to execute.
Document Number: 001-85330 Rev. *Q
Page 27 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Table 21. System Specifications (continued)
Parameter
Description
Conditions/Details
Min
Typ
Max Units
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
CP = 10 pF, 8 buttons,
IAVG_WF
Average current with EMC
–
–
300
100
A
A
Refresh interval =120 ms, EMC
enabled, 0.4-pF sensitivity
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
CP = 10 pF, 8 buttons,
IAVG_NF
Average current without EMC
Deep Sleep current with I2C on
–
–
Refresh interval = 120 ms, EMC
disabled
DD ≤ 3.3 V, TA = 25 °C, I2C Enabled
–
–
2.5
–
–
IDS
V
A
Boot-up time (time from power-up to first
sensor scan) with system diagnostics
enabled and EMC disabled
TBOOT_SYS
16 buttons, CP ≤ 18 pF
10 buttons, CP ≤ 18 pF
16 buttons, CP ≤ 18 pF
10 buttons, CP ≤ 18 pF
900
ms
Boot-up time (time from power-up to first
sensor scan) with no system diagnostics
and EMC enabled
TBOOT_WF
–
–
–
–
–
–
850
400
ms
ms
ms
Boot-up time (time from power-up to first
sensor scan) with no system diagnostics
and EMC disabled
TBOOT
Boot-up time (time from power-up to first
sensor scan) with both system
TBOOT_SYS_WF
1350
diagnostics and EMC enabled.
Boot up time (time from power to I2C
ready)
Time between I2C command and
execution (for all commands except the
"Save"[20] command)
TI2CBOOT
–
–
–
–
15
50
ms
ms
TI2C_LATENCY_
MAX
THI
Host interrupt pulse width
Buzzer output frequency
Buzzer output frequency
Buzzer output frequency
Buzzer output frequency
Buzzer output frequency
Buzzer output frequency
Buzzer output frequency
GPO PWM frequency
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
5 V, 1.8 V
200
–
–
700
–
s
FBUZ_4
4.00
2.67
2.00
1.60
1.33
1.14
1.00
106.7
5
kHz
kHz
kHz
kHz
kHz
kHz
kHz
Hz
FBUZ_2.67
FBUZ_2
–
–
–
–
FBUZ_1.60
FBUZ_1.33
FBUZ_1.143
FBUZ_1
–
–
–
–
–
–
–
–
FPWM
–
–
TSNS_RST5
TSNS_RST20
Sensor auto-reset interval 5 sec
Sensor auto-reset interval 20 sec
–
–
sec
sec
–
20
–
Pulse width on GPOx when the
corresponding CSx fails the system
diagnostics test
TFAULTY_SNS_P
ULSE
–
–
50
–
–
ms
pF
Maximum CP supported for shield
electrode
CP_SHIELD
100
Document Number: 001-85330 Rev. *Q
Page 28 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Power Consumption and Operational States
The CY8CMBR3xxx family of controllers is designed with
multiple low-power operational states to meet the low-power
requirements of battery-powered applications. These controllers
have the following operational states (see Figure 17):
controllers periodically scan proximity sensors to determine the
presence of a human body. If they detect human presence, the
controllers enter the Look-for-Touch state, in which they scan all
sensors at a slow, user-configured refresh interval. If a touch is
detected, the controllers enter the Active state. The controllers
remain in the Active state as long as the touch is present. In this
state, they update the sensor status and drive the corresponding
outputs. A transition from Active to Look-for-Touch occurs when
no touch is detected and the buzzer is not driven. Similarly, a
transition from Look-for-Touch to Look-for-Proximity occurs
when no proximity is detected.
1. Boot: The devices load the last-known configuration data and
run system diagnostics tests.
2. Active: The sensors are scanned at a fixed refresh rate to
determine the presence of touch, proximity, or finger position
on a slider, and any configured outputs (GPOs, buzzer and
HI) are driven. The refresh time in this state is the total
scanning and processing time of sensors, or 20 ms (typical)
whichever is higher.
The following parameters configure the operational states:
3. Look-for-Touch: All the sensors are scanned at a much
slower, user-configured refresh interval, and any enabled
GPOs (such as PWM or DC Toggle) are driven.
■ State timeout (Register STATE_TIMEOUT) defines the
following:
❐ Minimum time (in seconds) of no touch activity in the Active
state
❐ Minimum time to trigger a transition to the Look-for-Touch
state
4. Look-for-Proximity: Only proximity sensors enabled for
wake-on approach are scanned. No outputs are driven in this
state.
❐ Minimum time of no touch activity in the Look-for-Touch state
❐ Minimum time to trigger a transition to the Look-for-Proximity
state
5. Deep Sleep: No sensors are scanned, and the CY8CM-
BR3xxx devices are in a Low-power State with no processing.
The GPO status is reset to the default value in the Deep Sleep
mode.
■ Refresh Interval (Register REFRESH_CTRL) defines the
minimum time between the start of subsequent scans in the
Look for Touch and Look-for-Proximity states.
6. Configuration: No scanning or reporting occurs and the
devices wait for a reset for the configuration settings to take
effect.
■ The Refresh Interval for the Active state is fixed at 20 ms.
The CY8CMBR3xxx controllers automatically manage
transitions between four operational states (Boot, Active,
Look-for-Touch, and Look-for-Proximity). The host can force
transition in and out of the Deep Sleep state. A host command
can alter the configuration data, causing a transition to the
Configuration state. A transition to Configuration state can also
occur automatically after boot, if the configuration data is
corrupted.
During all three operational states—Active, Look-for-Touch, and
Look-for-Proximity, within each refresh interval, the devices
enter a Low-power State after scanning and processing the
requisite sensors. This helps to maintain the lowest average
power consumption within any refresh interval. Note that if any
I2C traffic is detected on the I2C bus or the I2C_SCL is held low,
the devices do not enter the Low-power State after scanning and
processing the sensors. This ensures that the devices do not
send unnecessary NACKs to I2C transactions because of
periodical entry to the Low-power State. Therefore, the device
requires I2C interface to be in “free” state and I2C lines to be
pulled up for power optimization.
The Active state emphasizes a high refresh rate (that is, low
refresh interval) for fast responses to button touches and
proximity events. The Look-for-Touch state enables low power
consumption during periods of no-touch activity.
The Look-for-Proximity state allows ultra-low power
Refer to section “System Design Recommendations for Low
Power Consumption” in CY8CMBR3xxx CapSense Design
Guide for low power design considerations.
consumption when a human body is not in close proximity. This
state is entered only if the wake-on-approach feature is enabled
(and the toggle is disabled). In this state, the CY8CMBR3xxx
Document Number: 001-85330 Rev. *Q
Page 29 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Figure 17. CY8CMBR3xxx Operational States and Transitions
Touch Detected
Deep Sleep
(S)
SLEEP Command
SLEEP Command
SLEEP Command
I2C Address Match
No Touch
No Touch
Valid configuration
data found
Boot
(B)
Active
(A)
Look-for-Touch
(T)
Look-for-Proximity
(P)
Reset
Reset
Proximity
Detected
Touch Detected
Reset
Reset
I2C Commands
I2C Commands
I2C Commands
Configuration Corrupted
Configuration
(C)
Reset
Document Number: 001-85330 Rev. *Q
Page 30 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
■ Serial Clock (SCL) –This line is used to synchronize the slave
with the master.
Response Time
Response time for button and proximity sensors is the minimum
amount of time for which the sensor must be active/inactive
(touched or proximity present), for the device to detect it as a
valid activation or deactivation event.
■ Serial Data (SDA) – This line is used to send data between the
master and the slave.
The CY8CMBR3xxx I2C interface has the following features:
For the CY8CMBR3xxx device family, response time numbers
for different sensors can be estimated using the design toolbox.
The following response time numbers are provided in the
toolbox:
■ Bit rate of 400 kbps
■ Configurable I2C slave address (7-bit)
■ No bus-stalling or clock-stretching during transactions
■ Register-based access to the I2C master for reads and writes
■ Repeated START support
■ RFBT: This value represents the response time for first button
touch when the device is in the Look-for-Touch or
Look-for-Proximity operational states.
The CY8CMBR3xxx CapSense controllers can be part of a
single-slave or a multi-slave environment.
■ RCBT: This value represents the response time for consecutive
button touches when the device is in the Active operational
state.
Figure 18. I2C Communication Between One Master
and One Slave
■ RFST:Thisvaluerepresentstheresponsetimeforthefirstslider
touch when the device is in the Look-for-touch operational
state.
VDD
VDD VDD
■ RCST: This value represents the response time for consecutive
slidertoucheswhenthedeviceisintheActiveoperationalstate.
■ RBSR: This value represents the response time for button and
slider release events when the device is in the Active opera-
tional state.
HI
■ RProx: This value represents the response time for detecting
valid proximity events on a proximity sensor.
HOST
CY8CMBR3xxx
SCL
■ RProx_release: This value represents the response time for
proximity release events on a proximity sensor.
SDA
CY8CMBR3xxx Resets
The CY8CMBR3xxx family of CapSense controllers has three
reset options – two hardware resets and one software reset.
2
I C Slave Address
■ Hardware Resets
To identify each device on the I2C bus, a unique 7-bit I2C slave
address is used. When the master wants to communicate with a
slave on the bus, it sends a START condition followed by the
appropriate I2C address. The START condition alerts all slaves
on the bus when a new transaction starts. The slave with the
specified I2C address acknowledges the master. All the other
slaves ignore further traffic on the bus until the next START
condition is detected.
❐ Power reset –Toggling the power on the VDD pin of the Cap-
Sense controller resets the controller.
❐ XRES reset – Pull the device XRES pin LOW for TXRES du-
ration and then pull it HIGH.
■ Software Reset
To reset the software, write one SW_RESET command to the
command register. All three resets are functionally equivalent,
and the CapSense controllers enter the Boot state (refer to the
Power Consumption and Operational States section) after any
reset.
The 7-bit I2C Slave Address for CY8CMBR3xxx devices can be
configured by modifying the contents of I2C_ADDR register
mentioned in CY8CMBR3xxx Registers TRM. Refer to section
“Configuring CY8CMBR3xxx” in CY8CMBR3xxx CapSense
Design Guide for more details on how to configure CY8CM-
BR3xxx registers.
Host Communication Protocol
The CY8CMBR3xxx CapSense controllers communicate to the
host through the I2C interface. I2C is a simple two-wire
synchronous communication protocol that uses the following two
lines:
The I2C address can be configured to any value between 0x08
to 0x77. The default I2C address for all CY8CMBR3xxx devices
is 0x37.
Document Number: 001-85330 Rev. *Q
Page 31 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
2
I C Communication Guidelines
Write Operation
1. After device reset, the host should wait for TI2CBOOT time
before initiating any I2C communication. The CY8CMBR3xxx
CapSense controller family will generate a NACK if the host
tries to communicate before this period.
A host performs the following steps during a write operation:
1. The host sends the START condition.
2. The host specifies the slave address, followed by the
read/write bit to specify a write operation.
2. The CY8CMBR3xxx controller is expected to NACK the
address match event if it is in the low-power state (during any
of the operational states – Deep Sleep, Look-for-Touch,
Look-for-Proximity, or Active). The controller wakes up from
the low-power state on an address match but sends NACK
until it transitions into the Active state and, on for the first
transaction, in the active state. When the device NACKs a
transaction the host is expected to retry the transaction until
it receives an ACK.
3. The device may NACK the host.
4. The host sends a Repeat Start (or a stop followed by a start
condition), followed by the address and read/write bit, to
specify a write operation. The host keeps sending the Repeat
Start with the address and read/write bits until the device
sends an ACK. The device ACKs the host.
5. The host specifies the register address to which it has to write.
6. The device ACKs the host.
3. If there is a delay of more than 340 ms between two subse-
quent bytes within an I2C transaction, the device may go into
low-power state and the host may get a NACK.
7. The host starts sending the data to the device, which is written
to the register address specified by the host. This is followed
by an ACK from the device.
4. Whenthehost sends the SAVE_CHECK_CRCcommand, the
device will send a NACK on any subsequent I2C transactions
until the command execution is completed. The time taken to
complete the SAVE_CHECK_CRC command is 220 ms typ.
8. If the write operation includes more bytes, each one is written
to the successive register address. Each successive byte is
followed by an ACK from the device.
9. After the write operation is complete, thehost sends the STOP
condition to the device. This marks the end of the communi-
cation (see Figure 19).
5. The host must not write to read-only registers. All write opera-
tions directed to such read-only registers are ignored.
Figure 19. Host Writing x Bytes to the Device
Slave
Address
Register
Address (n)
Slave
Address
A A A A A A A R
6 5 4 3 2 1 0 W
Data[n]
Data[n+1]
Data[n+x]
`
`
A A A A A A A R R R R R R R R R D D D D D D D D D D D D D D D D DD D D D D D D
6 5 4 3 2 1 0 W 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
S
N
N
A P
S
A
A
A
A
4. The host sends a Repeat Start, followed by the address and
read/write bit, to specify a write operation. The host keeps
sending the repeat start with the address and read/write bit
until the device sends an ACK.
Setting the Device Data Pointer
The host sets the device data pointer to specify the starting point
for future read operations. Setting the device data pointer
involves the following steps:
5. The device ACKs the host.
1. The host sends the START condition.
6. The host specifies the register address. Any further read
operation will take place from this address.
2. The host specifies the slave address, followed by the
read/write bit to specify a write operation.
7. The host sends the STOP condition (see Figure 20).
3. The device may NACK the host.
Figure 20. Host Setting the Device Data Pointer
Slave
Address
Slave
Address
Register
pointer
`
`
A A A A A A A R
6 5 4 3 2 1 0 W
A A A A A A A R
6 5 4 3 2 1 0 W
R R R R R R R R
7 6 5 4 3 2 1 0
S
N
N
S
A
A P
Document Number: 001-85330 Rev. *Q
Page 32 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
6. The device retrieves the byte from the pre-specified register
address and sends it to the host. The host ACKs the device.
Read Operation
The host performs the following steps for a read operation:
1. The host sends the START condition.
7. Each successive byte is retrieved from the successive
register address and sent to the host, followed by ACKs from
the host.
2. The host specifies the slave address, followed by the
read/write bit to specify a write operation.
8. After the host receives the required bytes, it NACKs the
device.
3. The device may NACK the host.
4. The host sends a repeat start followed by the address and
read/write bit to specify a write operation. The host keeps
sending the repeat start with the address and read/write bits
until the device sends an ACK.
9. The host sends the STOP condition to the device. This marks
the end of the communication (see Figure 21).
5. The device ACKs the host.
Figure 21. Host Reading x Bytes from the Device
Slave
Address
Slave
Address
Data[n]
Data[n+1]
Data[n+2]
Data[n+x]
`
`
A A A A A A A R
6 5 4 3 2 1 0 W
A A A A A A A R D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D
6 5 4 3 2 1 0 W 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
S
N
N
S
A
A
A
A
N P
Legend:
CY8CMBR3xxx to Host
HOST to CY8CMBR3xxx
Document Number: 001-85330 Rev. *Q
Page 33 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Layout Guidelines and Best Practices
Cypress provides an extensive set of design guidelines for CapSense board designs. Refer to the CY8CMBR3xxx CapSense Design
Guide for complete system guidelines. For a summary schematic and layout checklist, refer Table 3-2. Schematic Design Checklist
and Table 4-1. Layout Recommendations in this Design Guide.
Ordering Information
The CY8CMBR3xxx family consists of six parts that vary depending on the parameters. The following table lists all the parts and a
summary of the features supported. All package types are also available in Tape and Reel.
Table 22. Ordering Information
Ordering Code
Package
Type
Operating
Total
CapSense Sliders Proximity
GPOs
Shield Communication
Interface
Temperature Capacitive Buttons
Sensors
Sensing
Inputs
CY8CMBR3116-LQXI
CY8CMBR3106S-LQXI
CY8CMBR3110-SX2I
CY8CMBR3108-LQXI
CY8CMBR3102-SX1I
CY8CMBR3002-SX1I
24-pin QFN
24-pin QFN
16-pin SOIC
16-pin QFN
8-pin SOIC
8-pin SOIC
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Up to 16
Up to 16
Up to 10
Up to 8
Up to 2
2
Up to 16
Up to 11
Up to 10
Up to 8
Up to 2
2
0
Up to 2
Up to 2
Up to 2
Up to 8
0
1
1
1
1
1
0
I2C / GPO
I2C
I2C / GPO
I2C / GPO
I2C/GPO
GPO
Up to 2
0
0
0
0
Up to 5
Up to 2 Up to 4 + HI
Up to 2
0
Up to 1
2
Ordering Code Definitions
CY MBR XX X - XXX
8
C
3
X
I
(T)
Tape and Reel
Temperature Range:
I = Industrial
Package Type: XXX = LQX or SX2 or SX1
LQX = 24-pin QFN (Pb-free) or 16-pin QFN (Pb-free);
SX2 = 16-pin SOIC (Pb-free);
SX1 = 8-pin SOIC (Pb-free)
X = blank or S
blank = sliders are not supported;
S = device supports sliders
Number of CapSense Buttons: XX = 16 or 06 or 10 or 08 or 02
16 = 16 Buttons;
10 = 10 Buttons;
08 = 8 Buttons;
06 = 6 Buttons;
02 = 2 Buttons
Configuration interface: X = 1 or 0
1 = I2C Configurable;
0 = H/W Configurable
3rd generation MBR family
Mechanical Button Replacement
Technology Code: C = CMOS
Marketing Code: 8 = PSoC
Company ID: CY = Cypress
Document Number: 001-85330 Rev. *Q
Page 34 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Packaging Dimensions
Figure 22. 24-pin QFN ((4 × 4 × 0.55 mm) 2.65 × 2.65 E-Pad (Sawn)) Package Outline, 001-13937
001-13937 *H
Figure 23. 16-pin QFN ((3 × 3 × 0.6 mm) 1.7 × 1.7 E-Pad (Sawn)) Package Outline, 001-87187
001-87187 *A
Document Number: 001-85330 Rev. *Q
Page 35 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Figure 24. 16-pin SOIC (150 Mils) Package Outline, 51-85068
51-85068 *F
Figure 25. 8-pin SOIC (150 Mils) Package Outline, 51-85066
51-85066 *I
Document Number: 001-85330 Rev. *Q
Page 36 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Thermal Impedances
Table 23. Thermal Impedances
Parameter
TA
Description
Conditions
Min
–40
–40
–
Typ
25
Max
85
100
–
Units
°C
Operating ambient temperature
Operating junction temperature
Package θJA (24-pin QFN)
Package θJC (24-pin QFN)
Package θJA (16-pin QFN)
Package θJC (16-pin QFN)
Package θJA (16-pin SOIC)
Package θJC (16-pin SOIC)
Package θJA (8-pin SOIC)
Package θJC (8-pin SOIC)
TJ
–
°C
TJA
38
°C/Watt
°C/Watt
°C/Watt
°C/Watt
°C/Watt
°C/Watt
°C/Watt
°C/Watt
TJC
–
5.6
49.6
5.9
142
49.8
198
56.9
–
TJA
–
–
TJC
–
–
TJA
–
–
TJC
–
–
TJA
–
–
TJC
–
–
Solder Reflow Specifications
Table 24 illustrates the minimum solder reflow peak temperature to achieve good solderability.
Table 24. Solder Reflow Specifications
Package
8-pin SOIC
16-pin SOIC
16-pin QFN
24-pin QFN
Maximum Peak Temperature
Time at Maximum Temperature
260 °C
260 °C
260 °C
260 °C
30 s
30 s
30 s
30 s
Document Number: 001-85330 Rev. *Q
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CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Document Conventions
Units of Measure
Table 25. Units of Measure
Symbol
°C
Units of Measure
degrees Celsius
femtofarad
hertz
fF
Hz
kbps
kHz
k
MHz
µA
µF
µs
kilobits per second
kilohertz
kilo ohm
megahertz
microampere
microfarad
microsecond
milliampere
millisecond
millivolt
mA
ms
mV
nA
ns
nanoampere
nanosecond
nanovolt
nV
ohm
pp
peak-to-peak
picofarad
pF
s
second
V
volt
Document Number: 001-85330 Rev. *Q
Page 38 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Glossary
CP
Parasitic capacitance.
EZ-Click
The customizer tool (GUI) that enables easy register configurability and debugging for the CY8CM-
BR3xxx family of controllers.
GPO
FSS
General Purpose Output – that is, an output pin on a chip that the user can configure.
Flanking Sensor Suppression. An algorithm that distinguishes between signals from closely spaced
buttons, eliminating false touches. It ensures that the system recognizes only the first button touched.
SmartSense
Cypress CapSense algorithm that continuously compensates for system, manufacturing, and
environmental changes.
SNR
A ratio of the sensor signal, when touched, to the noise signal of an untouched sensor.
An MBR device feature that toggles the state of GPOs on every sensor activation.
Toggle
Open-Drain Low-Drive An output pin drive mode wherein logic 0 is represented by a low voltage (that is, Voltage < VOL), whereas
mode
logic 1 is represented by floating the output line to a HIGH impedance state.
Strong Drive mode
An output pin drive mode where logic 0 is represented by a low voltage (that is, Voltage < VOL), whereas
logic 1 is represented by a high voltage (that is, Voltage V > VOH).
Raw counts
Baseline
A count value representing a digital count equivalent of sensed capacitance.
Afiltered version of the raw counts. The baseline essentially tracks the value of the parasitic capacitance
in the system but does not track the value of the finger capacitance.
Parasitic capacitance
Finger capacitance
Global setting
The intrinsic capacitance of PC board traces to sensors.
Additional capacitance introduced on a CapSense sensor when a finger approaches/touches the sensor.
A setting value that is common for all elements of a set.
Active LOW signal
Active HIGH signal
Low-power State
A signal that indicates the active state by logic 0 and the inactive state by logic 1 values.
A signal that indicates the active state by logic 1 and the inactive state by logic 0 values.
A state where the device does not perform any processing and hence consumes less power.
Reference Documents
Document Title
Description
CapSense CY8CMBR3xxx Design Guide
Provides design guidance for using capacitive touch sensing (CapSense) function-
ality with the CY8CMBR3xxx family of CapSense controllers.
Getting Started with CapSense®
Design Toolbox
Provides a starting point for anyone who is new to capacitive touch sensing
(CapSense) and for anyone learning key design considerations and layout best
practices.
Includes four sections – General Layout Guidelines for a CapSense PCB, a layout
estimator for estimating button dimensions, a power consumption calculator (based
on button dimensions), and the Design Validation tool to validate the layout design.
EZ-Click User Guide
Gives instructions on how to install and uninstall the EZ-Click Customizer tool and
describes how to set up the boards. It also includes detailed descriptions of all the
tabs in the GUI.
CY8CMBR3xxx Programming Specifications Gives the information necessary to program the nonvolatile memory of the CY8CM-
BR3xxx devices. It describes the communication protocol required for access by an
external programmer, explains the programming algorithm, and gives electrical
specifications of the physical connection.
CapSense® Express™ Controllers Registers Lists and details all registers of CY8CMBR3102, CY8CMBR3106S, CY8CM-
TRM
BR3108, CY8CMBR3110, and CY8CMBR3116 CapSense® Express™ controllers.
All registers are listed in the order of address.
Document Number: 001-85330 Rev. *Q
Page 39 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Document History Page
Document Title: CY8CMBR3002/CY8CMBR3102/CY8CMBR3106S/CY8CMBR3108/CY8CMBR3110/CY8CMBR3116
Datasheet CapSense Express Controllers with SmartSense Auto-tuning 16 Buttons, 2 Sliders, Proximity Sensors
Document Number: 001-85330
Submission
Revision
ECN
Description of Change
Date
*G
4359354
05/06/2014 Updated hyperlinks for the following web pages namely “EZ-Click Customizer Tool”,
“Cypress online store”, and “CY3280-MBR3 Evaluation Kit”.
Updated Packaging Dimensions:
Updated Table 24:
Replaced 20 seconds with 30 seconds in “Time at maximum temperature” column.
*H
4557306
11/26/2014 Replaced the term “water tolerance” with “liquid tolerance” wherever applicable.
Updated Features Overview:
Added MPN versus Features Summary.
Updated Pinouts:
Updated CY8CMBR3116 (16 Sensing Inputs):
Updated Table 1:
Corrected pin naming in the CY8CMBR3116 pin diagram.
Updated details in “If unused” column corresponding to I2C SDA and I2C SCL pins.
Added Note 1 and referred the same note in CS6 pin.
Updated CY8CMBR3106S (16 Sensing Inputs; Sliders Supported):
Updated Table 2:
Updated details in “If unused” column corresponding to I2C SDA and I2C SCL pins.
Added Note 3 and referred the same note in CS15/SLD24 pin.
Updated CY8CMBR3108 (8 Sensing Inputs):
Updated Table 3:
Updated details in “If unused” column corresponding to I2C SDA and I2C SCL pins.
Added Note 5 and referred the same note in CS2/GUARD pin.
Updated CY8CMBR3110 (10 Sensing Inputs):
Updated Table 4:
Updated details in “If unused” column corresponding to I2C SDA and I2C SCL pins.
Added Note 7 and referred the same note in CS9/GPO4/HI/BUZ pin.
Updated CY8CMBR3102 (2 Sensing Inputs):
Updated Table 5:
Updated details in “If unused” column corresponding to I2C SDA and I2C SCL pins.
Added Note 8 and referred the same note in CS0/PS0 pin.
Updated CY8CMBR3002 (2 Sensing Inputs):
Updated Table 6:
Referred Note 8 in CS0 pin.
Updated Device Feature Details:
Updated Automatic Threshold:
Updated description.
Updated Noise Immunity:
Updated description.
Updated System Diagnostics:
Added Note 10 and referred the same note in “Sensor shorted to VSS”.
Added Register Configurability.
Updated Power Consumption and Operational States:
Updated description.
Updated Host Communication Protocol:
Updated I2C Communication Guidelines:
Updated description.
Updated Packaging Dimensions:
spec 001-87187 – Changed revision from ** to *A.
Updated Glossary:
Added definition of “low-power state”.
*I
4626833
01/16/2015 Added More Information.
Moved CY8CMBR3xxx Ecosystem section to page 2.
Document Number: 001-85330 Rev. *Q
Page 40 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Document History Page (continued)
Document Title: CY8CMBR3002/CY8CMBR3102/CY8CMBR3106S/CY8CMBR3108/CY8CMBR3110/CY8CMBR3116
Datasheet CapSense Express Controllers with SmartSense Auto-tuning 16 Buttons, 2 Sliders, Proximity Sensors
Document Number: 001-85330
Submission
Revision
ECN
Description of Change
Date
*J
4681058
03/10/2015 Updated Ordering Information:
Added Note “All package types are available in Tape and Reel.” and referred the same note
in Table 22.
Added Ordering Code Definitions.
*K
*L
4735762
4812567
05/07/2015 Updated Packaging Dimensions:
spec 001-13937 – Changed revision from *E to *F.
Updated Thermal Impedances:
Updated Table 23:
Updated entire table.
06/26/2015 Updated MPN versus Features Summary:
Updated details in “CY8CMBR3002” column corresponding to “Sensor auto-reset” feature.
Updated details in “CY8CMBR3108” column corresponding to “Maximum number of
GPOs/LED drive outputs” feature.
Updated Pinouts:
Recommended “If unused” connection for SPO, GPO and AXRES pins.
Added Unused SPO Pin Connection.
Added Unused SPO Pin Connection for AXRES pins.
Added Unused GPO Pin Connection.
Updated Power Consumption and Operational States:
Removed low power design guidelines from this section, and referred to CY8CMBR3xxx
Design Guide for these guidelines.
Updated I2C Slave Address:
Mentioned default I2C slave address for CY8CMBR3xxx devices.
Provided details onhow to configure the 7-bit I2C slave address for CY8CMBR3xxx devices.
*M
5041506
01/13/2016 Updated Power Supply Information:
Updated description.
Updated Power Consumption and Operational States:
Updated description.
Updated Figure 17.
Updated Ordering Information:
Removed the Note “All package types are available in Tape and Reel.” and its reference in
Table 22, rather mentioned the same in description above Table 22.
No change in part numbers.
Updated Ordering Code Definitions (Added (T) and its details).
Updated Packaging Dimensions:
spec 51-85066 – Changed revision from *G to *H.
Updated to new template.
*N
*O
5638290
6032718
03/16/2017 Removed spec RPU.
Added Flash Specifications.
Updated Figure 16
Add Rpullup in XRES DC Specifications.
Updated to new template.
01/15/2018 Updated Packaging Dimensions:
spec 51-85066 – Changed revision from *H to *I.
Document Number: 001-85330 Rev. *Q
Page 41 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
Document History Page (continued)
Document Title: CY8CMBR3002/CY8CMBR3102/CY8CMBR3106S/CY8CMBR3108/CY8CMBR3110/CY8CMBR3116
Datasheet CapSense Express Controllers with SmartSense Auto-tuning 16 Buttons, 2 Sliders, Proximity Sensors
Document Number: 001-85330
Submission
Revision
ECN
Description of Change
Date
*P
6841442
03/30/2020 Updated Pinouts:
Updated CY8CMBR3108 (8 Sensing Inputs):
Updated Table 3:
Included “I/DO” under “Type” column corresponding to CS5/GPO1pin.
Included “DO = Digital Output” in the bottom of the table.
Updated CY8CMBR3110 (10 Sensing Inputs):
Updated Table 4:
Included “DO = Digital Output” in the bottom of the table.
Updated CY8CMBR3102 (2 Sensing Inputs):
Updated Table 5:
Included “DO = Digital Output” in the bottom of the table.
Updated Layout Guidelines and Best Practices:
Added “For a summary schematic and layout checklist, refer Table 3-2. Schematic Design
Checklist and Table 4-1. Layout Recommendations in this Design Guide.” in the end of
paragraph.
Updated Packaging Dimensions:
spec 001-13937 – Changed revision from *F to *H.
spec 51-85068 – Changed revision from *E to *F.
Updated to new template.
Completing Sunset Review.
*Q
7104675
03/15/2021 Updated the description of the TSR_POWER_UP parameter.
Document Number: 001-85330 Rev. *Q
Page 42 of 43
CY8CMBR3002/CY8CMBR3102/
CY8CMBR3106S/CY8CMBR3108/
CY8CMBR3110/CY8CMBR3116 Datasheet
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© Cypress Semiconductor Corporation, 2013–2021. This document is the property of Cypress Semiconductor Corporation and its subsidiaries (“Cypress”). This document, including any software or
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Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in
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Document Number: 001-85330 Rev. *Q
Revised March 15, 2021
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