ESD133B1W01005E6327XTSA1 概述
Trans Voltage Suppressor Diode, 瞬态抑制器
ESD133B1W01005E6327XTSA1 规格参数
是否Rohs认证: | 符合 | 生命周期: | Active |
Reach Compliance Code: | unknown | Factory Lead Time: | 1 week |
风险等级: | 1.57 | 二极管类型: | TRANS VOLTAGE SUPPRESSOR DIODE |
湿度敏感等级: | 1 | 峰值回流温度(摄氏度): | NOT SPECIFIED |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | Base Number Matches: | 1 |
ESD133B1W01005E6327XTSA1 数据手册
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PDF下载ESD133-B1-W01005
Protection Devices
TVS (Transient Voltage Suppressor)
Bi-directional, 5.5 V, 0.2 pF, 01005, RoHS and Halogen Free compliant
Feature list
•
ESD / transient protection according to:
-
-
-
IEC61000-4-2 (ESD): ±20 kV (air / contact discharge)
IEC61000-4-4 (EFT): ±2.5 kV / ±50 A (5/50 ns)
IEC61000-4-5 (Surge): ±3 A (8/20 μs)
•
•
•
•
•
Bi-directional working voltage up to: VRWM = ±5.5 V
Line capacitance: CL = 0.2 pF (typical) at f = 1 MHz
Clamping voltage: VCL = 13 V (typical) at ITLP = 16 A with RDYN = 0.56 Ω (typical)
Very low reverse current: IR < 1 nA (typical)
Small form factor SMD size 01005 and low profile (0.43 mm x 0.23 mm x 0.15 mm);
for further package information please refer to apllication note AN392 [3]
•
Bi-directional and symmetric I/V characteristics for optimized design / assembly
Potential applications
•
•
USB 3.0 / 3.1, Firewire, DVI, HDMI, S-ATA, DisplayPort, Thunderbolt
Mobile HDMI link, MDDI, MIPI, SWP
For further information please refer to application note AN525 [4]
Product validation
Qualified for industrial applications according to relevant tests of JEDEC47/20/22
Device information
b) Schematic diagram
a) Pin configuration
Figure 1
Pin configuration and schematic diagram
Table 1
Type
Part information
Package
Configuration
1 line, bi-directional
Marking code
T 1)
ESD133-B1-W01005
WLL-2-2
1
The device has no marking on the device top. The marking code is on pad side.
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
Revision 1.0
2018-01-12
ESD133-B1-W01005
Protection Devices
Table of contents
Table of contents
Feature list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Device information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical characteristic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
2
3
4
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1
WLL-2-2 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Datasheet
2
Revision 1.0
2018-01-12
ESD133-B1-W01005
Protection Devices
Maximum ratings
1
Maximum ratings
Note:
TA = 25 °C, unless otherwise specified
Table 2
Maximum ratings
Parameter
Symbol
VRWM
Values
±5.5
Unit
V
Reverse working voltage 1)
ESD discharge 2)
VESD (contact)
VESD (air)
PPK
±20
kV
±20
Peak pulse power 3)
21
W
A
Peak pulse current 3)
Operating temperature range
Storage temperature
IPP
±3
TOP
-55 to 125
-65 to 150
°C
°C
Tstg
Attention: Stresses above the maximum values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings. Exceeding only one of these values may cause
irreversible damage to the component.
1
Device snaps back to a low holding voltage. Please refer to AN525 for latch-up prevention [4]
VESD according to IEC61000-4-2 (R = 330 Ω, C = 150 pF discharge network)
Stress pulse: 8/20μs current waveform according to IEC61000-4-5
2
3
Datasheet
3
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ESD133-B1-W01005
Protection Devices
Electrical characteristics
2
Electrical characteristics
Note:
TA = 25 °C, unless otherwise specified
Device is electrically symmetrical
IF
IPP
ITLP
VF … Forward voltage
DI
IF
VR … Reverse voltage
IR … Reverse current
… Forward current
DV
DI
RDYN =
DV
Ih
IT
IR
VTLP
VCL Vh
VRWM
V
t1
VR
VCL
VTLP
V
h
VRWM
V
t1
VF
IR
IT
Ih
RDYN … Dynamic resistance
V RWM … Reverse working voltage ma.x
V
Vh
VCL
… Trigger voltage
… Holding voltage
… Clamping voltage
t1
DV
DI
DI
DV
RDYN
=
VTLP … TLP voltage
-IPP
-ITLP
IR
… Reverse leakage current
IPP
ITLP
Ih
… Peak pulse current
… TLP current
… Holding current
… Test current
IR
IT
Thyristo_r Characteristi_cCurve_Bi-Directional.vsd
Figure 2
Definitions of electrical characteristics
Datasheet
4
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ESD133-B1-W01005
Protection Devices
Electrical characteristics
Table 3
DC characteristics
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Min.
6.5
Max.
Breakdown voltage
Holding voltage
Vbr
Vh
Ih
8
10
–
V
IR = 1 mA
IR = Ih
–
–
–
1.9
25
–
V
Holding reverse current
Reverse current
–
mA
nA
VR=Vh
IR
100
VR = 5.5 V
Table 4
AC characteristics
Symbol
Parameter
Values
Unit
Note or Test
Condition
Min.
Typ.
Max.
Max.
Line capacitance
CL
–
–
0.2
–
–
pF
VR = 0 V, f = 1 MHz
VR = 0 V, f = 2.5 GHz
0.2
Table 5
ESD and Surge characteristics
Symbol
Parameter
Values
Typ.
Unit
Note or Test
Condition
Min.
Clamping voltage 1)
Clamping voltage 2)
Dynamic resistance 1)
VCL
–
–
–
–
–
8.5
13
3
–
–
–
–
V
ITLP = 8 A, tp = 100 ns
ITLP = 16 A, tp = 100 ns
IPP = 1 A, tp = 8/20 µs
IPP = 3 A, tp = 8/20 µs
tp = 100 ns
7
RDYN
0.56
Ω
1
Please refer to Application Note AN210 [1]. TLP parameters: Z0 = 50 Ω , tp = 100ns, tr = 0.6 ns.
Stress pulse: 8/20μs current waveform according to IEC61000-4-5
2
Datasheet
5
Revision 1.0
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ESD133-B1-W01005
Protection Devices
Typical characteristic diagrams
3
Typical characteristic diagrams
Note:
TA = 25 °C, unless otherwise specified
10-6
10-7
10-8
10-9
10-10
10-11
10-12
-5
-4
-3
-2
-1
0
1
2
3
4
5
VR [V]
Figure 3
Reverse leakage current: IR = f(VR)
0.5
0.4
0.3
0.2
0.1
0
-5
-4
-3
-2
-1
0
1
2
3
4
5
VR [V]
Figure 4
Line capacitance: CL = f(VR), f = 1 MHz
Datasheet
6
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ESD133-B1-W01005
Protection Devices
Typical characteristic diagrams
120
100
80
Scope: 6 GHz, 20 GS/s
VCL−max−peak = 109 V
CL−30ns−peak = 13 V
60
V
40
20
0
−20
−50
0
50
100 150 200 250 300 350 400 450
tp [ns]
Figure 5
Clamping voltage (ESD):VCL = f(t), 8 kV positive pulse according to IEC 61000-4-2
20
0
−20
V
CL−max−peak = −112 V
CL−30ns−peak = −13 V
−40
−60
V
−80
Scope: 6 GHz, 20 GS/s
−100
−120
−50
0
50
100 150 200 250 300 350 400 450
tp [ns]
Figure 6
Clamping voltage (ESD):VCL = f(t), 8 kV negative pulse according to IEC 61000-4-2
Datasheet
7
Revision 1.0
2018-01-12
ESD133-B1-W01005
Protection Devices
Typical characteristic diagrams
160
140
120
100
80
Scope: 6 GHz, 20 GS/s
VCL−max−peak = 139 V
CL−30ns−peak = 21 V
V
60
40
20
0
−20
−50
0
50
100 150 200 250 300 350 400 450
tp [ns]
Figure 7
Clamping voltage (ESD):VCL = f(t), 15 kV positive pulse according to IEC 61000-4-2
20
0
−20
−40
VCL−max−peak = −140 V
−60
V
CL−30ns−peak = −21 V
−80
−100
−120
−140
−160
Scope: 6 GHz, 20 GS/s
−50
0
50
100 150 200 250 300 350 400 450
tp [ns]
Figure 8
Clamping voltage (ESD):VCL = f(t), 15 kV negative pulse according to IEC 61000-4-2
Datasheet
8
Revision 1.0
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ESD133-B1-W01005
Protection Devices
Typical characteristic diagrams
ESD133-B1-W01005
RDYN
40
30
20
15
10
5
RDYN = 0.56 Ω
20
10
0
0
-10
-20
-30
-40
-5
-10
-15
-20
RDYN = 0.56 Ω
-30 -25 -20 -15 -10 -5
0
5
10 15 20 25 30
VTLP [V]
Figure 9
Clamping voltage (TLP): ITLP = f(VTLP) [1]
Datasheet
9
Revision 1.0
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ESD133-B1-W01005
Protection Devices
Typical characteristic diagrams
3.5
3
2.5
2
1.5
1
0.5
0
−0.5
−1
−1.5
−2
−2.5
−3
−3.5
−10
−5
0
5
10
VCL [V]
Figure 10 Clamping voltage (Surge): IPP = f(VCL) according to IEC61000-4-5 [1]
Datasheet
10
Revision 1.0
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ESD133-B1-W01005
Protection Devices
Typical characteristic diagrams
0
1
2
3
4
ESD133-B1-W01005
0.1
5
0.01
1
10
Frequency [GHz]
Figure 11 Insertion loss vs. frequency in a 50 Ω system
Datasheet
11
Revision 1.0
2018-01-12
ESD133-B1-W01005
Protection Devices
Package information
4
Package information
4.1
WLL-2-2 package
Note:
All dimensions are in units mm
Top view
Bottom view
±0.01
±0.03
0.15
0.23
2
1
±0.02
0.2
SG-WLL-2-2-PO V01
Figure 12 WLL-2-2 package outline
0.23
0.23
Copper
Solder mask
Stencil apertures
SG-WLL-2-2-FP V01
Figure 13 WLL-2-2 footprint (recommendations for Printed Circuit Board Assembly see [2])
0.2
2
0.2
0.28
SG-WLL-2-2-TP V01
Figure 14 WLL-2-2 packing
Marking on pad-side
Type code
Type code
Figure 15 WLL-2-2 marking example (marking code see Device information )
Datasheet
12
Revision 1.0
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ESD133-B1-W01005
Protection Devices
References
5
References
[1]
Infineon AG - Application note AN210: Effective ESD protection design at system level using VF-TLP
characterization methodology
[2]
Infineon AG - Recommendation for printed circuit board assembly of Infineon WLL packages
http://www.infineon.com/Packageinformation_WLL
[3]
[4]
Infineon AG - Application note AN392: TVS Diodes in ChipScalePackage reduce size and save cost
Infineon AG - Application note AN525: Latch-up prediction for SCR TVS device
Revision history
Revision history: Revision 0.9, 2016-10-18
Page or Item
Subjects (major changes since previous revision)
Revision 1.0, 2018-01-12
all
Electrical characteristics updated and missing diagrams added
Minor editorial changes
Datasheet
13
Revision 1.0
2018-01-12
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2018-01-12
Published by
IMPORTANT NOTICE
WARNINGS
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical values
stated herein and/or any information regarding the
application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities of
any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer’s compliance with its obligations
stated in this document and any applicable legal
requirements, norms and standards concerning
customer’s products and any use of the product of
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dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies office.
Except as otherwise explicitly approved by Infineon
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authorized representatives of Infineon Technologies,
Infineon Technologies’ products may not be used in
any applications where a failure of the product or
any consequences of the use thereof can reasonably
be expected to result in personal injury
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81726 Munich, Germany
©
2018 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
IFX-haz1500360312222
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
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application.
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