ICE2QR2280G-1_技术文档

ICE2QR2280G-1

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Product Highlights



Active Burst Mode to reach the lowest standby power requirement <100 mW @ no

load



Quasi resonant operation

PG-DSO-12

Digital frequency reduction for better overall system efficiency

800 V avalanche rugged CoolMOS™ with startup cell

Pb-free lead plating, halogen free mold compound, RoHS compliant



Auxiliary power supply of Server, PC, Printer, TV, Home

theater/Audio System, White Goods, etc.

Features



800V avalanche rugged CoolMOS^TMwith built-in startup cell

Quasi resonant operation till very low load

Active burst mode operation for low standby input power (<

0.1W)

Description

The ICE2QR2280G-1 is derived from CoolSET^TM-Q1. The only



Digital frequency reduction with decreasing load for reduced

switching loss

difference is it has a lower Vcc turn off threshold. The CoolSET^TM

-

Q1 is the first generation of quasi-resonant controller and

CoolMOS^TMintegrated power IC. Operating the MOSFET switch in

quasi-resonant mode, lower EMI, higher efficiency and lower

voltage stress on secondary diodes are expected for the SMPS.

Based on the BiCMOS technology, the CoolSET^TM-Q1 series has a

wide operation range (up to 25V) of IC power supply and lower

power consumption. It also offers many advantages such as

quasi-resonant operation till very low load, increasing the higher

average system efficiency compared to other conventional

solutions, achieving ultra-low power consumption with small and

controllable output voltage ripple at standby mode with Active

Burst Mode operation, etc.



Built-in digital soft-start

Foldback point correction, cycle-by-cycle peak current

limitation and maximum on time limitation

Auto restart mode for VCC over-voltage protection, under-

voltage protection, over-load protection and over-

temperature protection



Latch-off mode for adjustable output over-voltage protection

and transformer short-winding protection

Lower Vcc turn off threshold

Applications



Adapter/Charger, Blue Ray/DVD player, Set-top Box, Digital

Photo Frame

W_p

W_a

L_f

D_O

Snubber

C_f

V_O

C_bus

W_s

C_ZCR_ZC2R_ZC1

85 ~ 265 VAC

C_O

R_VCC

D_VCC

D_r1~D_r4

C_VCC

Drain

ZC

VCC

C_PS

Startup Cell

Power Management

R_b1

PWM controller

Current Mode Control

Cycle-by-Cycle

CS

FB

R_b2

R_ovs1

CoolMOS^TM

R_CS

Optocoupler

GND

current limitation

Zero Crossing Block

Active Burst Mode

Protections

R_c1

C_c1C_c2

R_ovs2

TL431

Control Unit

CoolSET^TM-Q1

Figure 1

Typical application

1

2

V_DS

800 V

Package

Marking

R_DSon

230V_AC±15%²

85-265 V_AC

Type

ICE2QR2280G-1

PG-DSO-12

ICE2QR2280G-1

2.26 Ω

53 W

30 W

1

typ at T=25°C

2

Calculated maximum input power rating at Ta=50°C, Ti=125°C and with 232mm², 2 oz copper area on Drain pin as heat sink..

Data Sheet

www.infineon.com

Please read the Important Notice and Warnings at the end of this document

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Table of contents

Table of contents............................................................................................................................ 2

1

2

Pin Configuration and Functionality ................................................................................ 3

Representative Block Diagram ........................................................................................ 4

3

3.1

3.2

3.3

Functional Description ................................................................................................... 5

Introduction.............................................................................................................................................5

Soft-start..................................................................................................................................................5

Normal Operation ...................................................................................................................................6

Digital Frequency Reduction .............................................................................................................6

Up/down counter..........................................................................................................................6

Zero crossing (ZC counter) ...........................................................................................................7

Ringing suppression time ..................................................................................................................8

Switch on determination..............................................................................................................8

Switch off determination...................................................................................................................8

Current Limitation...................................................................................................................................9

Foldback Point Correction.................................................................................................................9

Active Burst Mode..................................................................................................................................10

Entering Active Burst Mode Operation............................................................................................10

During Active Burst Mode Operation...............................................................................................10

Leaving Active Burst Mode Operation .............................................................................................11

Protection Functions.............................................................................................................................12

3.3.1

3.3.1.1

3.3.1.2

3.3.2

3.3.2.1

3.3.3

3.4

3.4.1

3.5

3.5.1

3.5.2

3.5.3

3.6

4

4.1

4.2

4.3

4.3.1

4.3.2

4.3.3

4.3.4

4.3.5

4.3.6

4.3.7

4.3.8

4.3.9

4.3.10

Electrical Characteristics...............................................................................................13

Absolute Maximum Ratings ..................................................................................................................13

Operating Range....................................................................................................................................14

Characteristics.......................................................................................................................................14

Supply Section .................................................................................................................................14

Internal Voltage Reference ..............................................................................................................15

PWM Section.....................................................................................................................................15

Current Sense...................................................................................................................................15

Soft Start...........................................................................................................................................15

Foldback Point Correction...............................................................................................................16

Digital Zero Crossing........................................................................................................................16

Active Burst Mode ............................................................................................................................17

Protection.........................................................................................................................................17

CoolMOS™ Section ...........................................................................................................................18

5

6

7

8

CoolMOS™ Performance Characteristics..........................................................................19

Input Power Curve ........................................................................................................21

Outline Dimension ........................................................................................................22

Marking .......................................................................................................................23

Revision History ............................................................................................................................23

Data Sheet

2

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2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Pin Configuration and Functionality

1

Pin Configuration and Functionality

Table 1

Pin definitions and functions

Symbol

Function

ZC (Zero Crossing)

At this pin, the voltage from the auxiliary winding after a time delay circuit is applied.

Internally, this pin is connected to the zero-crossing detector for switch-on determination.

Additionally, the output overvoltage detection is realized by comparing the voltage V_ZCwith

an internal preset threshold.

1

2

ZC

FB (Feedback)

Normally an external capacitor is connected to this pin for a smooth voltage V_FB.

Internally this pin is connected to the PWM signal generator block for switch-off

determination (together with the current sensing signal), to the digital signal processing

block for the frequency reduction with decreasing load during normal operation, and to

the Active Burst Mode controller block for entering Active Burst Mode operation

determination and burst ratio control during Active Burst Mode operation. Additionally,

the open-loop / over-load protection is implemented by monitoring the voltage at this

pin.

FB

3, 9, 10

4

N.C.

CS

Not Connected

CS (Current Sense/800V CoolMOS™ Source)

This pin is connected to the shunt resistor for the primary current sensing externally and to

the PWM signal generator block for switch-off determination (together with the feedback

voltage) internally. Moreover, short-winding protection is realized by monitoring the

voltage V_CSduring on-time of the main power switch.

800V CoolMOS™ Drain

Pin Drain is the connection to the Drain of the integrated CoolMOS™.

5, 6, 7, 8

11

Drain

VCC

VCC (Power supply)

VCC pin is the positive supply of the IC. The operating range is between V_VCCoffand V_VCCOVP

.

GND (Ground)

This is the common ground of the controller.

12

GND

1

2

3

12

11

10

ZC

FB

GND

VCC

N.C.

CS

4

9

5

6

8

7

Drain

Figure 2

Pin configuration PG-DSO-12(top view)

Data Sheet

3

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Representative Block Diagram

2

Representative Block Diagram

Figure 3

Representative Block Diagram

Data Sheet

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

3

Functional Description

3.1

Introduction

ICE2QR2280G-1 is derived from CoolSET^TM-Q1. The only difference is it has a lower Vcc turn off threshold. The

CoolSET^TM-Q1 has a startup cell which is integrated into the CoolMOS^TM. As shown in Figure 3, the start cell

consists of a high voltage device and a controller, whereby the high voltage device is controlled by the controller.

The startup cell provides a pre-charging of the VCC capacitor till VCC voltage reaches the VCC turned-on

threshold V_VCConand the IC begins to operate.

Once the mains input voltage is applied, a rectified voltage shows across the capacitor C_bus. The high voltage

device provides a current to charge the VCC capacitor C_VCC. Before the VCC voltage reaches a certain value, the

amplitude of the current through the high voltage device is only determined by its channel resistance and can

be as high as several mA. After the VCC voltage is high enough, the controller controls the high voltage device so

that a constant current around 1 mA is provided to charge the VCC capacitor further, until the VCC voltage

exceeds the turned-on threshold V_VCCon. As shown as the time phase I in Figure 4, the VCC voltage increase near

linearly and the charging speed is independent of the mains voltage level.

V_VCC

I

II

III

V_VCCon

V_VCCoff

t2

t

t1

Figure 4

VCC voltage at start up

The time taking for the VCC pre-charging can then be approximately calculated as:

푉_{ꢀ퐶퐶표푛}∙ ꢁ_ꢀ퐶퐶

푡₁=

(1)

퐼_{ꢀ퐶퐶푐ℎ푎푟ꢂ푒2}

where I_VCCcharge2is the charging current from the startup cell which is 1.05 mA, typically.

When the VCC voltage exceeds the VCC turned-on threshold V_VCConat time t1, the startup cell is switched off and

the IC begins to operate with soft-start. Due to power consumption of the IC and the fact that there is still no

energy from the auxiliary winding to charge the VCC capacitor before the output voltage is built up, the VCC

voltage drops (Phase II). Once the output voltage is high enough, the VCC capacitor receives the energy from

the auxiliary winding from the time point t2 onward. The VCC then will reach a constant value depending on

output load.

3.2

Soft-start

As shown in Figure 5, at the time ton, the IC begins to operate with a soft-start. By this soft-start the switching

stresses for the switch, diode and transformer are minimized. The soft-start implemented in CoolSET™ Q1 is a

digital time-based function. The preset soft-start time is t_SS(12 ms) with 4 steps. If not limited by other

functions, the peak voltage on CS pin will increase step by step from 0.32 V to 1 V finally.

Data Sheet

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

Vcs_sst

(V)

1.00

0.83

0.66

0.49

0.32

t_on

3

6

9

12

Time(ms)

Figure 5 Maximum current sense voltage during soft start

3.3

Normal Operation

The PWM controller during normal operation consists of a digital signal processing circuit including an

up/down counter, a zero-crossing counter (ZC counter) and a comparator, and an analog circuit including a

current measurement unit and a comparator. The switch-on and -off time points are each determined by the

digital circuit and the analog circuit, respectively. As input information for the switch-on determination, the

zero-crossing input signal and the value of the up/down counter are needed, while the feedback signal V_FBand

the current sensing signal V_CSare necessary for the switch-off determination. Details about the full operation of

the PWM controller in normal operation are illustrated in the following paragraphs.

3.3.1

Digital Frequency Reduction

As mentioned above, the digital signal processing circuit consists of an up/down counter, a ZC counter and a

comparator. These three parts are keys to implement digital frequency reduction with decreasing load. In

addition, a ringing suppression time controller is implemented to avoid mis-triggering by the high frequency

oscillation, when the output voltage is very low under conditions such as soft start period or output short

circuit. Functionality of these parts is described as in the following.

3.3.1.1

Up/down counter

The up/down counter stores the number of the zero crossing where the main power switch is switched on after

demagnetization of the transformer. This value is fixed according to the feedback voltage, V_FB, which contains

information about the output power. Indeed, in a typical peak current mode control, a high output power

results in a high feedback voltage, and a low output power leads to a low regulation voltage. Hence, according

to VFB, the value in the up/down counter is changed to vary the power MOSFET off-time according to the

output power. In the following, the variation of the up/down counter value according to the feedback voltage is

explained.

The feedback voltage V_FBis internally compared with three threshold voltages V_FBZL, V_FBZHand V_FBR1, at each clock

period of 48 ms. The up/down counter counts then upward, keep unchanged or count downward, as shown in

Table 2.

Data Sheet

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

Table 2

V_FB

up/down counter action

Always lower than V_FBZL

Count upwards till 7

Once higher than V_FBZL, but always lower than V_FBZH

Once higher than V_FBZH, but always lower than V_FBR1

Once higher than V_FBR1

Stop counting, no value changing

Count downwards till 1

Set up/down counter to 1

In the CoolSET^TM-Q1, the number of zero crossing is limited to 7. Therefore, the counter varies between 1 and 7,

and any attempt beyond this range is ignored. When V_FBexceeds V_FBR1voltage, the up/down counter is reset to

1, in order to allow the system to react rapidly to a sudden load increase. The up/down counter value is also

reset to 1 at the start-up time, to ensure an efficient maximum load start up. Figure 6 shows some examples on

how up/down counter is changed according to the feedback voltage over time.

The use of two different thresholds V_FBZLand V_FBZHto count upward or downward is to prevent frequency

jittering when the feedback voltage is close to the threshold point. However, for a stable operation, these two

thresholds must not be affected by the foldback current limitation (see 3.4.1), which limits the V_CSvoltage.

Hence, to prevent such situation, the threshold voltages, V_FBZLand V_FBZH, are changed internally depending on

the line voltage levels.

clock

T=48ms

t

V_FB

V_FBR1

V_FBZH

V_FBZL

Up/down

counter

1

3 1

1 1

4 1

Case 1

4

2

7

5

3

7

6

4

7

6

4

7

6

4

7

5

4

2

5

Case 2

Case 3

4

7

3

6

Figure 6 Up/down counter operation

3.3.1.2

Zero crossing (ZC counter)

In the system, the voltage from the auxiliary winding is applied to the zero-crossing pin through a RC network,

which provides a time delay to the voltage from the auxiliary winding. Internally this pin is connected to a

clamping network, a zero-crossing detector, an output overvoltage detector and a ringing suppression time

controller.

During on-state of the power switch a negative voltage applies to the ZC pin. Through the internal clamping

network, the voltage at the pin is clamped to certain level.

Data Sheet

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

The ZC counter has a minimum value of 0 and maximum value of 7. After the internal MOSFET is turned off,

every time when the falling voltage ramp of on ZC pin crosses the V_ZCCT(100 mV) threshold, a zero crossing is

detected and ZC counter will increase by 1. It is reset every time after the DRIVER output is changed to high.

The voltage V_ZCis also used for the output overvoltage protection. Once the voltage at this pin is higher than the

threshold V_ZCOVPduring off-time of the main switch, the IC is latched off after a fixed blanking time.

To achieve the switch-on at voltage valley, the voltage from the auxiliary winding is fed to a time delay network

(the RC network consists of D_ZC, R_ZC1, R_ZC2and C _ZCas shown in Figure 1) before it is applied to the zero-crossing

detector through the ZC pin. The needed time delay to the main oscillation signal Δt should be approximately

one fourth of the oscillation period, T_OSC(by transformer primary inductor and drain-source capacitor) minus

the propagation delay from the detected zero-crossing to the switch-on of the main switch t_delay

.

푇

(2)

표푠푐

∆푡 =

− 푡_{푑푒푙푎푦}

4

This time delay should be matched by adjusting the time constant of the RC network which is calculated as:

푅_푍퐶1∙ 푅_푍퐶2

(3)

τ_ꢃ푑=C_푍퐶∙

푅_푍퐶1+ 푅_푍퐶2

3.3.2

Ringing suppression time

After MOSFET is turned off, there will be some oscillation on V_DS, which will also appear on the voltage on ZC

pin. To avoid mis-triggering by such oscillations to turn on the MOSFET, a ringing suppression timer is

implemented. This suppression time is depended on the voltage V_ZC. If the voltage V_ZCis lower than the

threshold V_ZCRS, a longer preset time t_ZCRS2is applied. However, if the voltage V_ZCis higher than the threshold, a

shorter time t_ZCRS1is set.

3.3.2.1

Switch on determination

After the gate drive goes to low, it cannot be changed to high during ring suppression time.

After ring suppression time, the gate drive can be turned on when the ZC counter value is higher or equal to

up/down counter value.

However, it is also possible that the oscillation between primary inductor and drain-source capacitor damps

very fast and IC cannot detect enough zero crossings and ZC counter value will not be high enough to turn on

the gate drive. In this case, a maximum off time is implemented. After gate drive has been remained off for the

period of T_OffMax, the gate drive will be turned on again regardless of the counter values and V_ZC. This function

can effectively prevent the switching frequency from going lower than 20 kHz. Otherwise it will cause audible

noise during start up.

3.3.3

Switch off determination

In the converter system, the primary current is sensed by an external shunt resistor, which is connected

between low-side terminal of the main power switch and the common ground. The sensed voltage across the

shunt resistor V_CSis applied to an internal current measurement unit, and its output voltage V1 is compared

with the regulation voltage V_FB. Once the voltage V₁exceeds the voltage V_FB, the output flip-flop is reset. As a

result, the main power switch is switched off. The relationship between the V1 and the V_CSis described by:

(4)

푉 = 퐺_푃푊푀∙ 푉_퐶푆+ 푉_푃푊푀

1

Data Sheet

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Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

To avoid mis-triggering caused by the voltage spike across the shunt resistor at the turn on of the main power

switch, a leading edge blanking time, t_LEB, is applied to the output of the comparator. In other words, once the

gate drive is turned on, the minimum on time of the gate drive is the leading edge blanking time.

In addition, there is a maximum on time, t_OnMax, limitation implemented in the IC. Once the gate drive has been

in high state longer than the maximum on time, it will be turned off to prevent the switching frequency from

going too low because of long on time.

3.4

Current Limitation

There is a cycle by cycle current limitation realized by the current limit comparator to provide an over-current

detection. The source current of the MOSFET is sensed via a sense resistor R_CS. By means of R_CSthe source

current is transformed to a sense voltage V_CSwhich is fed into the pin CS. If the voltage V_CSexceeds an internal

voltage limit, adjusted according to the Mains voltage, the comparator immediately turns off the gate drive.

To prevent the Current Limitation process from distortions caused by leading edge spikes, a Leading Edge

Blanking time (t_LEB) is integrated in the current sensing path.

A further comparator is implemented to detect dangerous current levels (V_CSSW) which could occur if one or

more transformer windings are shorted or if the secondary diode is shorted. To avoid an accidental latch off, a

spike blanking time of t_CSSWis integrated in the output path of the comparator.

3.4.1

Foldback Point Correction

When the main bus voltage increases, the switch on time becomes shorter and therefore the operating

frequency is also increased. As a result, for a constant primary current limit, the maximum possible output

power is increased which is beyond the converter design limit.

To avoid such a situation, the internal foldback point correction circuit varies the V_CSvoltage limit according to

the bus voltage. This means the V_CSwill be decreased when the bus voltage increases. To keep a constant

maximum input power of the converter, the required maximum V_CSversus various input bus voltage can be

calculated, which is shown in Figure 7.

Figure 7

Variation of the V_CSlimit voltage according to the I_ZCcurrent

According to the typical application circuit, when MOSFET is turned on, a negative voltage proportional to bus

voltage will be coupled to auxiliary winding. Inside CoolSET™ Q1, an internal circuit will clamp the voltage on

ZC pin to nearly 0 V. As a result, the current flowing out from ZC pin can be calculated as

Data Sheet

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2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

푉_퐵푈푆∙ 푁_푎

(5)

퐼_푍퐶

=

푅_푍퐶1∙ 푁_푝

When this current is higher than I_{ZC_FS}, the amount of current exceeding this threshold is used to generate an

offset to decrease the maximum limit on V_CS. Since the ideal curve shown in Figure 7 is a nonlinear one, a digital

block in CoolSET^TMQ1 is implemented to get a better control of maximum output power. Additional advantage

to use digital circuit is the production tolerance is smaller compared to analog solutions. The typical maximum

limit on V_CSversus the ZC current is shown in Figure 8.

Figure 8

V_{CS_max}versus I_ZC

3.5

Active Burst Mode

At light load condition, the IC enters Active Burst Mode operation to minimize the power consumption. Details

about Active Burst Mode operation are explained in the following paragraphs.

3.5.1

Entering Active Burst Mode Operation

For determination of entering Active Burst Mode operation, three conditions apply:



the feedback voltage is lower than the threshold of V_FBEB(1.25 V). Accordingly, the peak current sense

voltage across the shunt resistor is 0.17 V;



the up/down counter is N_{ZC_ABM}(7) and

a certain blanking time t_BEB(24 ms).

Once all of these conditions are fulfilled, the Active Burst Mode flip-flop is set and the controller enters Active

Burst Mode operation. This multi-condition determination for entering Active Burst Mode operation prevents

mis-triggering of entering Active Burst Mode operation, so that the controller enters Active Burst Mode

operation only when the output power is really low during the preset blanking time.

3.5.2

During Active Burst Mode Operation

After entering the Active Burst Mode the feedback voltage rises as V_OUTstarts to decrease due to the inactive

PWM section. One comparator observes the feedback signal if the voltage level V_FBBOn(3.6 V) is exceeded. In that

case the internal circuit is again activated by the internal bias to start with switching.

Turn-on of the power MOSFET is triggered by the timer. The PWM generator for Active Burst Mode operation

composes of a timer with a fixed frequency of f_sB(52 kHz, typical) and an analog comparator. Turn-off is

Data Sheet

10

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

resulted if the voltage across the shunt resistor at CS pin hits the threshold VcsB (0.34 V). A turn-off can also be

triggered if the duty ratio exceeds the maximal duty ratio D_maxB(50%). In operation, the output flip-flop will be

reset by one of these signals which come first.

If the output load is still low, the feedback signal decreases as the PWM section is operating. When feedback

signal reaches the low threshold V_FBBOff(3.0 V), the internal bias is reset again and the PWM section is disabled

until next time regulation signal increases beyond the V_FBBOn(3.6 V) threshold. If working in Active Burst Mode

the feedback signal is changing like a saw tooth between V_FBBOffand V_FBBOnshown in Figure 9.

3.5.3

Leaving Active Burst Mode Operation

The feedback voltage immediately increases if there is a high load jump. This is observed by a comparator. As

the current limit is 34% during Active Burst Mode a certain load is needed so that feedback voltage can exceed

V_FBLB(4.5 V). After leaving active burst mode, maximum current can now be provided to stabilize V_OUT. In

addition, the up/down counter will be set to 1 immediately after leaving Active Burst Mode. This is helpful to

decrease the output voltage undershoot.

V_FB

Leaving

Active Burst

Mode

Entering

Active Burst

Mode

V_FBLB

V_FBBOn

V_FBBOff

V_FBEB

Time to 7^thzero and

Blanking Window (t_BEB

t

)

V_CS

Current limit level during

Active Burst Mode

1.0V

V_CSB

V_VCC

t

V_VCCoff

V_O

Max. Ripple < 1%

Figure 9

Signals in Active Burst Mode

Data Sheet

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Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Functional Description

3.6

Protection Functions

The IC provides full protection functions. The following table summarizes these protection functions.

During operation, the VCC voltage is continuously monitored. In case of an under-voltage or an over-voltage,

the IC is reset and the main power switch is then kept off. After the VCC voltage falls below the threshold V_VCCoff

the startup cell is activated. The VCC capacitor is then charged up. Once the voltage exceeds the threshold

V_VCCon, the IC begins to operate with a new soft-start.

,

Table 3

Protection Function

Failure Condition

Protection Mode

Auto Restart

VCC Overvoltage

V_VCC> 25 V & last for 10 μs (normal

mode only)

Auto Restart

VCC Undervoltage/ Short

Optocoupler

V_VCC< 10.5 V

Auto Restart

Overload/Open Loop

V_FB> 4.5 V & last for 30 ms

T_J> 130 °C

Over Temperature (Controller

Junction)

Latch

Output Overvoltage

Short Winding

V_ZCOVP> 3.7 V & last for 100 μs

V_CSSW> 1.68 V & last for 190 ns

In case of open control loop or output over load, the feedback voltage will be pulled up. After a blanking time of

t_{OLP_B}(30 ms), the IC enters auto-restart mode. The blanking time here enables the converter to provide a peak

power in case the increase in V_FBis due to a sudden load increase. This output over load protection is disabled

during burst mode.

During off-time of the power switch, the voltage at the zero-crossing pin is monitored for output over-voltage

detection. If the voltage is higher than the preset threshold V_ZCOVP, the IC is latched off after the preset blanking

time t_ZCOVP. This latch off mode can only be reset if the V_VCC< V_VCCPD

.

If the junction temperature of IC controller exceeds T_jCon(130 °C), the IC enters into OTP auto restart mode. This

OTP is disabled during burst mode.

If the voltage at the current sensing pin is higher than the preset threshold V_CSSWduring on-time of the power

switch, the IC is latched off. This is short-winding protection. The short winding protection is disabled during

burst mode.

During latch-off protection mode, the VCC voltage drops to V_VCCoff(9.85 V) and then the startup cell is activated.

The VCC voltage is then charged to V_VCCon(18 V). The startup cell is shut down again. This action repeats again

and again.

There is also a maximum on time limitation implemented inside the CoolSET™ Q1. Once the gate voltage is high

and longer than t_OnMax, the switch is turned off immediately.

Data Sheet

12

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Electrical Characteristics

4

Electrical Characteristics

Note:

All voltages are measured with respect to ground (Pin 12). The voltage levels are valid if other ratings

are not violated.

4.1

Absolute Maximum Ratings

Note:

Absolute maximum ratings are defined as ratings, which when being exceeded may lead to

destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be

connected to pin 11 (VCC) is discharged before assembling the application circuit. T_a=25 ˚C unless

otherwise specified.

Table 4

Absolute Maximum Ratings

Parameter

Symbol

Limit Values

Unit

Remarks

min.

max.

Drain Source Voltage

V_DS

-

800

V

T_j=25 °C

Pulse drain current, t_plimited by T_jmax

I_{D_Plus}

-

4.9

A

Avalanche energy, repetitive t_ARlimited E_AR

by max. T_j=150 °C¹

0.047

mJ

Avalanche current, repetitive t_AR

limited by max. T_j=150 °C¹

I_AR

-

1.5

A

VCC Supply Voltage

FB Voltage

V_VCC

V_FB

-0.3

3

27

V

5.5

-

V

ZC Voltage

V_ZC

V_CS

I_ZCMAX

T_j

V

CS Voltage

V

Maximum current out from ZC pin

Junction Temperature

Storage Temperature

mA

°C

-40

150

Controller & CoolMOS™

T_S

-55

-

150

85

°C

Thermal Resistance

R_thJA

K/W

With 232mm²2oz copper

area on drain pin, T_a=25˚C

(Junction–Ambient)

Thermal Resistance

(Junction–Drain)

R_thJl

-

20

K/W

^°C

With 232mm²2oz copper

area on drain pin, T_a=25˚C

Soldering temperature, wavesoldering T_sold

only allowed at leads

260

1.6mm (0.063in.) from case

for 10s

ESD Capability (incl. Drain Pin)

V_ESD

-

2

kV

Human body model²

¹Repetitive avalanche causes additional power losses that can be calculated as P_AV=E_AR*f

²According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kW series resistor

Data Sheet 13

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Electrical Characteristics

4.2

Operating Range

Note:

Within the operating range the IC operates as described in the functional description.

Table 5

Operating Range

Parameter

Symbol

Unit

Remarks

Limit Values

min.

max.

VCC Supply Voltage

V_VCC

V_VCCoff

V_VCCOVP

130

V

Junction Temperature of Controller

T_jCon

-40

°C

Limited by over

temperature protection.

Junction Temperature of CoolMOS™

T_jCoolMOS

-40

150

°C

4.3

Characteristics

Supply Section

4.3.1

Note:

The electrical characteristics involve the spread of values within the specified supply voltage and

junction temperature range TJ from – 40 ^°C to 125 ^°C. Typical values represent the median values,

which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 18 V is assumed.

Table 6

Supply Section

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

max.

Start Up Current

I_VCCstart

-

300

1.22

1.1

1

550

μ A

mA

V_VCC=V_VCCon-0.2 V

V_VCC= 0 V

VCC Charge Current

I_VCCcharge1

5

-

I_VCCcharge20.8

V_VCC= 1 V

I_VCCcharge3

-

V_VCC=V_VCCon-0.2 V

Maximum Input Current of Startup Cell I_DrainIn

-

2

and CoolMOS™

Leakage Current of

I_DrainLeak

-

0.2

50

μ A

V_Drain= 600 V at T_j=100 °C

Startup Cell and CoolMOS™

Supply Current in normal operation

I_VCCNM

I_VCCAR

-

1.5

2.3

-

mA

I_FB= 0 A

Supply Current in

300

μ A

Auto Restart Mode with Inactive Gate

I_FB= 0 A

Supply Current in Latch-off Mode

I_VCClatch

I_VCCburst

-

300

500

-

μ A

Supply Current in Burst Mode with

inactive Gate

950

V_FB= 2.5 V, exclude the

current flowing out from

FB pin

VCC Turn-On Threshold

VCC Turn-Off Threshold

V_VCCon

V_VCCoff

17.0

9.2

18.0

9.85

19.0

10.5

V

Data Sheet

14

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Electrical Characteristics

VCC Turn-On/Off Hysteresis

V_VCChys

-

8.15

-

V

4.3.2

Internal Voltage Reference

Table 7

Internal Voltage Reference

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

4.80 5.00

max.

Trimmed Reference Voltage

V_REF

5.20

V

measured at pin FB

I_FB= 0

4.3.3

PWM Section

Table 8

PWM Section

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

max.

Feedback Pull-Up Resistor

PWM-OP Gain

R_FB

14

23

33

-

kΩ

-

G_PWM

V_PWM

t_OnMax

3.18 3.3

Offset for Voltage Ramp

Maximum on time in normal operation

0.6

22

0.7

30

-

V

41

μs

4.3.4

Current Sense

Table 9

Current sense

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

0.97 1.03

max.

Peak current limitation in normal

operation

V_CSth

1.09

V

Leading Edge Blanking time

t_LEB

200

330

460

ns

V

Peak Current Limitation in Active Burst

Mode

V_CSB

0.29 0.34

0.39

4.3.5

Soft Start

Table 10

Soft Start

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

max.

Soft-Start time

t_SS

8.5

12

3

-

ms

V

1

t_{SS_s}

Soft-start time step

-

1

Internal regulation voltage at first step V_SS1

1.76

¹The parameter is not subjected to production test - verified by design/characterization

Data Sheet 15

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Electrical Characteristics

1

Internal regulation voltage step at soft V_{SS_S}

start

-

0.56

-

V

4.3.6

Foldback Point Correction

Table 11

Foldback Point Correction

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

0.350 0.500

max.

0.621

2.2

ZC current first step threshold

ZC current last step threshold

CS threshold minimum

I_{ZC_FS}

I_{ZC_LS}

V_CSMF

mA

1.3

-

1.7

0.66

-

V

I_zc=2.2 mA, V_FB=3.8 V

4.3.7

Digital Zero Crossing

Table 12

Digital Zero Crossing

Symbol

Parameter

Unit Test Condition

Limit Values

min. typ.

max.

Zero crossing threshold voltage

Ringing suppression threshold

Minimum ringing suppression time

Maximum ringing suppression time

V_ZCCT

V_ZCRS

t_ZCRS1

t_ZCRS2

50

-

100

0.7

170

mV

V

-

1.62 2.5

4.5

μs

V

V_ZC> V_ZCRS

V_ZC< V_ZCRS

-

25

-

Threshold to set Up/Down Counter to V_FBR1

3.9

one

Threshold for downward counting at V_FBZHL

low line

Threshold for upward counting at low V_FBZLL

line

Threshold for downward counting at V_FBZHH

high line

-

3.2

2.5

2.9

-

V

Threshold for upward counting at

highline

V_FBZLH

I_ZCSH

I_ZCSL

-

2.3

1.3

0.8

-

V

ZC current for IC switch threshold to

high line

mA

ZC current for IC switch threshold to

low line

Counter time¹

t_COUNT

t_OffMax

-

48

42

-

ms

Maximum restart time in normal

30

57.5

μs

¹The parameter is not subjected to production test - verified by design/characterization

Data Sheet 16

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Electrical Characteristics

4.3.8

Active Burst Mode

Table 13

Digital Zero Crossing

Parameter

Symbol

Unit Test Condition

Limit Values

min. typ.

max.

Feedback voltage for entering Active

V_FBEB

-

1.25

7

-

V

Minimum Up/down value for entering N_{ZC_ABM}

Active Burst Mode

Blanking time for entering Active

Burst Mode

t_BEB

-

24

-

ms

V

Feedback voltage for leaving Active

Burst Mode

V_FBLB

4.5

Feedback voltage for burst-on

Feedback voltage for burst-off

V_FBBOn

V_FBBOff

f_sB

-

3.6

3.0

52

-

V

-

V

Fixed Switching Frequency in Active

Burst Mode

39

65

kHz

Max. Duty Cycle in Active Burst

Mode

D_maxB

-

0.5

-

4.3.9

Protection

Table 14

Protection

Parameter

Symbol Limit Values

min. typ.

Unit Test Condition

max.

26.0

-

VCC overvoltage threshold

V_VCCOVP24.0 25.0

V

Over Load or Open Loop Detection

threshold for OLP protection at FB pin

V_FBOLP

-

4.5

Over Load or Open Loop Protection

Blanking Time

t_{OLP_B}

20

30

44

3.84

-

ms

V

Output Overvoltage

detectionthreshold at the ZC pin

V_ZCOVP

3.55 3.7

Blanking time for Output Overvoltage t_ZCOVP

protection

-

100

μs

Threshold for short winding

V_CSSW

t_CSSW

1.63 1.68

1.78

-

V

Blanking time for short-winding

protection

Over temperature protection¹

-

190

ns

T_jCon

130

5.2

140

-

150

7.8

°C

Power Down Reset threshold for

Latched Mode

V_VCCPD

°C

After Latched Off Mode is

entered

¹The parameter is not subjected to production test - verified by design/characterization

Data Sheet 17

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Electrical Characteristics

Note:

The trend of all the voltage levels in the Control Unit is the same regarding the deviation except V_VCCOVP

& V_VCCPD.

4.3.10

CoolMOS™ Section

Table 15

CoolMOS™ Section

Parameter

Symbol

Unit Test Condition

Limit Values

min.

typ.

max.

Drain Source Breakdown Voltage

Drain Source On-Resistance

V_(BR)DSS

800

870

-

V

T_j= 25 °C

T_j= 110 °C

Ω

R_DSon

-

2.26

5.02

6.14

2.62

5.81

7.10

T_j= 25 °C

T_j=125 °C¹

T_j=150 °C¹at I_D= 0.81 A

Effective output capacitance, energy C_o(er)

-

16.3¹

-

pF

ns

V_DS= 0 V to 480 V

30²

Rise Time

Fall Time

t_rise

t_fall

30²

¹The parameter is not subjected to production test - verified by design/characterization

²Measured in a Typical Flyback Converter Application

Data Sheet

18

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

CoolMOS™ Performance Characteristics

5

CoolMOS™ Performance Characteristics

Figure 10 Safe Operating Area (SOA) curve for ICE2QR2280G-1

Figure 11 Power dissipation; P_tot=f(T_a)

Data Sheet

19

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

CoolMOS™ Performance Characteristics

Figure 12 Drain-source breakdown voltage; V_BR(DSS)=f(T_j), I_D=0.25mA

Data Sheet

20

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Input Power Curve

6

Input Power Curve

Two input power curves give typical input power versus ambient temperature are showed below; Vin = 85 ~

265V_AC(Figure 13) and Vin = 230 V_AC(Figure 14). The curves are derived based on a typical discontinuous mode

flyback model which considers 150 V maximum secondary to primary reflected voltage (high priority). The

calculation is based on 232mm²copper area as heatsink for the device. The input power already includes power

loss at input common mode choke and bridge rectifier and the CoolMOS^TM. The device saturation current

(I_{D_plus}@T_j=125°C) is also considered.

To estimate the out power of the device, it is simply multiplying the input power at a particular ambient

temperature with the estimated efficiency for the application. For example, a wide range input voltage (Figure

13), operating temperature is 50 °C, estimated efficiency is 80 %,the output power is 24 W (30 W*0.8).

Figure 13 Input power curve V_IN=85~265 V_AC; P_in=f(T_a)

Figure 14 Input power curve V_IN=230 V_AC; P_in=f(T_a)

Data Sheet

21

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Outline Dimension

7

Outline Dimension

Figure 15 PG-DSO-12 (Pb-free lead plating Plastic Dual-in-Line Outline)

Data Sheet

22

Revision 2.4

2017-09-12

Quasi-Resonant, 800 V CoolSET™ in DS0-12 Package

Marking

8

Marking

Figure 16 Marking for ICE2QR2280G-1

Revision History

Major changes since the last revision

Page or Reference Description of change

1, 23

Revise wrong marking text

Data Sheet

23

Revision 2.4

2017-09-12

Trademarks of Infineon Technologies AG

AURIX™, C166™, CanPAK™, CIPOS™, CoolGaN™, CoolMOS™, CoolSET™, CoolSiC™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, DrBlade™, EasyPIM™,

EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, Infineon™, ISOFACE™, IsoPACK™,

i-Wafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™, POWERCODE™, PRIMARION™, PrimePACK™,

PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, SPOC™, TEMPFET™,

thinQ!™, TRENCHSTOP™, TriCore™.

Trademarks updated August 2015

Other Trademarks

All referenced product or service names and trademarks are the property of their respective owners.

IMPORTANT NOTICE

The information given in this document shall in no For further information on the product, technology,

Edition 2017-09-12

event be regarded as a guarantee of conditions or delivery terms and conditions and prices please

Published by

characteristics (“Beschaffenheitsgarantie”) .

contact your nearest Infineon Technologies office

(www.infineon.com).

Infineon Technologies AG

81726 München, Germany

With respect to any examples, hints or any typical

values stated herein and/or any information

regarding the application of the product, Infineon

Technologies hereby disclaims any and all

warranties and liabilities of any kind, including

without limitation warranties of non-infringement

of intellectual property rights of any third party.

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the types in question please contact your nearest

Infineon Technologies office.

Do you have a question about this

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product information given in this document with

respect to such application.


型号：	ICE2QR2280G-1
厂家：	Infineon
描述：	集成电源管理 IC，具有 800V 雪崩能力 CoolMOS™、启动单元和准谐振电流模式反激 PWM 控制器，采用 DSO-16/12 封装。适用于 25.5W SMPS 设计。该派生型号 UVLO 电压低 (9.85V)，更易于用于优化系统设计。准谐振 CoolSET™ 系列产品持续支持灵活设计和小型化。全新系列产品基于成功的 F3 CoolSET™，具有更高的效率和更好的电磁干扰表现。数字频率降低功能在负载减小时运行稳定，折返校正确保将最大功率限制在 SMPS 设计师所需容差范围内。在低功耗条件下支持有源突发模式，处于市场领先地位，拥有同类产品中极为优秀的待机功耗。控制器信息通信管理开关光电二极管
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