ICL5102HV [INFINEON]
Integrated two-stage PFC + LLC/LCC resonant half-bridge controller for LED drivers in DSO-19 package;
| 型号： | ICL5102HV |
| 厂家： | 
Infineon |
| 描述： | Integrated two-stage PFC + LLC/LCC resonant half-bridge controller for LED drivers in DSO-19 package 功率因数校正 |
| 文件： | 总34页 (文件大小：1827K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICL5102HV PFC + Resonant Half-Bridge
Controller for LED Drivers
2nd Generation
Datasheet
Rev1.2
Features
Integrated two stage combination controller allows for reduced number of external components, optimizes
Bill of Materials (BOM) and form factor.
PFC controller with Critical Conduction Mode (CrCM) + Discontinuous Conduction Mode (DCM)
Resonant Half-Bridge (HB) controller with fixed or variable switching frequency control
Maximum 500 KHz HB switching frequency and soft-start frequency up to 1.3 MHz
Resonant HB Burst Mode (BM) ensures power limitation and low standby power < 300mW.
Supports universal AC input voltage (90 to 480 Vrms) nominal
Excellent system efficiency up to 94%
THD optimization ensures Low harmonic distortion (Total Harmonic Distortion (THD) < 5%) down to 30%
nominal load.
Integrated High Side MOSFET driver
Comprehensive set of protection features with auto-restart reaction:
Input brown-out protection
PFC bus over-voltage protection
PFC over-current protection
Output over-voltage protection (OVP)
Output over-current/short circuit protection (OCP)
Output over-power/over-load protection (OPP)
Capacitive mode protection
External over-temperature protection (OTP)
Potential applications
Offline LED Drivers for commercial and industrial lighting up to 350 W
High density AC/DC power supply
Product validation
Product Type
Package
ICL5102HV
PG-DSO-19
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Description
The ICL5102HV is a highly integrated multi-mode (CrCM and DCM) PFC and resonant HB combination controller.
The integration of PFC and HB into a single controller enables reduction of external components and optimizes
performance by harmonized operation of the two stages.
The two-stage approach divides the PFC responsibilities from the output current regulations functions. This
ensures low variation in the output voltage and current and allows for low THD, high power factor and a greater
ability to withstand AC line perturbations. The multi-mode operation of PFC converter provides excellent
efficiency over the whole load range.
Resonant HB converter supports both LLC and LCC topologies with fixed or variable switching frequency control
for highest efficiency and the BM enables the low standby power consumption.
A comprehensive set of protection features with auto-restart ensures the highest safety and reliability of the
components and overall system.
The following Figure shows a typical LED driver application using ICL5102HV with PFC+LCC topology:
Figure 1
ICL5102HV Typical Application with PFC+LCC Topology
Table of contents
Features ........................................................................................................................................ 1
Potential applications..................................................................................................................... 1
Product validation.......................................................................................................................... 1
Description .................................................................................................................................... 2
Table of contents............................................................................................................................ 2
1
2
Pin Configuration and Description ........................................................................................... 4
Functional Block Diagram ....................................................................................................... 6
3
3.1
3.2
Functional Description............................................................................................................ 7
IC Power Up .............................................................................................................................................7
Multi-Mode PFC Controller......................................................................................................................7
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
3.2.1
Control Scheme..................................................................................................................................7
PFC Soft-start ................................................................................................................................8
PFC Multi-Mode Control................................................................................................................8
PFC THD Correction ....................................................................................................................10
PFC Bus voltage Sensing..................................................................................................................10
Input voltage sensing.......................................................................................................................11
PFC Inductor Peak Current limitation .............................................................................................11
PFC Protection features...................................................................................................................11
PFC Bus Under-voltage Protection.............................................................................................12
PFC Bus Over-voltage Protection Level 1...................................................................................12
PFC Bus Over-voltage Protection Level 2...................................................................................12
PFC Open Control Loop Protection............................................................................................12
PFC Inductor Over-current Protection .......................................................................................12
Input Brown-out Protection .......................................................................................................13
Resonant Half-Bridge Controller ..........................................................................................................13
Control Scheme................................................................................................................................13
HB Frequency Control via CCO...................................................................................................13
HB Controller Frequency Setting................................................................................................14
HB Soft-Start Control via TCO ....................................................................................................15
HB Burst Mode operation ...........................................................................................................16
HB Self-Adaptive Dead Time............................................................................................................17
HB Protection Features....................................................................................................................18
HB Over-Current Protection Level 1 (OCP1)...............................................................................18
HB Over-Current Protection Level 2 (OCP2)...............................................................................18
HB Output Over-Voltage Protection...........................................................................................19
HB Capacitive Mode Protection..................................................................................................19
Other Protection Features ....................................................................................................................20
External Over-Temperature Protection (OTP) ................................................................................20
3.2.1.1
3.2.1.2
3.2.1.3
3.2.2
3.2.3
3.2.4
3.2.5
3.2.5.1
3.2.5.2
3.2.5.3
3.2.5.4
3.2.5.5
3.2.5.6
3.3
3.3.1
3.3.1.1
3.3.1.2
3.3.1.3
3.3.1.4
3.3.2
3.3.3
3.3.3.1
3.3.3.2
3.3.3.3
3.3.3.4
3.4
3.4.1
4
ICL5102HV Operation Flow Chart ............................................................................................22
5
5.1
5.2
5.3
Electrical Characteristics .......................................................................................................23
Package Characteristics........................................................................................................................23
Absolute Maximum Ratings ..................................................................................................................23
Operating Conditions............................................................................................................................24
DC Electrical Characteristics.................................................................................................................25
Power Supply Characteristics..........................................................................................................25
PFC Stage Characteristics................................................................................................................26
HB Stage Characteristics..................................................................................................................28
5.4
5.4.1
5.4.2
5.4.3
6
Package Dimensions..............................................................................................................32
Revision history.............................................................................................................................33
Datasheet
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2nd Generation
Pin Configuration and Description
1
Pin Configuration and Description
ICL5102HV pin assignments and basic pin description are shown below in the Figure 2 and Table 1.
1
2
20
19
18
17
16
15
14
13
12
11
LSGD
LSCS
N.C.
HSGD
HSVCC
HSGND
3
VCC
4
GND
5
PFCGD
PFCCS
PFCZCD
PFCVS
N.C.
6
OVP
BO
7
8
OTP
BM
N.C.
9
10
RF
PG-DSO-19-1 (300mil)
Figure 2
Pinning of ICL5102HV
Pin Definitions and Functions
Table 1
Name
LSGD
Pin
Type
Function
HB low side gate driver
1
O
Output for directly driving the HB low side MOSFET via a resistor
LSCS
2
I
HB current sense
Connected to an external shunt resistor and the source of the HB low side
MOSFET
VCC
3
4
5
6
7
I
Positive power supply
IC power supply
GND
-
Ground
IC Ground
PFCGD
PFCCS
PFCZCD
O
I
PFC gate driver
Output for directly driving the PFC MOSFET via a resistor
PFC current sense
Connected to an external shunt resistor and the source of the PFC MOSFET
PFC zero-crossing detection
I
Connected to the PFC auxiliary winding via a resistor for PFC inductor current
zero-crossing detection
PFCVS
8
I
PFC bus voltage sense
Connected to a high impedance resistor divider from the PFC controller output
for bus voltage sensing
N.C.
RF
9
-
I
Not Connected
10
HB minimum switching frequency setting
Connected via an external resistor to GND for HB minimum switching
frequency setting
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Pin Configuration and Description
Name
N.C.
BM
Pin
11
Type
Function
-
I
Not Connected
12
Burst Mode (BM) enter/exit switching frequency setting
Connected to an opto-coupler and to the RF pin with an external resistor for
BM enter/exit setting
OTP
BO
13
14
15
I
I
I
Over Temperature Protection (OTP)
Connected to an external Negative Temperature Coefficient thermistor (NTC)
for external over temperature protection
Brown in/out detection
Connected to the rectified input voltage via an external resistor for input
brown in/out detection
OVP
Output Over Voltage Protection (OVP)
Connected to the HB auxiliary winding via a resistor divider and diode for OVP
of the secondary output voltage
-
16
17
-
-
Creepage Distance
HSGND
High side ground
Ground for floating high side driver of HB
High side VCC power supply
HSVCC
18
I
Power supply of the high side floating driver of HB, supplied via bootstrap
circuit
HSGD
N.C.
19
20
O
-
High side floating gate driver
Output for directly driving the HB floating high side MOSFET via a resistor.
Not Connected
The ICL5102HV pin connection schematic is shown in the following Figure 3:
Figure 3
ICL5102HV Pin Connection
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Block Diagram
2
Functional Block Diagram
Figure 4
ICL5102HV Functional Block Diagram
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3
Functional Description
Functional description section provides an overview of the integrated functions. It includes:
ICL5102HV power up
Multi-mode PFC controller
Resonant HB controller
The parameters and equations are based on typical values at TA = 25 °C. The correlated minimum and maximum
values are shown in the electrical characteristics in chapter 5.
3.1
IC Power Up
ICL5102HV has four power supply pins: VCC, GND, HSVCC and HSGND:
Normal start-up operation of ICL5102HV requires a positive voltage at pin VCC higher than the turn-on
threshold VCC_on. After the ICL5102HV is active, the Vcc voltage should remain between the VCC_on and VCC_off
Once the voltage drops below VCC_off, under-voltage lock out (UVLO) will occur and IC operation is disabled.
.
HSVCC and HSGND power pins are the power supply for the integrated floating high side driver, usually
derived using an external boot strap circuit. The high side driver is active after the voltage between pin HSVCC
and HSGND is higher than the turn-on threshold VHSVCC_on. Once this voltage drops below VHSVCC_off in the normal
operation, the high side driver is disabled.
3.2
Multi-Mode PFC Controller
The PFC controller ensures high power quality by maximizing the power factor (PF) and minimizing Total
Harmonic Distortion (THD). It is designed in a boost topology to provide a constant high DC voltage for the HB
controller.
3.2.1
Control Scheme
During normal to heavy load conditions, PFC bus voltage regulation is achieved using CrCM with a constant on-
time control. The PFC MOSFET on-time is proportional to the PFC output power and determined by the PFC choke
inductance LPFC, the input voltage Vin_rms, the applied PFC load PO_PFC and the PFC converter efficiency ηPFC. This is
given by:
2 ∗ ꢀ푂_푃퐹퐶 ∗ 퐿푃퐹퐶
푡표푛_푃퐹퐶
=
푉ꢁ
∗ ɳ푃퐹퐶
푖푛_푟푚푠
ICL5102HV PFC controller has an integrated PI compensator which calculates the PFC on-time according to the
error between the value at PFCVS pin and the reference value VPFC_ref = 2.5 V. A notch filter before the compensator
filters out the double AC line frequency ripple in the bus voltage and stabilizes the controller loop.
To support light load condition, DCM is implemented for efficient operation.
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.1.1
PFC Soft-start
After the voltage at pin VCC is higher than the threshold VCC_on, PFC controller will initiate a soft-start to minimize
the stress on the input filter, PFC MOSFET, PFC choke and diode when the following conditions are fulfilled:
Brown-in: the voltage at Brown-Out pin (BO) must be higher than VBO_in = 1.4 V
PFC open-loop not detected: the voltage at pin PFCVS must be higher than VPFCVSUV2 = 12.5%*VPFC_ref = 0.31 V
PFC output over-voltage not detected: the voltage at pin PFCVS must be lower than VPFCVSUV2 = 105%* VPFC_ref
2.63 V
=
Other protections (e.g. OTP or OVP) not present
ICL5102HV PFC soft-start is implemented by increasing PFC MOSFET on-time from tPFC_on_initial to tPFC_on_max = 22 us
every 280 us. The initial PFC on-time tPFC_on_initial is dependent on the input voltage sensed at the BO pin. Once the
voltage at pin PFCVS reaches the threshold VPFC_UV2 = 95%* VPFC_ref = 2.375V, soft-start is completed. At this time
normal operation on-time control takes place via the integrated PI compensator.
3.2.1.2
PFC Multi-Mode Control
During CrCM operation of the PFC, the PFC MOSFET is turned on with a constant on-time throughout the
complete AC half cycle and the off-time is varying depending on the instantaneous value of the input AC voltage
amplitude. Therefore, the switching frequency is changing within each AC half cycle with the lowest switching
frequency at the peak of the AC input voltage and the highest switching frequency near the zero-crossings. As
shown in the Figure 5, a new switching cycle starts with a tiny delay after the inductor current reaches zero.
Figure 5
Switching Cycle of ICL5102HV Critical Conduction Mode PFC
PFC CrCM is ideal for full and heavy load conditions, where the constant on-time is large. As load decreases
and/or the input AC input peak voltage increases towards the magnitude of the PFC output bus voltage, on-times
reduces (switching frequency increases), and PFC switching losses increase. This results in poor efficiency at
light load and/or high AC line conditions.
To help minimize switching losses during this condition and to optimize light load efficiency, the ICL5102HV PFC
controller switches from CrCM to DCM mode. This transition occurs once the PFC MOSFET on-time reduces below
1 us. In DCM operation, the switching frequency can be further reduced by skipping switching cycles once the
PFC inductor current reaches zero. As shown in the Figure 6, the inserted delay is the switching time (from PFC
gate on until the PFC inductor current decreases to zero) multiplied with an internal factor. Once the PFC on-time
increases to 4 us in the DCM operation, ICL5102HV will switch back to CrCM. The transferred power is regulated
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
both in CrCM and DCM operation. The on-time hysteresis between the two modes (overlapped area) ensures the
smooth mode change as shown in the Figure 7.
Figure 6
ICL5102HV PFC Mode Change from CrCM to DCM
Figure 7
ICL5102HV Operating Frequency and On-Time in CrCM and DCM
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.1.3
PFC THD Correction
The input AC current becomes most distorted in the area when zero-crossings of AC input voltage occurs. In order
to ensure the sinusoidal current waveform in this area, the ICL5102HV extends the PFC on-time dynamically up
to two times of PFC maximum on-time according to the instantaneous value of the input voltage amplitude. The
detection of AC input voltage zero-crossings is realized through the PFC auxiliary winding. When the voltage
across the PFC auxiliary winding after PFC MOSFET turns-off reaches the maximum value, AC zero-crossings is
detected. The concept of THD correction is shown in the following Figure 8.
Figure 8
PFC THD Correction
3.2.2
PFC Bus voltage Sensing
The PFC output bus voltage is scaled down using a resistor divider and sensed at the pin PFCVS pin as shown in
the Figure 9. A good quality ceramic filter capacitor should be placed as close as possible at the pin to filter any
high frequency switching noise. This filter capacitor ensures no false PFC bus voltage protections are triggered
due to noise perturbations.
Figure 9
ICL5102HV PFC Bus Voltage Sensing
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.3
Input voltage sensing
As shown in the Figure 10, the AC input voltage is sensed at the BO pin with a resistor divider which scales down
the full wave rectified AC line voltage. A smooth capacitor CBO with a high ohmic resistor RBO1 are strongly
recommended direct after the full wave rectifier diodes so that the peak value of AC input voltage is sensed. As
the peak value of AC input voltage is not distorted when the input current is near zero (e.g. in case of brown-out)
compared to the RMS value.
Figure 10
ICL5102HV Input Voltage Sensing
The voltage at the BO pin which represents the peak voltage of the AC input has feed-forward control on the PFC
converter.
It decides the initial on-time of the initial PFC soft-start.
In the light load condition, the PFC on-time is dependent on the input voltage.
The brown-in and brown-out are implemented by sensing the voltage at BO pin. The conditions are defined as
following:
Brown-in: the voltage at pin BO is higher than VBO_in = 1.4 V.
Brown-out: the voltage at pin BO is lower than VBO_out = 1.2 V in the normal operation.
3.2.4
PFC Inductor Peak Current limitation
The PFC inductor peak current through the PFC MOSFET is monitored via the PFC shunt resistor RPFCCS to limit the
maximum power through the PFC inductor, MOSFET and the freewheeling diode. Once the voltage across the
shunt resistor exceeds the over-current threshold VPFC_OCP1 = 1.0 V for longer than the blanking time (including
propagation delay) tPFC_OCP1_blanking = 200 ns, the PFC MOSFET is turned off immediately. The next PFC switching
cycle will be initialized on either PFC ZCD or maximum period time out. This peak current limitation is active in
every switching cycle.
3.2.5
PFC Protection features
Protections features are triggered if fault conditions are present longer than the blanking time. The controller
may continue operation after exceeding protection threshold because of blanking time as shown in Figure 11.
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
Figure 11
Excess of threshold due to Blanking Time
3.2.5.1
PFC Bus Under-voltage Protection
PFC bus under-voltage is monitored at the PFCVS pin.
In the normal operation, the PFCVS pin voltage is sensed and compared to the under-voltage threshold VPFC_UV1
= 75%* VPFC_ref = 1.88 V. Once the pin voltage is below this threshold for longer than the blanking time, PFC stops
switching and ICL5102HV will enter auto-restart.
3.2.5.2
PFC Bus Over-voltage Protection Level 1
PFC bus over-voltage level 1 is monitored at the PFCVS pin.
The PFCVS pin voltage is sensed and compared to the over-voltage threshold VPFC_OV1 = 109%* VPFC_ref = 2.73 V. Once
the pin voltage is above this threshold, PFC will stop switching within 5 us. As long as the pin voltage drops below
VPFC_OV = 105%* VPFC_ref = 2.63 V, PFC resumes operation.
3.2.5.3
PFC Bus Over-voltage Protection Level 2
PFC bus over-voltage level 2 is monitored at the PFCVS pin.
The PFCVS pin voltage is sensed and compared to the over-voltage threshold VPFC_OV2 = 115%* VPFC_ref = 2.88 V. Once
the pin voltage is above this threshold for longer than the blanking time, both PFC and HB stop switching and
ICL5102HV will enter auto-restart.
3.2.5.4
PFC Open Control Loop Protection
PFC control loop open is monitored at the PFCVS pin.
The PFCVS pin voltage is sensed and compared to the under-voltage threshold VPFC_UV2 = 12.5%* VPFC_ref = 0.31 V.
In the normal operation, once the pin voltage is below this threshold for longer than the blanking time, both
PFC and HB stop switching and ICL5102HV will enter auto-restart.
In the IC power up phase, if the pin voltage is below this threshold, ICL5102HV will not start-up.
3.2.5.5
PFC Inductor Over-current Protection
PFC inductor over-current is monitored at the PFCCS pin.
The voltage across the PFC current sense shunt resistor is sensed at the PFCCS pin and compared to the over-
current threshold VPFC_OCP1 = 1.0 V. Once the pin voltage is above this threshold for longer than the blanking time
tPFC_OCP1_blanking = 200 ns, the PFC MOSFET is turned off in the current switching cycle.
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2nd Generation
Functional Description
3.2.5.6
Input Brown-out Protection
Input brown-out is monitored at the BO pin.
The BO pin voltage is sensed and compared to the brown-out threshold VBO_out = 1.2V.
In the normal operation, once the pin voltage is below this threshold for longer than the blanking time
tblanking_BO = 50ms, both PFC and HB stop switching and ICL5102HV will enter auto-restart. Once the pin
voltage is higher than VBO_in = 1.4V, normal operation starts (brown-in).
In the IC power up phase, if the pin voltage is below this threshold, ICL5102HV will not start-up.
3.3
Resonant Half-Bridge Controller
Resonant Half-Bridge (HB) topologies reduce losses and switching noise in the converter compared to traditional
“Hard Switching” topologies. This is accomplished by soft commutation in a sinusoidal manner and zero voltage
switching (ZVS) of HB MOSFETs.
Soft commutation of the power devices allows for increased converter operating switching frequency and
smaller sizes of the passive components such as transformers and filters. ICL5102HV provides the independent
control of resonant HB (e.g. LLC or LCC) for constant voltage (CV) or constant current (CC) output. It supports
both fixed and variable switching frequency control.
3.3.1
Control Scheme
The ICL5102HV resonant HB control is realized through a TCO (Time Controlled Oscillator) in the soft-start phase
and a current controlled oscillator (CCO) in the regulated normal operation. During light load operation the
ICL5102HV will enter Burst Mode (BM) to maximize light-load efficiency. This is described as following:
HB switching frequency control via the Current Controlled Oscillator (CCO)
HB controller frequency setting
Soft-start control via a Time Controlled Oscillator (TCO)
HB Burst Mode (BM) operation
3.3.1.1
HB Frequency Control via CCO
During normal operation, ICL5102HV HB controller uses CCO to determine the switching frequency. The
switching frequency is determined by current IRF that flows out of the RF pin. The RF pin maintains a constant
voltage of VRF = 2.5 V. This voltage together with the voltage at pin VBM, resistors RBM and RRF, and the opto-coupler
define the current flowing out of the RF pin as shown in the following formula and Figure 12:
푉푅퐹
퐼푅퐹 = 퐼1 + 퐼ꢁ = 퐼퐵푀 + 퐼푂푃
+
ꢂ푅퐹
Figure 12
ICL5102HV RF Pin Current Definition
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2nd Generation
Functional Description
The CCO of ICL5102HV HB controller is defined linearly with the constant slew rate CFC as shown in Figure 13:
ꢃ퐹퐶 = 400 퐾퐻푧/ꢄ퐴
Figure 13
CCO of ICL5102HV in Normal Operation
3.3.1.2
HB Controller Frequency Setting
Both TCO and CCO of ICL5102HVHV operate based on the defined minimum and maximum HB operating
frequency.
Minimum HB operating frequency fHB_min:
It is defined in the HB resonant tank calculation to prevent HB operation in the capacitive region where
reverse gain occurs and HB MOSFETs ZVS is lost. ICL5102HV HB controller operates with fHB_min if the minimum
current IRF_min flows out of the RF pin according to the CCO:
푓ꢅ퐵_푚푖푛 = ꢃ퐹퐶 ∗ 퐼푅퐹_푚푖푛
This minimum current occurs when the opto-coupler is off IOP = 0 and the voltage of the pin is clamped at
VBM_max = 2.25 V:
푉푅퐹 푉푅퐹 − 푉퐵푀_푚푎푥
퐼푅퐹_푚푖푛
=
+
ꢂ푅퐹
ꢂ퐵푀
Maximum HB operating frequency fHB_max
:
ICL5102HV HB controller increases the HB operating frequency as the output load reduces. However above
the maximum operating frequency fHB_max the output power cannot be reduced furthermore and HB controller
enters BM. According to the CCO, fHB_max is defined with the maximum current IFR_max
:
푓ꢅ퐵_푚푎푥 = ꢃ퐹퐶 ∗ 퐼푅퐹_푚푎푥
ICL5102HV enters BM when the voltage at BM pin is VBM_entry = 0.75V:
푉푅퐹 − 푉퐵푀_푒푛ꢆ푟푦
푉푅퐹
퐼푅퐹_푚푎푥
=
+
ꢂ푅퐹
ꢂ퐵푀
The minimum and maximum HB operating frequencies must fulfill the following condition:
푓ꢅ퐵_푚푎푥 < 7 ∗ 푓ꢅ퐵_푚푖푛
Both minimum and maximum HB operating frequencies are set together by the external resistors RBM and RRF as
shown in the Figure 12.
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Functional Description
3.3.1.3
HB Soft-Start Control via TCO
ICL5102HV HB controller initializes a soft-start at power up after the bus voltage reaches 75% of nominal value
(when the VSPFC pin reaches the VPFC_UV1 = 75%*VPFC_ref = 1.88 V). During soft-start, the HB switching frequency
reduces with respect to the elapsed time (time controlled oscillator), which is shown in Figure 14:
Figure 14
TCO for Half-Bridge Soft-start
The complete HB soft-start takes maximum 7 ms and is divided into three time phases in which the frequency
reduction has different slew rate:
Soft-start phase I
o
o
The maximum duration of soft-start phase I is tHB_SS1 = 624 us.
The HB soft-start phase I begins with the switching frequency fHB_ss0, which is defined as:
(
)
푓ꢅ퐵_푠푠ꢇ = 4 ∗ 푓푚푎푥 − 푓푚푖푛 + 푓푚푖푛
o
o
The maximum possible soft-start start frequency is fHB_ss_start_max = 1300 KHz.
The HB soft-start phase I ends with the switching frequency fHB_ss1, which is defines as:
(
)
푓ꢅ퐵_푠푠1 = 2.6 ∗ 푓푚푎푥 − 푓푚푖푛 + 푓푚푖푛
Soft-start phase II
o
o
o
The maximum duration of soft-start phase II is tHB_SS2 = 2.5 ms.
The HB soft-start phase II begins with the switching frequency fHB_ss1
.
The HB soft-start phase II ends with the maximum switching frequency fHB_max
.
Soft-start phase III
o
o
o
The maximum duration of soft-start phase III is tHB_SS3 = 3.75 ms.
The HB soft-start phase III begins with the switching frequency fHB_max
The HB soft-start phase III ends with the minimum switching frequency fHB_min
.
.
The voltage at the BM pin is clamped to 0.75 V during soft-start phase I and phase II. Therefore the current flowing
out of the RF pin is constant and the HB switching frequency is only determined by the TCO.
In the soft-start phase III, the voltage at BM pin is ramped up from 0.75 V to 2.25 V and the current flowing out of
the RF pin reduces accordingly. In the meantime, as the secondary side output voltage approaches the target
value, the current flowing through the opto-coupler primary side begins to increase. Once the current through
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2nd Generation
Functional Description
opto-coupler IOP is equal to the current I1 through the resistor RBM so that the current IBM = 0 (see Figure 12), the
soft-start is terminated and the CCO will takes over the control from the TCO.
During soft-start operation, if the voltage at the LSCS pin is greater than the threshold 0.8V, the HB controller will
stop reducing the switching frequency. The switching frequency reduction resumes once the voltage drops
below the threshold.
3.3.1.4
HB Burst Mode operation
ICL5102HV HB controller will enter the BM as the transferred power to output is greater than the output load
demands although the HB is operated at the maximum switching frequency fHB_max. It is recommended to put
ICL5102 into BM in standby (dim-to-off) mode for lowest input standby power.
Figure 15
HB BM Control
As shown in the Figure 15, the BM control is implemented by the sensing the voltage VBM at pin BM:
BM entry:
During normal operation, once the BM pin voltage is lower than VHB_BM_Entry = 0.75V for longer than
VHB_BM_Entry_blanking = 10ms, ICL5102HV will first initialize a soft-off by increasing the HB switching frequency from
fHB_max to fHB_BM. After fHB_BM is reached, both PFC and HB switching are stopped and ICL5102HV is in sleep mode.
4
( )
∗ 푓푚푎푥 − 푓푚푖푛 + 푓푚푖푛
푓ꢅ퐵_퐵푀
=
3
BM burst-on:
During sleep mode, the BM pin voltage VBM increases as the output voltage drops. ICL5102HV will activate both
PFC and HB stages once VBM = 2.25V is reached.
The ICL5102HV HB controller turns on with a switching frequency of fHB_BM and steadily decreases it to fHB_max
to initialize a soft-on. After soft-on, the switching frequency continues to decrease until the BM power
limitation is active.
BM power limitation:
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Functional Description
The ICL5102HV activates power limitation in the BM burst-on phase once the switching frequency fHB_PL is
reached. The transferred power in BM can be adjusted through the resistor RPL from LSCS pin to the HB low
side MOSFET source as shown in the Figure 16. In the BM power limitation phase, the HB switching frequency
is maintained around fHB_PL
.
Figure 16
ICL5102HV Burst Mode Power Limitation
BM burst-off:
Once current flowing through the opto-coupler (as output voltage increasing) is equal to the current I1 through
the resistor RBM which means IBM = 0 (see Figure 12), soft-off operation is initialized by increasing the HB
switching frequency to fHB_BM. After fHB_BM is reached, both PFC and HB stages stop switching and ICL5102HV
enter the sleep mode.
BM exit:
ICL5102HV will exit the BM under 4 different conditions:
o
During BM burst-off:
If a sudden output load-step increase occurs during the burst-off phase (sleep mode) the voltage
at BM pin will increase abruptly. If VBM increases from 2.0 V to 2.25 V within 400 us, ICL5102HV will
exit the BM.
o
During BM burst-on when power limitation is active:
When the ICL5102HV is in the burst-on phase and power limitation is active, the voltage at BM
pin is clamped, and cannot change quickly. Once the voltage change (increasing) ∆VBM = + 100
mV within 8 HB switching cycles, an output load step is detected and ICL5102HV will exit BM.
o
o
During BM burst-on when power limitation is active:
Once the BM burst-on duration is longer than 10 ms, which means that a static load at output
consumes more power than the BM power limitation level, ICL5102HV will exit the BM.
During BM burst-on when power limitation is active:
Once the BM burst-on duration is 2 times longer than the burst-off duration, which means a
higher load at output and the BM is not efficient enough. ICL5102HV will exit the BM.
To disable the HB BM operation, a resistor between the BM pin and the opto-coupler should be added to prevent
the voltage at BM pin to reduce below 0.75 V.
3.3.2
HB Self-Adaptive Dead Time
The dead time between ICL5102HV HB low side (LS) and high side (HS) gate driver turn-on signals is self-adaptive.
The typical range of the dead time adjustment is between 250 and 750 ns. The dead time is measured after the
HS gate driver is turned off until the voltage at pin LSCS drops below -50 mV. This time is then used for the dead
time between LS and HS as shown in the Figure 17.
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Functional Description
Figure 17
HB Self-Adaptive Dead Time
3.3.3
HB Protection Features
3.3.3.1
HB Over-Current Protection Level 1 (OCP1)
HB over-current level 1 is monitored at the LSCS pin.
The voltage across the HB LSCS shunt resistor is sensed at the LSCS pin during the HB low side gate driver turning-
on and compared to the over-current threshold VHB_OCP1 = 0.8 V. Once the voltage exceeds this threshold, the
controller will increase the HB switching frequency cycle by cycle till the maximum switching frequency fHB_maxis
reached. If a HB over-current event occurs (HB OCP1) beyond the blanking time tHB_OCP1_blanking = 50ms, ICL5102HV
will enter auto-restart.
Figure 18
HB Over-current Protection Level 1
3.3.3.2
HB Over-Current Protection Level 2 (OCP2)
HB over-current level 2 is monitored at the LSCS pin.
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2nd Generation
Functional Description
The voltage across the HB low side current sense shunt resistor is sensed at the LSCS pin during the HB low side
gate driver turning-on and compared to the over-current threshold VHB_OCP2 = 1.6 V. Once the voltage exceeds this
threshold for longer than the blanking time tHB_OCP2_blanking = 500ns, both PFC and HB stop switching and ICL5102HV
will enter auto-restart.
3.3.3.3
HB Output Over-Voltage Protection
HB output over-voltage is monitored at the OVP pin.
ICL5102HV provides an independent OVP pin for the output-over voltage protection. This pin should be
connected to the auxiliary winding of the HB transformer as shown in the Figure 19 below:
Figure 19
HB Output OVP Detection Circuit
A resistor divider scales down the auxiliary winding voltage, allowing for auxiliary voltage sensing and OVP
protection. Once the voltage at OVP pin VOVP is higher than VOVP_ref = 2.5 V for longer than tHB_OVP_blank = 5 us, both PFC
and HB stages stop switching and ICL5102HV enters auto-restart.
3.3.3.4
HB Capacitive Mode Protection
The designed impedance of the resonant network is inductive when the minimum HB switching frequency is
above the peak gain frequency. Once the HB switching frequency is below the peak gain frequency, the
impedance of the resonant network becomes capacitive and the HB converter enters capacitive mode.
Capacitive mode occurs most often due to low input voltage to the HB resonant converter, or during an overload
condition on the HB output (shorted or overloaded).
ICL5102HV detects the capacitive mode operation by monitoring the LSCS pin:
Figure 20
HB Capacitive Mode Detection
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2nd Generation
Functional Description
As shown in the Figure 20, once the voltage at the LSCS pin is greater than 1.6 V during turn-on of the HS gate
driver or drops below -50 mV in the second half of LSGD on-time or during the dead time between LS and HS,
capacitive mode operation is detected.
ICL5102HV is able to provide the cycle by cycle frequency control for capacitive mode regulation. This is activated
if the LSCS pin voltage is higher than +50 mV within the first 7% of LSGD on-time. The HB controller will increase
the frequency cycle by cycle till the +50 mV crossing of the LSCS pin voltage shifts behind the 7% threshold as
shown in the Figure 21.
Figure 21
HB Capacitive Mode Regulation
If the capacitive mode operation is detected longer than 620 us despite the capacitive mode control, ICL5102HV
will enter auto-restart.
3.4
Other Protection Features
3.4.1
External Over-Temperature Protection (OTP)
External temperature is sensed at the OTP pin via an external NTC resistor from OTP pin to GND.
The source current out of the OTP pin is IOTP = 100 uA. The current generates a voltage drop on the connected
NTC. Once the voltage at the OTP pin decreases below VOTP_off = 625 mV longer than the blanking time tOTP_blanking
=
620 us in the normal operation, both PFC and HB stages stop switching and ICL5102HV will enter auto-restart.
PFC and HB operations recover after the voltage at the OTP pin is higher than VOTP_start = 703 mV for longer than
tOTP_blanking. This is shown in the Figure 22.
It is recommended to place good quality ceramic capacitor close to the OTP pin to prevent noise from falsely
triggering OTP protection.
To disable the External OTP, a resistor can be added at the OTP pin instead of the NTC to hold the voltage always
higher than VOTP_start = 703 mV.
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Functional Description
Figure 22
External Over-Temperature Protection
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ICL5102HV Operation Flow Chart
4
ICL5102HV Operation Flow Chart
Operating FLOW Chart ICL5102
VCC Clamp OFF
UVLO
VCC < 9.0V
Vcc < 9.0V
Icc < 90µA
VCC Clamp ON when VCC > 16.3V
Monitoring
9.0V < Vcc < 16.3V
Icc < 100µA
VCC < 16.3V
VBO < 1.4V
Power-up
Gate Drives off
9.0V < VCC < 16.3V
Icc approx 4.0mA
VBUS < 12,5%
VBUS > 105%
OTP / OVP
VCC Clamp ON
VCC Clamp OFF
Start-up
VBO < 1.2V
OVP / OTP
PFC Gate ON
Inverter Gates OFF
9.0V < Vcc < 16.3V
VBUS < 75%
t = 500ms
Exempt BO
Fault
Softstart
Inverter Gates ON
9.0V < Vcc < 16.3V
fSoftStart = fSSx
Full Protection
Full Protection:
t > 50ms:
16.3V> Vcc > 9.0V
Gate Drives off
POWER Down
VBO < 1.2V
VPFC > 115%
VLSCS > 0.8V
t > 620µs:
OTP / CapLoad
t > 5.0µs:
OVP
VLSCS > 1.6V
t > 1.0µs
AUTO RESTART
Run
9.0 V < Vcc < 16.3V
f = fRUN
Full Protection
t > 620µs:
VCC < 9.0V
VBM < 0.75V
OTP / CapLoad
t > 5.0µs:
OVP
VLSCS > 1.6V
t > 1.0µs
VCC < 9.0V
BM
ENTRY
t = 10ms
BM Sleep
0.25 < VBM < 2.2V
All Gates OFF
IBM = xxx µA
OVP
VCC < 9.0V
BM EXIT 1 - 4
VBM = 2.2V
IBM = 0µA
BM Pulse
VBUS < 12.5%
VBUS > 109%
Full Protection
VBM < 2.2V
fBM = fRUN (stored)
EXIT 1 bis
EXIT 4
Figure 23
ICL5102HV Operation Flow Chart
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2nd Generation
Electrical Characteristics
5
Electrical Characteristics
Note:
All voltages except the high-side signals are measured with respect to GND (pin 4). The high-side
voltages are measured with respect to HSGND (pin 14). The voltage levels are valid if other ratings
are not violated.
5.1
Package Characteristics
Table 2
Package Characteristics
Parameter
Symbol
Limit Values
Min.
Unit Remarks
Max.
PG-DSO-19 @ TA = 85°C &
PCB Area > 30x20mm
Thermal resistance for PG-
DSO-19
RthJA
—
60
K/W
mm
Creepage distance HSGND
vs OVP pin
DCRHS
2.1
—
5.2
Absolute Maximum Ratings
Note:
Absolute maximum ratings (Table 3) are defined as ratings which when being exceeded may lead
to destruction of the integrated circuit. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding
only one of these values may cause irreversible damage to the integrated circuit. These values are
not tested during production test.
Table 3
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Unit Remarks
Min.
- 5
Max.
6
V
VLSCS
LSCS pin Voltage
ILSCS
- 3
3
mA
LSCS pin Current
VCC+0.3
5
VLSGD
- 0.3
- 75
- 50
V
Internally clamped to 11V
LSGD pin Voltage
mA
mA
< 500 ns
< 100 ns
ILSGD_O_max
ILSGD_I_max
LSGD pin peak source current
LSGD pin peak sink current
400
Voltage externally supplied to pin
VCC
- 0.3
- 5
18.5
5
V
VVcc
Vcc pin internal zener diode
clamp current
IVCC_clamp
mA
VCC+0.3
VPFCGD
- 0.3
- 150
- 100
- 5
V
PFCGD pin voltage
Internally clamped to 11V
< 500 ns
IPFCGD_O_max
IPFCGD_I_max
VPFCCS
5
mA
mA
V
PFCGD pin peak source current
PFCGD pin peak sink current
PFCCS pin voltage
700
6
< 100 ns
IPFCCS
- 3
3
mA
PFCCS pin current
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2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
- 3
Max.
VPFCZCD
IPFCZCD
VPFCVS
VRF
6
V
PFCZCD pin voltage
PFCZCD pin current
PFCVS pin voltage
RF pin voltage
- 5
5
mA
V
- 0.3
- 0.3
- 0.3
- 0.3
- 0.3
- 0.3
- 980
- 40
5.3
5.3
5.3
5.3
5.3
5.3
980
40
V
VOTP
V
OTP pin voltage
VOVP
V
OVP pin voltage
V
VBM
BM pin voltage
VBO
V
BO pin Voltage
HSGND pin voltage
HSGND pin voltage transient
Referring to GND1
Referred to HSGND
VHSGND
dVHSGND /dt
V
V/ns
Voltage externally supplied to pin
HSVCC
VHSVcc
- 0.3
18.0
V
VHSGD
IHSGD_O_max
IHSGD_I_max
TJ
VHSVCC+0.3
HSGD pin voltage
- 0.3
- 75
0
V
Internally clamped to 11V
< 500 ns
HSGD pin peak source current
HSGD pin peak sink current
Junction temperature
Storage temperature
0
mA
mA
°C
°C
W
< 100 ns
400
150
150
1
- 40
- 55
—
TS
PTOT
PG-DSO-19 / Tamb=25°C
Wave Soldering2
Total IC power dissipation
Soldering temperature
TSOLD
—
260
°C
Pin voltages acc. to abs.
maximum ratings3
Latch-up capability
ILU
—
150
mA
Human Body Model4
Charged Device Model5
VESD_HBM
VESD_CDM
ESD Capability HBM
ESD Capability CDM
—
—
2
kV
V
500
5.3
Operating Conditions
The recommended operating conditions are shown for which the DC Electrical Characteristics are valid.
Table 4 Operating Range
1 Limitation due to creepage distance between the high side and low side pins (CTT 900V inside)
2 According to JESD22-A111 Rev A
3 Latch-up capability according to JEDEC JESD78D, TA= 85°C
4 ESD-HBM according to ANSI/ESDA/JEDEC JS-001-2012
5 ESD-CDM according to JESD22-C101F
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2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Max.
Voltage externally supplied to pin
HSVCC
VHSVcc
17.5
V
Referring to HSGND
7.9
VHSGND
VVcc
- 900
8.5
8.5
- 4
900
17.5
18.0
5
V
Referring to GND1
TJ = 25°C
HSGND pin voltage
External supplied VCC
External supplied VCC
LSCS pin voltage
V
VVcc
TJ = 125°C
V
VLSCS
VPFCVS
VPFCCS
IPFCZCD
VOVP
V
In active mode
0
4
V
PFCVS pin voltage
PFCCS pin voltage
PFCZCD pin voltage
OVP pin voltage
- 4
5
V
In active mode
In active mode
- 3
3
mA
V
0
2.5
125
TJ
- 40
°C
Junction temperature
Adjustable HB switching
frequency
fHB
20
500
kHz
@ Tj_max = 125°C / TA = - 40°C
fHB_SS_max
fAC
-
1300
65
kHz
Hz
@ Soft Start
HB Soft-start switching frequency
AC mains input frequency
45
For notch filter
5.4
DC Electrical Characteristics
Note:
The electrical characteristics involve the spread of values given within the specified supply voltage
and junction temperature range TJ from -40 °C to 125 °C. Typical values represent the median
values, which are given in reference to 25 °C. If not otherwise stated, a supply voltage of 15 V and
VHSVCC = 15 V is assumed and the IC operates in active mode. Furthermore, all voltages refer to GND
if not otherwise mentioned.
5.4.1
Power Supply Characteristics
Table 5
Operating Range
Parameter
Symbol
Limit Values
Unit Remarks
Min.
—
Typ.
Max.
120
5.8
IVcc_QU1
IVcc_QU2
VVcc = 8.0V
Vcc Quiescent supply Current 1
Vcc Quiescent supply Current 2
70
µA
VPFCVS > 2.725V
—
4.0
mA
Vcc supply current in sleep
mode
IVcc_sleep
—
100
160
µA
VVcc_On
Vcc turn-on threshold
15.4
8.5
6.7
15.4
3
16.0
9.0
16.6
9.5
7.4
16.6
6
V
VVcc_Off
Vcc turn-off threshold
V
VVcc_Hys
Vcc on-off hysteresis
7.0
V
VVcc_Clamp
IVcc_clamp
IHSGND_leak
Vcc internal clamping voltage
Vcc internal clamping current
High side leakage current
16.3
—
V
IVcc = 2mA
mA
µA
VVcc = 18V
VHSGND = 950V, VGND = 0V
—
0.01
2.0
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Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
HSVcc Quiescent supply
Current 1
IHSVcc_QU1
IHSVcc_QU2
VHSVcc = 8.0V
—
190
280
µA
HSVcc Quiescent supply
Current 2
VHSVcc > VHSVcc_On
—
0.65
1.2
mA
1
1
1
VHSVcc_On
VHSVcc_Off
VHSVcc_Hy
HSVcc turn-on threshold
HSVcc turn-off threshold
HSVcc on-off hysteresis
9.55
7.9
10.3
8.6
11
V
V
V
9.3
2.1
1.4
1.7
5.4.2
PFC Stage Characteristics
Table 6
Electrical Characteristics of the PFCGD Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
0.40
0.40
- 0.20
10.0
7.5
Typ.
Max.
0.92
1.12
0.62
11.6
—
IPFCGD = 5mA
IPFCGD = 20mA
IPFCGD = -20mA
IPFCGD = -20mA
IPFCGD = -1mA / VVCC
IPFCGD = -5mA / VVCC
0.70
0.75
0.30
11.0
—
—
0.75
V
V
V
V
V
V
V
VPFCGDL
PFCGD low voltage
PFCGD high voltage
2
1
VPFCGDH
7.0
0.40
—
1.12
IPFCGD = 20mA / VVCC=5V
VPFCGDLASD
VPFCGDLUVLO
IPFCGDSO
PFCGD active shut down
PFCGD UVLO shut down
PFCGD peak source current
PFCGD peak sink current
IPFCGD = 5mA / VVCC=2V
3+4
0.30
—
1.00
- 100
500
1.60
—
V
mA
mA
2+3
IPFCGDSI
—
—
PFCGD voltage during sink
current
VPFCGDHS
IPFCGD = 3mA
10.8
11.7
12.3
V
tPFCGDR
tPFCGDF
2V > VLSGD < 8V 2
8V > VLSGD > 2V 2
125
20
275
45
580
72
ns
ns
PFCGD rise time
PFCGD fall time
Table 7
Electrical Characteristics of the PFCCS Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
PFC OCP1 comparator
reference voltage
VPFC_OCP1
0.95
1.0
1.05
V
1 Referring to high-side ground (HSGND)
2 VVcc = VVcc_off + 0.3V
3 RLoad = 4Ω and CLoad = 3.3nF
4 This parameter is no subject to production testing – verified by design / characterization
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2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
PFC OCP1 blanking time (incl.
prorogation delay)
tPFC_OCP1_blanking
140
200
260
ns
Pulse width when VPFCCS
> 1.0V
tPFC_LEB
Leading-edge blanking
PFCCS pin bias current
180
250
320
0.5
ns
IPFCCSBIAS
VPFCCS = 1.5V
- 0.5
—
µA
Table 8
Electrical Characteristics of the PFCZCD Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
1.4
0.4
—
Typ.
Max.
1.6
0.6
—
VPFCZCDTHRH
VPFCZCDTHRL
VPFCZCDHY
1.5
0.5
1.0
V
V
V
ZCD reset threshold
ZCD threshold
ZCD hysteresis
Input voltage positive clamping
level
VPFCZCDCLAMPH
IPFCZCD = 2mA
4.1
4.6
5.10
- 1.0
V
V
Input voltage negative
clamping level
VPFCZCDCLAMPL
IPFCZCD = - 2mA
- 1.70
- 1.4
IPFCZCDBIASH
IPFCZCDBIASL
tPFCZCDRING
VPFCZCD = 1.5V
VPFCZCD = 0.5V
- 0.5
- 0.5
350
—
5.0
0.5
650
µA
µA
ns
PFCZCD pin bias current, high
PFCZCD pin bias current, low
Ringing suppression-time
—
500
Limit value for ON-time
extension
Δt x IZCD
400
600
670
pC
Table 9
Electrical Characteristics of the PFCVS Pin
Symbol Limit Values
Parameter
Unit Remarks
Min.
Typ.
Max.
VPFCVS_ref
VPFCVSOV2
2.46
2.50
2.54
V
PFCVS pin reference voltage
PFC OVP level 2 threshold (115%
2.82
2.67
2.56
2.88
2.93
2.78
2.68
V
V
V
PFC and HB OFF
VPFCVS_ref
)
PFC OVP level 1 threshold
(109% VPFCVS_ref
VPFCVSOV1
VPFCVSOVR
2.73
2.63
PFC OFF
)
PFC OVP recovery threshold
(105% VPFCVS_ref
)
VPFCVSOVHY
VPFCVSUV1
70
100
130
mV
V
4 % rated bus voltage
PFC OVP hysteresis
PFC UVP threshold (75% VPFCVS_ref
1.83
1.88
1.92
)
PFC open loop threshold(12.5%
VPFCVSUV2
IPFCVSBIAS
0.237
- 1.0
0.31
0.387
1.0
V
VPFCVS_ref
)
VPFCVS = 2.5V
—
µA
PFCVS pin bias current
Datasheet
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2nd Generation
Electrical Characteristics
Table 10
PFC PWM Generation
Symbol
Parameter
Limit Values
Unit Remarks
Min.
1.75
17
Typ.
Max.
10.64
26
tPFC_on_initial
tPFC_on_max
VPFCZCD = 0V, VBO = 2.0V
PFC initial on-time in soft-start
PFC maximum on-time
6.0
22
µs
µs
VACIN = 90V
PFC minimum on-time in CrCM
operation
tPFC_on_min
100
220
370
ns
tPFC_rep
tPFC_off
VPFCZCD = 0V
PFC repetition-time
47
42
52
47
60
µs
µs
PFC maximum off-time
52.5
5.4.3
HB Stage Characteristics
Table 11
Electrical Characteristics of the LSGD Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
0.40
0.40
- 0.30
10.0
7.5
Typ.
Max.
1.00
1.20
0.53
11.6
—
ILSGD = 5 mA
ILSGD = 20 mA
0.70
0.80
0.20
10.8
—
V
V
V
V
V
V
V
VLSGDL
LSGD low voltage
LSGD high voltage
ILSGD = - 20 mA
ILSGD = - 20 mA
ILSGD = –1 mA1
ILSGD = –5 mA2
ILSGD = 20 mA / VCC = 5V
VLSGDH
7.0
—
—
VLSGDLASD
VLSGDLUVLO
ILSGDSO
0.4
0.75
1.12
LSGD active shut down
LSGD UVLO shut down
LSGD peak source current
LSGD peak sink current
ILSGD = 5 mA / VCC = 2 V
0.3
—
1.0
1.6
—
V
+
2
3
- 50
300
mA
mA
1 + 2
ILSGDSI
—
—
LSGD voltage during sink
current
VLSGDHS
ILSGD = 3 mA
—
11.7
—
V
tLSGDR
tLSGDF
125
20
275
35
580
60
ns
ns
2 V < VLSGD < 8 V 1
8 V > VLSGD > 2 V 1
LSGD rise time
LSGD fall time
Table 12
Electrical Characteristics of the LSCS Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
HB over-current protection
level 2
VHB_OCP2
1.54
1.6
1.66
V
1 VCC = VCCOFF + 0.3 V
2 Load: RLoad = 10 Ω and CLoad = 1 nF
3 The parameter is not subject to production testing – verified by design/characterization
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Blanking time for HB over-
current protection level 2
tHB_OCP2_blanking
430
600
0.8
50
670
ns
V
HB over-current protection
level 1
VHB_OCP1
tHB_OCP1_blanking
VHB_Cap1
tHB_Cap1_blanking
VHB_Cap2
tHB_Cap2_blanking
VHB_cap_reg
0.74
—
0.86
—
Blanking time for HB over-
current protection level 1
1
ms
during turn-on of the
HSGD
HB capacitive mode detection
level 1
1.54
30
1.6
50
1.66
90
V
Blanking time for HB capacitive
mode detection level 1
ns
mV
ns
mV
%
before turn-on of the
HSGD
HB capacitive mode detection
level 2
- 70
300
25
- 50
390
50
- 25
550
70
Blanking time for HB capacitive
mode detection level 2
HB capacitive mode regulation
voltage
HB capacitive mode regulation
ratio
KHB_cap_reg
4.5
7.0
9.0
VLSCSCC
ILSCSBA
0.74
-1.0
0.8
0.86
1.0
V
HB over-current control
LSCS pin bias current
VLSCS = 1.5 V
—
µA
Table 13
Electrical Characteristics of the HSGD Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
0.018
0.40
- 0.40
9.7
Typ.
0.05
1.10
-0.20
10.5
—
Max.
0.1
2.50
- 0.04
11.3
—
IHSGD = 5mA
V
V
V
V
V
V
IHSGD = 100mA
IHSGD = - 20mA
VCC_HS=15V
IHSGD = - 20mA
VCC_HS_OFF + 0.3V
IHSGD = - 1mA1
VCC_HS=5V1
VHSGDL
HSGD low voltage
HSGD high voltage
VHSGDH
7.8
0.04
VHSGDLASD
IHSGDSO
IHSGDSI
0.22
0.50
HSGD active shut down
HSGD peak source current
HSGD peak sink current
HSGD rise time
—
- 50
300
220
35
—
V
—
—
V
tHSGDR
IHSGD = 20mA
120
17
320
70
ns
ns
tHSGDF
RLoad = 10Ω+CLoad = 1nF
HSGD fall time
Table 14
Electrical Characteristics of the RF Pin
1 The parameter is not subject to Production Test – verified by Design / Characterization
Datasheet
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
RF pin voltage in normal
operation
VRF
@ 100µA < IRFM < 800µA
2.46
2.5
2.54
V
RRF = 10kΩ without the
resistor to BM pin
IRF = - 100 µA
IRF = - 200 µA
IRF = - 500 µA
HB nominal switching
frequency
fNOM
97.5
100
102.5
kHz
f1
f2
f3
f4
f5
37
76
190
220
290
40
80
200
240
320
43
84
210
260
350
kHz
kHz
kHz
kHz
kHz
IRF = - 600 µA
IRF = - 800 µA
Adjustable HB switching
frequency via the CCO
IRF = - 1.25 mA / @ Tj = -
fmax-25°C
fmax-40°C
450
400
500
500
-
-
kHz
kHz
25°C1
IRF = - 1.25 mA / @ Tj = -
40°C1
Table 15
Electrical Characteristics of the BM Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
HB burst mode entry voltage
threshold
VHB_BM_entry
710
750
790
mV
ms
Blanking time for HB burst
mode entry
tHB_BM_entry_blanking
8.5
10.0
11.5
HB burst mode turn-on
threshold
VHB_BM_on
VHB_BM_exit
IBM_max
2.13
1.93
2.20
2.0
2.27
2.07
V
V
HB burst mode exit threshold
Maximum sink current into
the BM pin
800
µA
BM pin current in the sleep
mode
IBM_Stop
-3
—
14
µA
Table 16
Electrical Characteristics of the BO Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
1.14
1.34
-0.5
Typ.
1.2
1.4
—
Max.
1.26
1.46
0.5
VBO_out
VBO_in
IBOBA
Brown-out threshold
Brown-in threshold
BO pin bias current
V
V
VBO = 5.0V
µA
Table 17
Electrical Characteristics of the OVP Pin
1 Make sure, that the expected ambient temperature does NOT cause a maximum junction temperature higher than 125°C
Datasheet
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
HB OVP pin reference voltage
for OVP detection
VHB_OVP_ref
2.45
2.5
2.55
V
t > 5µs
Blanking time for HB OVP
detection
tHB_OVP_blanking
IOVPBA
—
5
—
µs
OVP pin bias current
- 0.5
—
0.5
µA
VOVP = 3.0V
Table 18
Electrical Characteristics of the OTP Pin
Parameter
Symbol
Limit Values
Unit Remarks
Min.
670
594
Typ.
Max.
735
VOTP_start
VOTP_off
OTP turn-on threshold
OTP turn-off threshold
703
625
mV
mV
665
Blanking time for OTP
detection
tOTP_blanking
IOTP
—
620
—
µs
OTP pin source current in
normal operation
- 106
- 100
- 94
µA
Table 19
Time Section
Parameter
Symbol
Limit Values
Unit Remarks
Min.
550
350
150
Typ.
Max.
930
600
300
tDead_max1
tDead_max2
tDead_min
750
500
250
ns
ns
ns
LSCS > - 50mV / 100kHz
HB maximum dead time 1
HB maximum dead time 2
HB minimum dead time
LSCS > - 50mV / 500kHz
LSCS < - 50mV / 500kHz
Datasheet
01
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Package Dimensions
6
Package Dimensions
The package dimensions of PG-DSO-19 are provided.
Figure 24
Package Dimensions for PG-DSO-19
Note:
Note:
Dimensions in mm.
You can find all of our packages, packing types and other package information on our Infineon
internet page “Products”: http://www.infineon.com/products.
Datasheet
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ICL5102HV PFC + Resonant Half-Bridge Controller
2nd Generation
Revision history
Revision history
Document
version
Date of release
Description of changes
V1.2
V1.1
V1.0
01.04.2019
09.11.2018
01.06.2018
Errors correction and content modification
Errors correction and content modification
First release
Datasheet
01
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