ICL8800 [INFINEON]
用于恒定电压输出的单级反激式 LED 控制器;
| 型号： | ICL8800 |
| 厂家： | 
Infineon |
| 描述： | 用于恒定电压输出的单级反激式 LED 控制器 控制器 |
| 文件： | 总36页 (文件大小：1740K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
Features
The ICL88xx family of single stage flyback controllers for constant voltage output is tailored for LED lighting
applications to meet the required performance. They offer power factor correction (PFC) and low total
harmonic distortion (THD) from low to full load conditions.
General features ICL8800, ICL8810, ICL8820
•
Constant voltage (CV) output flyback topology with a feature set and operation targeting lighting
applications
•
Optimized for high power factor (HPF) flyback topology with secondary side regulation (SSR) operation,
primary side regulation (PSR) possible
•
•
•
Supports universal input voltage (90 VAC to 300 VAC, 45 Hz to 66 Hz) and DC input voltage operation
High power factor and low THD, across wide AC input voltage and output load range
Quasi-resonant mode (QRM) operation with continuous conduction mode (CCM)-prevention and valley
switching discontinuous conduction mode (DCM) in mid to light load
•
•
•
Adjustable on-time mapping at valley changing position, for the desired maximum operating switching
frequency
Adjustable maximum on-time – limits input power and current allowing safe-operation under low line
condition
Comprehensive set of protections:
-
-
-
-
-
-
-
-
internal overtemperature protection (OTP)
flyback output overvoltage protection (OVP)
primary side overcurrent protection (OCP)
brownin protection
brownout protection
VCC overvoltage protection
open loop protection
input overvoltage protection
•
•
•
Sof start to reduce component stress during turn-on
External start-up circuit control signal
Reduced gate driver voltage during start-up sequence, to allow smaller VCC capacitance for faster start-up
Additional features ICL8810, ICL8820
•
•
•
Burst mode for very light loads and low system standby power consumption
VCC wake-up burst operation, to maintain sufficient VVCC in burst mode
Reduced gate driver voltage in burst mode, to reduce gate charge loss, for lower standby power
Additional features ICL8820
•
Jitter function for DC input, to ease electromagnetic interference (EMI) test compliance for emergency
lighting
Potential applications
HPF flyback CV
•
•
Tailored for LED driver application
Also suited for adapter, charger, ceiling fan, flat TV, all-in-one PC, monitor applications
Datasheet
www.infineon.com
Please read the sections "Important notice" and "Warnings" at the end of this document
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
Product validation
VOUT +
VOUT-
CMC
L
CoolMOS
GD
CS
DMC
N
ICL88xx
VS
VIN
Figure 1
Flyback-SSR-CV
VOUT +
VOUT-
CMC
L
CoolMOS
GD
CS
DMC
N
ICL88xx
VS
VIN
Figure 2
Flyback-PSR-CV
Product type
ICL8800
Package
PG-DSO-8
PG-DSO-8
PG-DSO-8
Marking
L8800
Ordering code
SP003135776
SP005418406
SP005418407
ICL8810
L8810
ICL8820
L8820
Product validation
Qualified for applications listed above based on the test conditions in the relevant tests of JEDEC20/22.
Datasheet
2
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
Description
Description
The ICL88xx is a voltage mode controller for flyback topologies operating in QRM and valley switching DCM.
It is designed for low and high power lumen LED driver, requiring high power factor and efficiency. The
flyback controller is capable of controlling SSR-CV and PSR-CV topologies. Offering a wide usage in low cost
applications where a PFC functionality in dual stage topologies is required.
For lighting applications, the IC offers a wide power range as well as a comprehensive set of protections,
including a power limitation. The IC is easy to design in and requires a minimum number of external
components.
The system performance and efficiency, especially in light load conditions, can be optimized using Infineon
CoolMOS™ P7 power MOSFETs.
ICL8810 and ICL8820
The integrated burst mode function allows designs with a very low standby power consumption during standby
mode and very light loads.
ICL8820
The jitter function eases the design of emergency lighting LED drivers without additional circuitry to improve
EMI performance.
Datasheet
3
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
Table of contents
Table of contents
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TD pin internal pull-up and external start-up circuit control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Input voltage detection and protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ZCD pin signal sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power factor correction and THD correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
VS pin signal sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Pulse generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Primary side overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
VCC voltage protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Flyback output overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Open loop protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
State flow chart and fault reaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Adjustable functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
4
4.1
4.2
4.3
Electrical characteristics and parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Zero crossing detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Voltage sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Input voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
TD configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PWM generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Clock oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
5
6
7
Package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Datasheet
4
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
Table of contents
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Datasheet
5
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
1 Pin configuration
1
Pin configuration
1
8
7
6
5
ZCD
VS
VCC
GND
GD
2
3
4
VIN
TD
CS
PG-DSO-8
Figure 3
Table 1
Pin configuration
Pin definition and function
Symbol
Pin
Function
ZCD
1
Zero crossing detection
This pin is connected to an auxiliary winding via a series resistor to detect the zero
crossing, for QRM valley switching. This series resistor value can be adjusted to configure
the on-time mapping and maximum on-time.
VS
2
3
Feedback sensing
This pin measures the feedback signal in the form of load current, for output regulation
with voltage mode control.
VIN
Input voltage detection
This pin is used to detect AC or DC input for frequency jitter function, and measure the
rectified input voltage via a resistor divider for the power limitation function, brownin,
brownout and input overvoltage protection.
TD
CS
4
5
THD correction
The resistance to ground RTD of this pin adjusts the THD correction gain and the turn-on
delay upon zero crossing detection for QRM valley switching. The internal pull-up of this
pin can also be used to control an external start-up circuit for active VVCC charging.
MOSFET current sense and flyback output overvoltage protection
This pin is used for primary side overcurrent protection. The series resistance (connected
between this pin and the primary MOSFET current shunt resistor) can be used to adjust
the flyback output over-voltage protection level.
GD
6
7
Gate driver
This pin controls the gate of the MOSFET.
GND
Ground
This pin is connected to ground and represents the ground level of the IC for the supply
voltage, gate driver and sense signals.
VCC
8
Operating voltage supply
This pin supplies the IC.
Datasheet
6
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
2 Block diagram
2
Block diagram
Over voltage protection
AC sync and BI/BO
TD
+
-
External
startup circuit
control
Blanking
time
Q
S
VOCP2
+
-
CS
R
THD
adjustment
+
-
VOVP
Blanking
time
IOVP
VOCP1
CS protections
THD configuration
Pulse generation
and THD
correction
+
-
VBI
Thermal protection
+
-
ZCD
GD
VBO
AC/DC detection; Input
voltage Level detection
Pulse generation &
mode change
Tj
Thermal Protection
VIN
+
-
VUV
1.6 V
Burst control
(ICL8810 &
ICL8820)
RPU =
500Ω
Fault control
ADC
A
VS
I
Powerlimitation
and jitter
Decimation
Digital state machine
DAC
(ICL8820)
Supply, reference & biasing
VCC monitoring
VS open loop protection
+
Blanking
3.3 V
VUVLO
+
-
S
Q
Reference/
Selfsupply
time
Vovp
-
R
+
-
VOVLO
GND
VCC
Figure 4
Block diagram
Datasheet
7
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3
Functional description
These sections describe the listed functions in detail.
3.1
Start-up
In the pre-start-up phase, ICL88xx measures the TD pin resistance to ground RTD, the average VIN pin voltage
VVIN,avg, and its internal junction temperature Tj. If the conditions for start-up are met, ICL88xx initiates a sof
start, to reduce the component stress during start-up.
Afer the sof start is completed without any protection triggering, ICL88xx enters the RUN state for output
regulation based on VS pin signal sensing.
Note:
The reduced gate driver voltage VGDred (7 V typ.) is applied during start-up.
3.2
TD pin internal pull-up and external start-up circuit control
Apart from charging the VVCC from the HV bus voltage via the current limiting resistor in Figure 1 and Figure
2, ICL88xx TD pin also supports the control of an exemplary external start-up circuit in Figure 5 for active VVCC
charging, with the following typical start-up sequence:
1.
When ICL88xx is in the undervoltage lockout (UVLO) state and VVCC < VVCCon (12.5 V typ.), the TD pin
internal pull-up is disabled.
2.
3.
VVCC is charged to VVCCon by the external start-up circuit, to activate ICL88xx.
In the pre-start-up phase, ICL88xx enables the TD pin internal pull-up resistor of RTD,RUN (10 kΩ typ.) and
RTD,flyback (40 kΩ typ.) sequentially, to measure the TD pin resistance to ground of RTD
.
4.
If the start-up conditions are met and the start-up is successful, RTD,RUN is enabled in the sof start phase
and in RUN state, to disable the external start-up circuit from charging the VVCC. If any protection is
triggered, ICL88xx enters UVLO state (returns sequence number 1) afer a restart timer is expired.
Note:
Note:
The internal voltage reference for the TD pin internal pull-up, VREF is typically 3.3 V.
For ICL8810 and ICL8820, RTD,RUN is disabled in burst mode when VCC drops to VVCCwake (7.6 V typ.), to
allow the external start-up circuit to charge VVCC to VVCCburst (8.1 V typ).
Figure 5 shows the equation for RTD calculation when the exemplary start-up circuit is connected to the TD pin.
The RTD detected in the pre-start-up phase must be designed to be at least 27 kΩ when TD pin is internally
pulled up by RTD,RUN, and not more than 68 kΩ when TD pin is internally pulled up by RTD,flyback. The is to
activate the VS pin load current sensing for output regulation and stay within the TD configuration limit.
Figure 5
Exemplary external start-up circuit for active VVCC charging, and RTD generic equation
Datasheet
8
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.3
Input voltage detection and protection
ICL88xx detects the AC or DC amplitude based on the ADC sampling of the VIN pin voltage. For the power
limiting function, brownin and brownout protections, the controller measures the average VIN pin voltage
VVIN,avg based on the middle value of the highest VIN pin voltage sample and the lowest VIN pin voltage sample
within an observation time. The observation time in RUN state is around 10.6 ms and 12.7 ms, based on the last
synced AC line frequency of 50 Hz and 60 Hz, respectively.
Note:
In case of non-line-syncing, the observation time is around 10.6 ms. For example, non-line-syncing can
happen when the system is started up with a DC input.
L
Primary
HV bus
voltage
N
VIN
Figure 6
VIN pin circuit
In addition, the ICL88xx VIN pin has an input overvoltage threshold of VVINOV (2.0 V typ.) and a short protection
with a threshold of VVINshort (200 mV typ.).
During operation, if a sampled VIN pin voltage VVIN < VVINshort is detected for more than a blanking time, the VIN
pin short protection is triggered. If the VVIN < VVINshort condition remains afer the VIN pin short protection restart
time of trestart (200 ms typ.), the brownin protection is triggered based on VVIN,avg < VBI detection instead. This
leads to a fast restart cycle of trestart,fast (25 ms typ.) aferwards.
By pulling down the VIN pin signal to a level that triggers the VIN pin short protection or brownout protection,
ICL88xx gate pulse generation can be disabled and the controller current consumption can be lowered.
3.4
ZCD pin signal sensing
ICL88xx ZCD pin detects the auxiliary winding voltage zero-crossing via a ZCD series resistor of RZCD connected
to the winding. A zero-crossing is detected with the hysteresis of VZCDUp (55 mV typ.) and VZCDDown (45 mV typ.)
thresholds.
In QRM, ICL88xx counts the number of zero crossings until the target number is reached, and switches on at the
valley to minimize the switching loss. If the target number is not reached and further zero crossing signals are
not detectable via ZCD pin, zero crossing events can be generated internally by extrapolation. Figure 7 shows an
example of the 1st zero crossing detection and the 1st valley switching in QRM operation.
Datasheet
9
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
VAUX
VAUXp ≈(Vout+Vd)·Na /Ns
1st zero
crossing
detection
RZCD
ZCD
Na
VAUX
time
0
1st valley
switching
VAUXn ≈ -VHV,bus·Na /Np
1/fsw
Ip
Is
Itransformer
+
-
-
VHV,bus
+
Vd
Ip
Ip
+
Is
Vout
Np
Ns
-
time
GD pin
voltage
GD
time
tON
Figure 7
Exemplary waveform of QRM operation with 1st zero crossing detection and 1st valley
switching
RZCD limits the ZCD pin sink and source currents when the auxiliary winding voltage exceeds the ZCD pin
internal clamping levels VZCDpclp (0.55 V typ.) and VZCDnclp (-0.5 V typ.), respectively. When the sensed voltage
level of the auxiliary winding is not sufficient (for example, during start-up), an internal start-up timer initiates
a new cycle every tRep (52 µs typ.) afer turn-off of the gate driver. From the ZCD pin sink and source currents,
ICL88xx detects the ZCD pin positive peak settled clamping current IZCDpclp and negative peak settled clamping
current IZCDnclp, for its internal operations, such as THD correction and flyback output overvoltage protection.
VAUXp − VZCDpclp
IZCDpclp
=
RZCD
Equation 1
VAUXn − VZCDnclp
IZCDnclp
=
RZCD
Equation 2
Where VAUXp and VAUXn are the positive peak and negative peak values, respectively, of the settled auxiliary
winding voltages, as shown in Figure 7.
In addition, ICL88xx derives the ZCD pin peak to peak settled clamping current IZCDclp based on the sum of
IZCDpclp and IZCDnclp, for its internal operations, such as pulse generation and power limitation.
IZCDclp = IZCDpclp + IZCDnclp
Equation 3
Datasheet
10
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.5
Power factor correction and THD correction
In RUN state, ICL88xx achieves power factor correction, when the VS pin feedback signal maps to a stable
operating point in QRM. Additionally, ICL88xx THD correction function extends the on-time, especially when it is
near AC input voltage zero crossing, to optimize the AC input current waveform.
As shown in Figure 8 area A, ICL88xx increases the on-time extension near AC input voltage zero crossing, where
IZCDnclp is less than 80% of IZCDpclp
.
The gain of the THD correction on-time extension is configurable based on the detected TD pin resistance to
ground RTD in the pre-start-up phase. Since the THD correction on-time extension also affects the turn-on delay
upon zero crossing detection, the RTD value has to be fine-tuned manually for a given system, to achieve a
balance between the QRM valley switching point optimization and THD correction.
Figure 8
ICL88xx THD correction with on-time extension near AC input voltage zero crossing
If the TD pin is only used for THD correction gain configuration, but not for other purpose like controlling an
external start-up circuit, a resistor can be connected from TD pin to ground, and simply fine-tuned between 27
kΩ and 68 kΩ.
If there is any circuit more than just a resistor connected between TD pin and ground, the following generic
equation for RTD calculation is applied:
VTD
RTD
=
Isource, TD
Equation 4
Datasheet
11
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
Where VTD is the TD pin voltage with reference to ground and Isource,TD is the current flowing out of TD pin, when
the internal pull-up resistor of RTD,RUN or RTD,flyback is enabled in the pre-start-up phase.
The minimum RTD value for TD configuration and to activate the VS pin load current sensing for output
regulation in RUN state is 27 kΩ, when TD pin is internally pulled up by RTD,RUN in the pre-start-up phase.
The maximum RTD value for TD configuration is 68 kΩ, when TD pin is internally pulled up by RTD,flyback in the
pre-start-up phase.
3.6
VS pin signal sensing
In RUN state, ICL88xx measures the feedback signal for output regulation based on the ADC sampling of the VS
pin load current. When operating in QRM with AC input, ICL88xx also synchronizes some of its operation to the
line frequency or AC half cycle, when the VS pin load current ripple is large enough.
To activate the VS pin load current sensing for output regulation in RUN state, a 12 kΩ resistor must be
connected from the VS pin to ground, and RTD must be at least 27 kΩ when TD pin is internally pulled up by
RTD,RUN in the pre-start-up phase.
For secondary side regulation, the VS pin load current consists of the current flowing through the opto coupler
and the 12 kΩ resistor. When the VS pin load current is -IVSADCmin (210 μA typ.) or less, the power transfer is
maximum. When the VS pin load current is -IVSADCmax (610 μA typ.) or more, the power transfer is minimum.
Figure 9
VS pin load current sensing based on secondary side regulation
Datasheet
12
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.7
Operating modes
In RUN state, ICL88xx operates in either QRM or burst mode. Burst mode applies to ICL8810 and ICL8820 only.
Quasi-resonant mode (QRM)
QRM maximizes the efficiency and minimizes the EMI by turning on the power switch at the drain voltage valley.
ICL88xx controls the on-time and valley number in QRM. When the valley number changes, the controller
compensates the QRM on-time to achieve a relatively constant power transfer for a smooth transition.
Figure 10 areas highlighted in blue show the on-time compensation effect (in zig-zag pattern) when, for
example, the QRM valley number is increased from 1 to 2, from 2 to 3, and from 3 to 4. When the relative
power is further decreased, the on-time compensation continues at higher valley changing position (in smaller
zig-zag), until it reaches the maximum valley number of 32. To ensure the QRM switching frequency reduction
stays above the audible range, the QRM off-time is limited to a maximum value of tOff (47 µs typ.).
Increasing the ICL88xx valley number ensures that the system-dependent QRM remains below a certain limit, to
achieve a high efficiency and low EMI spectrum over a wide operating range.
Figure 10
Exemplary switching characteristics versus relative power, with on-time
compensation for valley changing (burst mode applies to ICL8810 and ICL8820 only)
Burst mode for ICL8810 and ICL8820
Burst mode transfers lesser power than QRM, to support light loads and no load/standby operation.
To achieve a low standby power, the controller sleeps during burst pause, to reduce its current consumption. In
addition, the controller operates in burst mode with a reduced gate driver voltage level of VGDred (7 V typ.), to
minimize the gate charge loss.
The controller wakes up at a regular repetition frequency fwake,reg, to do the burst pulsing based on the
measured VS pin load current signal, and goes to sleep during burst pause, as shown in Figure 11.
fwake,reg is approximately four times the last synced input line frequency. For example, fwake,reg is around 240 Hz,
if the last synced input line frequency is 60 Hz.
Datasheet
13
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
Note:
In case of non-line-syncing happened before entering the burst mode, fwake,reg = 200 Hz typ. is applied.
For example, non-line-syncing can happen when the system is supplied with a DC input or when the
VS pin load current ripple is very small at low load.
VS pin
Load
current
2
2
measure
2
measure
measure
1
1
1
4
4
4
wake
up
wake
up
wake
up
sleep
sleep
sleep
t
t
GD pin
Voltage
signal
3
3
3
pulsing
pulsing
pulsing
1/fburst≈1/fWake,reg
1/fburst≈1/fWake,reg
Figure 11
Illustration of ICL8810 and ICL8820 burst mode with regular wake-up interval
To maintain sufficient VVCC in burst mode, the controller operates with the following two mechanisms:
•
Instead of waking up based on the regular fwake,reg, a higher priority VCC wake-up threshold can trigger
a burst start if VVCC drops to VVCCwake (7.6 V typ.). The controller continues the burst pulsing until VVCC
VVCCburst (8.1 V typ.).
=
•
The TD pin internal pull-up resistor is disabled when VVCC drops to VVCCwake, to allow an external start-up
circuit to charge VVCC to VVCCburst
.
As a result, the burst cycle 1/fburst does not necessarily follow 1/fwake,reg , as shown in Figure 11. The burst cycle
can be extended by an integer times of 1/fwake,,reg in case of a burst pulse skipping, or can be reduced by a
portion of 1/fwake,reg in case of a VCC wake-up burst triggering, or from a combination of both effects.
Attention: The VCC wake-up burst control mechanism is intended to work with the VCC voltage supply via
the ZCD winding. In case of the VCC voltage is supplied via a winding voltage, which follows a
certain ratio of the primary bus voltage, it is a must to ensure that the VCC voltage during burst
mode is always higher than VVCCburst maximum value (9.1 V maximum) by a sufficient margin,
especially when the input voltage is low and close to brownout level, so that the VCC wake-up
burst mechanism can be avoided, to achieve a good output regulation.
Datasheet
14
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.8
Pulse generation
In RUN state, the ICL88xx maps the measured VS pin load current to the virtual pulse length, valley number and
burst duty cycle, as shown in Figure 12.
These internal parameters are processed together with the power limitation and frequency jitter parameters,
and fed to the pulse generation and THD correction function block, as shown in the Block diagram.
Note:
The pulse generation for burst mode applies to ICL8810 and ICL8820 only. Frequency jitter applies to
ICL8820 only.
Figure 12
Virtual pulse length mapping (based on IZCDclp = 1.2 mA as an example), valley number
mapping and burst mode mapping (burst mode applies to ICL8810 and ICL8820 only)
Datasheet
15
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
Virtual pulse length mapping and its use case
The virtual pulse length mapping is an illustrative on-time mapping which excludes:
•
•
•
•
the system-dependent on-time compensation effect for valley number change (see Figure 10)
the on-time extension effect for THD correction (see Figure 8)
the power limiting effect on the maximum on-time (to be explained in this chapter)
the virtual pulse length modulation effect from the DC input frequency jitter function - applies to ICL8820
only (to be explained in this chapter)
•
the minimum gate pulse length limit by the pulse generation block
The virtual pulse length mapping shown in Figure 12 is not static.
It shifs vertically based on the ZCD pin peak to peak settled clamping current IZCDclp, which is dependent on the
RZCD, transformer winding turns ratio, operating input and output voltages.
As shown in Figure 13, a different IZCDclp level leads to a change on the virtual pulse length at every valley-
changing position, including the burst mode entry position. It means when the input voltage is lower or when
RZCD value is increased for example, a decrease of IZCDclp leads to the relative on-time decrease at every
valley-changing position, including the burst mode entry position. And vice-versa.
Figure 13
Effect of IZCDclp change on the virtual pulse length mapping
As an example, the virtual pulse length mapping based on IZCDclp = 1.2 mA in Figure 13 is derived based on the
following steps:
Datasheet
16
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
1.
2.
Based on IZCDclp = 1.2 mA, obtain τv,IVSADCmin = 20 μs from Figure 14.
Mark τv,IVSADCmin = 20 μs on the y-axis, and take it as the starting point for the virtual pulse length
mapping curve plot, which is relatively well exponential in the range from 20 μs to 1 μs, with a halving of
the pulse length per 50 μA VS pin load current increase.
For example, another practical use case of the virtual pulse length mapping is to estimate the minimum
on-time of the QRM 1st valley switching (approximately 10% of τv,IVSADCmin), to estimate the system maximum
switching frequency.
Note:
When the valley number is higher than 1 in QRM, or when in burst mode, the virtual pulse length
mapping value should not be taken directly as the estimated on-time, since it excludes the on-time
compensation effect for valley number change.
Figure 14
Virtual pulse length at IVSADCmin, τv,IVSADCmin versus ZCD peak to peak settled clamping
current, IZCDclp
Power-limitation and maximum on-time
The ICL88xx power limitation features limit the maximum on-time tON,max based on:
1
tON, max ≈ τv, IVSADCmin ⋅ min 1,
V
VIN, avg
23.058 ⋅ ln
− 1.25
0.4
Equation 5
For tON,max estimation, it is important to note that τv,IVSADCmin changes with different VVIN,avg level, when the
input voltage detection circuit in Figure 6 is applied. This is because τv,IVSADCmin is scaled depending on IZCDclp in
Figure 14, while IZCDclp is dependent on the input voltage, as explained in ZCD pin signal sensing.
tON,max is applied when the VS pin load current is IVSton,sat or lower, where IVSton,sat can be estimated based on:
VVIN, avg
−IVSton, sat ≈ −IVSADCmin + max 0, 152.9 ⋅ ln
− 62.5 ⋅ 10−6
0.4
Equation 6
Datasheet
17
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
Figure 15 shows the virtual pulse length with the power limiting maximum on-time effect, when VVIN,avg is 0.65
V, 1.0 V, 1.5 V and 1.9 V, respectively.
Figure 15
Virtual pulse length mapping with power limiting maximum on-time effect
When VVIN,avg is in the range from the brownout level (0.44 V typ.) to approximately 0.6 V, the power limitation is
disabled, where tON,max = τ
.
v,IVSADCmin
When VVIN,avg is at the brownin level (VBI = 0.65 V typ.), the power limitation is enabled with tON,max = 85%
of τv,IVSADCmin, as shown in Figure 15. For example, if the desired tON,max at brownin level is 17 μs typ., it is
necessary to have τv,IVSADCmin = 17 μs / 85% = 20 μs. And, according to Figure 14, τv,IVSADCmin = 20 μs is obtained
when IZCDclp =1.2 mA is applied. As a result, to achieve tON,max = 17 us typ. at brownin level, RZCD should be
dimensioned to produce IZCDclp = 1.2 mA typ. at brownin level.
Valley number and burst duty cycle
The valley number and burst duty cycle mappings based on VS pin load current are shown in Figure 12. The
burst duty cycle refers to the ratio of the burst pulsing duration to burst cycle time. -IVSADCabm (560 μA typ.)
marks the boundary between QRM and burst mode.
Note:
The pulse generation for burst mode applies to ICL8810 and ICL8820 only.
In QRM, the mapped valley number is not necessarily taken directly or immediately as the ZCD pin valley-count
number, for the pulse generation. The update of the ZCD pin valley-count number is done based on the
following valley selection hysteresis mechanism:
1.
To minimize the multiple valley changes within one AC half cycle, ICL88xx updates the ZCD valley-count
number once every AC half cycle, based on the lowest mapped valley number from the last AC half cycle,
Datasheet
18
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
as shown in Figure 16. During each AC half cycle, the controller adjusts the on-time to stay in the selected
valley number. In this way, the number of valley jumps is limited to a minimum.
When a load jump happens, if the valley number has to be decreased, it happens immediately. For the
case of valley number increase, if the load jump results to a valley number increase by 10 or more, it
happens immediately. Otherwise, the change happens only at the start of the next AC half cycle, as
shown in Figure 16.
2.
Note:
If the selected ZCD valley-count number cannot happen before the maximum off-time toff (47 µs typ.)
is reached, the pulse generation will be based on toff, instead of the selected ZCD valley counting
number.
Figure 16
Illustrative example of the QRM valley selection hysteresis mechanism
Note:
If the AC half cycle period cannot be synced, for example when the input voltage is DC, or when
the VS pin load current ripple is very small , the regular valley update cycle will be based on either
approximately 10 ms, or the last synced AC half cycle period.
In burst mode, the controller measures the VS load current at a regular wake-up interval, and applies
the mapped valley number immediately as the ZCD pin valley-count number for the burst switching pulse
generation. Also, the mapped burst duty cycle is taken immediately to determine the burst pulsing duration,
as shown in Figure 11. If the measured VS load current is -IVSADCmin (610 µs typ.) or more, the burst pulsing is
skipped.
Instead of waking up based on the regular interval, a higher priority VCC wake-up threshold can trigger a
burst start if VVCC drops to VVCCwake (7.6 V typ.). In case of VCC wake-up burst being triggered, the burst pulsing
duration depends on the time needed to charge the VVCC from VVCCwake to VVCCburst (8.1 V typ.).
Attention: The VCC wake-up burst control mechanism is intended to work with the VCC voltage supply via
the ZCD winding. In case of the VCC voltage is supplied via a winding voltage, which follows a
certain ratio of the primary bus voltage, it is a must to ensure that the VCC voltage during burst
mode is always higher than VVCCburst maximum value (9.1 V maximum) by a sufficient margin,
Datasheet
19
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
especially when the input voltage is low and close to brownout level, so that the VCC wake-up
burst mechanism can be avoided, to achieve a good output regulation.
Burst mode regular wake-up interval and burst cycle time
Refer to the burst mode section in the Operating modes chapter.
DC input frequency jitter
Note:
The frequency jitter function applies to ICL8820 only.
When a DC input voltage is detected via the VIN pin, a triangular pattern is injected into the pulse generation,
with a repetition frequency of ftriangular. The triangular pulse modulation can be compared to the change in
pulse generator output, with the artificial current change pattern shown in Figure 17 applied to the measured
VS pin load current.
With DC input voltage, the on-time can therefore be modulated in QRM. Since the transformer demagnetization
time is proportionate to the modulated on-time, the QRM switching frequency jitters. The resulting jitter
frequency range depends not only on the on-time modulation itself and the ZCD valley-count number, but also
the duty cycle and oscillation period, which are both system-dependent.
ftriangular is approximately 222 Hz and 266.4 Hz for the last synced input line frequency of 50 Hz and 60 Hz
respectively.
Note:
In case of non-line-syncing, ftriangular = 222 Hz typ. is applied. For example, non-line-syncing can
happen when the system is started up with a DC input.
Figure 17
Artificial load current change pattern applied on VS pin measured current for the pulse
generator output change, to resemble the pulse modulation mechanism for the DC
input frequency jitter function
Datasheet
20
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.9
Primary side overcurrent protection
The primary side overcurrent protection level 1 (OCP1) is performed by means of the cycle-by-cycle peak
current limitation. An internal leading edge blanking tLEB (160 ns typ.) prevents false triggering of this
protection due to a leading edge spike. If the measured CS pin voltage exceeds VOCP1 (0.61 V typ.) for more
than tLEB (160 ns typ.), the protection is triggered and the GD pin output is pulled low for that switching cycle.
The primary side overcurrent protection level 2 (OCP2) is meant for covering fault conditions like a short in the
transformer primary winding or transformer core saturation. In this case, the OCP1 does not limit properly the
peak current due to the very steep slope of the peak current. If the measured CS pin voltage with an initial level
of at least VOCP1 reaches VOCP2 (1.21 V typ.) or more within the time window of tOCP2 (150 ns typ.), the OCP2
protection is triggered.
Figure 18
Timing overview of the OCP1 and OCP2
Datasheet
21
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.10
VCC voltage protections
An UVLO is implemented to activate and deactivate the controller depending on the supply voltage on the VCC
pin. The UVLO contains a hysteresis with the voltage thresholds VVCCon (12.5 V typ.) for activating the controller
and VVCCmin (6.6 V typ.) for deactivating the controller.
When the controller is not active, the current consumption is IVCCstart (30 μA typ.).
If the voltage on VCC pin reaches VVCCclamp (24.2 V typ.) during start-up, restart and in the burst pause, the
controller is able to sink up to IVCCclamp (2.5 mA typ.). The VCC overvoltage protection is implemented based on a
threshold of VVCCmax (25 V typ.).
VCC wake-up burst (for ICL8810 and ICL8820 only)
To maintain sufficient VVCC in burst mode, the controller operates with the following two mechanisms:
•
The VCC wake-up threshold can trigger a burst start if VVCC drops to VVCCwake (7.6 V typ.). The controller
continues the burst pulsing until VVCC = VVCCburst (8.1 V typ.).
•
The TD pin internal pull-up resistor is disabled when VVCC drops to VVCCwake, to allow an external start-up
circuit to charge VVCC to VVCCburst
.
Attention: The VCC wake-up burst control mechanism is intended to work with the VCC voltage supply via
the ZCD winding. In case of the VCC voltage is supplied via a winding voltage, which follows a
certain ratio of the primary bus voltage, it is a must to ensure that the VCC voltage during burst
mode is always higher than VVCCburst maximum value (9.1 V maximum) by a sufficient margin,
especially when the input voltage is low and close to brownout level, so that the VCC wake-up
burst mechanism can be avoided, to achieve a good output regulation.
3.11
Flyback output overvoltage protection
During the transformer demagnetization time, the ZCD pin positive peak settled current IZCDpclp is internally
converted to a current flowing out of the CS pin with the conversion ratio nZCDOVP. The CS pin voltage level at
this time is therefore approximately the multiplication of this out-flowing current and the CS pin resistance to
ground. If this voltage level exceeds the VOCP1 threshold (0.61 V typ.) for more than a blanking time, the flyback
OVP is triggered.
Since the CS pin series resistor value is very much greater than the primary MOSFET current shunt resistor
value, the flyback output OVP level can be adjusted based on the CS pin series resistance.
ZCD
AUX winding
CS
OVP
OCP1 threshold
series resistor
EMI filter
Primary MOSFET
current shunt
resistor
Figure 19
Flyback secondary output OVP
Datasheet
22
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
Due to this protection, the voltage on CS pin is not zero during the transformer demagnetization, but mirrors
the reflected output voltage.
Figure 20
Flyback CS waveform
3.12
Overtemperature protection
ICL88xx offers an overtemperature protection using an internal temperature sensor. The overtemperature
protection is triggered when internal junction temperature Tj reaches T (130°C typ.).
3.13
Open loop protection
An open feedback loop results in maximum power transfer afer the sof start. The flyback output overvoltage
protection can be triggered once the overvoltage threshold is exceeded for longer than the related blanking
time. This causes an auto-restart.
In the case of an open VS pin, due to the VS pin sourcing a current of -IVSBias (1 µA typ.) out of the
controller during normal operation, the VS pin voltage rises. The VS pin voltage is compared to the overvoltage
comparator threshold VVSOVOFFFB (2.7 V typ.). If the voltage exceeds the threshold for longer than the related
blanking time, the VS pin overvoltage protection blocks any switching. A reset may occur if the VCC voltage
drops below VVCCmin
.
Datasheet
23
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
3.14
State flow chart and fault reaction
Flow chart
The Figure 21 shows the different states of the IC and the conditions to change the state.
t
restart or trestart,fast
timer reached
VVCC < VVCCmin
Any
State
Restart
timer
UVLO
V
VCC > VVCCon
IC power up
Internal error
Tj > Tstart
Power up done
V
VIN,avg < VBI
Pre-start-up
Tj ≤ Tstart, VVIN,avg ≥ VBI,
TD measurement done
R
Fault
Soft Start
Any protection
Any protection
Start-up done
Run
Figure 21
State flow chart
Fault reaction
The controller handles protections as listed in Table 2.
Note:
Some blanking times vary slightly with the line frequency.
Datasheet
24
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
3 Functional description
Table 2
Fault
Fault matrix
Detection
Typical
blanking
time
State
Reaction
Pre- Sof
start- start
up
Run
Insufficient supply
Insufficient supply
VCC overvoltage
VVCC < VVCCon
VVCC < VVCCmin
VVCC > VVCCOVP
VVIN < VVINshort
VVIN,avg < VBI
1 µs
1 µs
1 µs
1 µs
2 ms
X
X
-
-
-
Wait in reset
X
X
X
-
X
X
X
-
Reset
Auto-restart afer trestart
Auto-restart afer trestart
VIN short protection
Brownin protection
-
X
Fast auto-restart afer
trestart,fast
Brownout protection
VVIN,avg < (VBI-ΔVBI-BO
)
2 ms
2 ms
-
-
X
X
X
X
Auto-restart afer trestart
Auto-restart afer trestart
VIN overvoltage
protection
VVIN,avg > VVINOV
Overcurrent protection VCS > VOCP1
(OCP1)
tLEB
-
X
X
Turn off gate driver for
the on-going switching
cycle
Overcurrent protection VCS > VOCP2
tOCP2
-
-
X
X
X
X
Auto-restart afer trestart
Auto-restart afer trestart
Auto-restart afer trestart
(OCP2)
Flyback output
overvoltage protection
IZCDpclp *nZCDOVP > VOCP1 100 µs
Overtemperature
Tj > T or Tj > Tstart
VVS > VVSOVOFFFB
18 µs
20 µs
X
-
X
X
X
X
VS overvoltage
Turn off gate driver and
restart if VVS < VVSOVONFB
3.15
Adjustable functions
Some features of the controller can be adjusted using external circuitry:
•
The maximum power/on-time/operating point can be configured using the ZCD pin series resistance to the
ZCD/auxiliary winding
•
The flyback output overvoltage protection can be configured using the CS pin series resistance to the
primary MOSFET current shunt resistor.
•
•
Brownin and brownout protection and the related input overvoltage protection
Primary side overcurrent protection
Refer to the Design Guide for details.
Datasheet
25
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
4 Electrical characteristics and parameters
4
Electrical characteristics and parameters
All signals are measured with respect to the ground pin, GND. The voltage levels are valid provided that other
ratings are not violated.
4.1
Absolute maximum ratings
Note:
Absolute maximum ratings are defined as ratings, which if exceeded may lead to destruction of the
integrated circuit. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit. These values are not tested during production
test.
Table 3
Absolute maximum ratings
Parameter
Symbol
Values
Typ.
Unit Note or test
condition
Min.
-0.5
Max.
26
VCC voltage
VVCC
Tj
–
V
Junction temperature
Storage temperature
Soldering temperature
-40
-55
–
–
–
–
150
150
260
°C
°C
TS
TS
°C
Wave soldering
according to
JESD22-A111 Rev
A.
Thermal resistance junction to ambient
Power dissipation at 50°C
RThJA
PD
–
–
–
–
–
–
185
0.5
2
K/W
W
ESD capability HBM
VESD
kV
ESD-HBM
according to ANSI/
ESDA/JEDEC
JS-001.
ESD capability CDM
VESD
–
–
–
500
V
V
ESD-CDM
according to ANSI/
ESDA/JEDEC
JS-002.
GD voltage
VGD
-0.5
VVCC
0.3
+
CS voltage
CS current
ZCD voltage
ZCD current
VS voltage
VIN voltage
TD voltage
VCS
ICS
-0.5
-2
–
–
–
–
–
–
–
3.6
2
V
mA
V
VZCD
IZCD
VVS
-1.2
-4
3.6
4
mA
V
-0.3
-0.3
-0.3
3.6
3.6
3.6
VVIN
VTD
V
V
Datasheet
26
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
4 Electrical characteristics and parameters
4.2
Operating conditions
The recommended operating conditions are shown for which the DC electrical characteristics are valid.
Table 4
Operating characteristics
Symbol
Parameter
Values
Typ.
Unit Note or test
condition
Min.
-40
Max.
Junction temperature
Supply voltage
TJ
–
T
°C
V
VVCC
CTD
VVCCburst
–
–
–
23
1
External capacitance at the TD pin
–
–
nF
ZCD pin peak to peak settled clamping
current
IZCDclp
1.2
mA For VVIN = 0.6 V DC
afer internal
averaging
Line frequency for AC input
fline
45
–
66
Hz
4.3
DC electrical characteristics
The electrical characteristics provide the spread of values applicable within the specified supply voltage and
junction temperature range. Devices are tested in production at TA = 25°C. Values have been verified either
with simulation models or by device characterization up to 125°C. Typical values represent the median values
related to TA = 25°C.
All voltages refer to GND, and the assumed supply voltage is VVCC = 15 V, if not otherwise specified.
4.3.1
Power supply
Table 5
Power supply characteristics
Symbol
Parameter
Values
Typ.
12.5
30
Unit Note or test
condition
Min.
12.0
Max.
13.1
VCC turn-on threshold
Start-up current
Supply current
VVCCon
IVCCstart
ICC
V
–
–
–
–
μA
2.0
mA
IC self-supply
excluding gate
currents.
Supply current during burst pause
Supply current in protection mode
VCC undervoltage threshold
VCC wake-up threshold
ICCburst
–
220
40
–
μA
μA
V
ICCrestart
VVCCmin
VVCCwake
VVCCburst
Vdelta
–
–
6.0
6.6
7.1
500
23.8
–
6.6
7.6
8.1
–
7.6
8.8
9.1
–
V
VCC burst threshold
V
Difference between VVCCwake and VVccburst
VCC overvoltage threshold
VCC clamp voltage
mV
V
VVCCmax
VVCCclamp
IVCCclamp
25
26.4
–
24.2
2.5
V
VCC clamp current
–
–
mA
Datasheet
27
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
4 Electrical characteristics and parameters
4.3.2
Zero crossing detection
Table 6
Electrical characteristics
Symbol
Parameter
Values
Typ.
45
Unit Note or test
condition
Min.
10
Max.
Zero crossing threshold (falling edge)
Zero crossing threshold (rising edge)
Clamping of positive voltages
VZCDDown
VZCDUp
–
mV
mV
–
55
90
VZCDpclp
VZCDnclp
tRingsup
nZCDOVP
400
-600
350
550
700
-400
1100
mV
mV
ns
IZCDSink = 1 mA
Clamping of negative voltages
ZCD ringing suppression time
-500
700
IZCDSource = - 1 mA
ZCD to CS current ratio for flyback
secondary side OVP
0.455 0.484 0.513
ICSsource / IZCDpclp
at 1.2 mA
ZCD to CS current ratio for flyback
secondary side OVP
nZCDOVP
0.450 0.484 0.518
ICSsource / IZCDpclp
at 0.8 mA
4.3.3
Voltage sense
Note:
RTD limits from Table 9 apply for Table 7.
Table 7
Electrical characteristics
Symbol
Parameter
Values
Typ.
1.0
Unit Note or test condition
Min.
0.5
Max.
1.5
VS bias current
- IVSBias
µA
V
VVS = Vref.
Voltage source for optocoupler/ VVS
feedback supply
1.56
1.6
1.63
Internal series resistance of
500 Ω.
VS current threshold for start up - IVSsink
102
130
2.7
2.6
154
µA
V
12 kΩ from VS to GND.
Open pin turn-off
VVSOVOFFFB 2.64
2.76
2.66
Voltage for restart afer
overvoltage turn-off
VVSOVONFB
2.54
V
ADC lower current limit
- IVSADCmin
166
210
610
260
720
µA
µA
For maximum on-time
during operation.
ADC upper current limit
- IVSADCmax 500
For minimum on-time in
burst mode.
4.3.4
Input voltage detection
Table 8
Electrical characteristics
Symbol
Parameter
Values
Typ.
Unit Note or test condition
Min.
Max.
Hysteresis of brownin and brownout ΔVBI-BO
–
210
–
mV
RUN state and not
in burst mode. DC
threshold afer internal
averaging.
(table continues...)
Datasheet
28
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
4 Electrical characteristics and parameters
Table 8
(continued) Electrical characteristics
Parameter
Symbol
Min.
Values
Typ.
Unit Note or test condition
Max.
0.70
Brownin voltage level
VBI
0.60
0.65
V
DC threshold afer
internal averaging.
VIN pin short to GND threshold
VIN overvoltage threshold
VVINshort
VVINOV
150
1.9
200
2.0
250
2.1
mV
V
4.3.5
TD configuration
Table 9
Electrical characteristics
Parameter
Symbol
Values
Min. Typ. Max.
Unit Note or test condition
Internal pull-up resistor for pre-start-up RTD RTD,flyback 32
measurement
40
48
kΩ Internal voltage 3.3 V.
Internal pull-up resistor for RUN state and
pre-start-up RTD measurement
RTD,RUN
8
10
12
kΩ Internal voltage 3.3
V. Pull-up is disabled
in burst mode if VCC
wake-up is triggered
from VVCC ≤ VVCCwake
until VVCC reaches
,
VVCCburst
.
TD pin resistance to ground, for THD
correction gain configuration and to
activate VS pin load current sensing for
output regulation
RTD
27
–
68
kΩ Internal voltage 3.3 V.
Minimum value based
on Internal pull-up
resistor of RTD,RUN
.
Maximum value based
on internal pull-up
resistor of RTD,flyback
.
Measured in pre-start-
up phase.
4.3.6
Current sense
Table 10
Electrical characteristics
Parameter
Symbol
Values
Typ.
610
Unit Note or test
condition
Min.
Max.
650
OCP1 turn-off threshold
OCP1 leading-edge blanking time
OCP2 turn-off threshold
OCP2 trigger time
VOCP1
tLEB
VOCP2
tOCP2
570
–
mV
ns
160
–
1140
–
1210
150
1260
–
mV
ns
Pulse width when
VCS > VOCP2
CS pull-up current
-ICSPU
0.5
1
1.5
µA
Datasheet
29
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
4 Electrical characteristics and parameters
4.3.7
PWM generation
Table 11
Electrical characteristics
Parameter
Symbol
Values
Typ.
20
Unit Note or test
condition
Min.
16
Max.
Maximal on-time
tON_max
–
µs
For IZCDclp = 1.2
mA, and VVIN = 0.6
V DC afer internal
averaging.
Repetition time
tRep
tOff
47
42
52
47
60
µs
µs
VZCD = 0 V
Off-time
52.5
4.3.8
Gate driver
Table 12
Electrical characteristics
Symbol
Parameter
Values
Typ.
Unit
Note or test
condition
Min.
Max.
GD source current
GD sink current
GD peak voltage
-Isource
Isink
125
–
–
–
–
mA
mA
V
250
VGDfull
10.4
11.0
11.6
VVCC > (VGDfull + 0.5 V)
and in QRM.
Reduced GD peak voltage
VGDred
6.5
7.0
7.5
V
VVCC > (VGDred + 0.7
V), during start-up or
burst mode.
4.3.9
Clock oscillators
Table 13
Electrical characteristics
Parameter
Symbol
Values
Typ.
200
Unit Note or test
condition
Min.
Max.
Restart time
trestart
–
–
–
ms
ms
Fast restart time
trestart,fast
–
25
Only for VIN under
voltage (brownin
protection) event
4.3.10
Temperature sensor
Table 14
Electrical characteristics
Parameter
Symbol
Values
Typ.
–
Unit Note or test
condition
Min.
Max.
Relative accuracy of the temperature
sensor
ΔT
-6
+6
°C
°C
Shutdown temperature
T
–
130
–
Datasheet
30
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
5 Package dimensions
5
Package dimensions
The package dimensions of PG-DSO-8 are provided.
Figure 22
Package dimensions for PG-DSO-8
Datasheet
31
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
5 Package dimensions
Figure 23
Tape and reel for PG-DSO-8
Note:
You can find all of our packages, packing types and other package information on our Infineon
Internet page “Products”: http://www.infineon.com/products.
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pbfree finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Further
information on packages: https://www.infineon.com/packages
Datasheet
32
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
6 Glossary
6
Glossary
AC
Alternating current
ADC
BM
Analog-to-digital converter
Burst mode
CV
Constant voltage
CCM
DC
Continuous conduction mode
Direct current
DCM
EMI
ESD
LED
OCP
OTP
OVP
PF
Discontinuous conduction mode
Electromagnetic interference
Electrostatic discharge
Light emitting diode
Overcurrent protection
Overtemperature protection
Overvoltage protection
Power factor
PFC
PSR
QR
Power factor correction
Primary side regulated
Quasi-resonant
QRM
SSR
THD
UVLO
Quasi-resonant mode
Secondary side regulation
Total harmonic distortion
Under voltage lockout unit
Datasheet
33
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
7 Revision history
7
Revision history
Revision Date
Changes
2.0
2022-06-28
•
Updated explanatory text in Features, Potential applications, Description and
Table 1
•
•
•
•
•
•
•
•
•
Added column and information for product marking in Table 1
Updated explanatory text and figures in Functional description
Re-ordered section numbering in Functional description
Corrected fault matrix in Table 2
Added information of Green Product (RoHs compliant) in Package dimensions
Corrected symbol of VCC to VVCC in Chapter 4
Corrected TJ maximum value in Table 4
Corrected VVCC minimum and maximum value in Table 4
Shifed IZCDclp from Table 6 to Table 4, with improved parameter description and
note description
•
•
•
•
•
•
•
Improved parameter description of VVCCclamp in Table 5
Corrected note description of nZCDOVP in Table 6
Added note in Chapter 4.3.3
Removed "recommended" from note description of -IVSsink in Table 7
Editorial correction on note description of -IVSADCmin and -IVSADCmax in Table 7
Added fline in Table 4
Replaced VBO with ΔVBI-BO and its corresponding parameter description in Table
8
•
•
Removed minimum and maximum value of ΔVBI-BO from Table 8
Added "RUN state and not in burst mode." in note description of ΔVBI-BO in
Table 8
•
•
•
Editorial correction on the parameter description of VBI and VVINOV in Table 8
Corrected minimum, typical and maximum values of VBI in Table 8
Corrected chapter title from "THD configuration" to "TD configuration" in
Chapter 4.3.5
•
•
•
•
•
•
•
•
Improved parameter description of RTD,flyback and RTD in Table 9
Improved note description of RTD in Table 9
Added RTD,RUN in Table 9
Removed VTD,low and VTD,high from Table 9
Corrected typical value of tLEB in Table 10
Removed minimum and maximum value of tLEB from Table 10
Removed tCSOff from Table 10
Removed "no production test" from note description of tLEB and tOCP2 in Table
10
•
•
•
Removed tON_initial and tON_min from Table 11
Removed footnote of tON_max and tRep from Table 11
Removed "not tested in production" from note description of tON_max, tRep and
tOff in Table 11
•
•
•
Removed note description of -Isource and -Isink from Table 12
Changed symbol of VGD to VGDfull in Table 12
Improved parameter description and note description of VGDfull and VGDred in
Table 12
Datasheet
34
Rev. 2.0
2022-06-28
ICL88xx
Datasheet for ICL8800, ICL8810 and ICL8820
7 Revision history
Revision Date
Changes
•
•
•
Added "(brownin protection)" in note description of trestart,fast in Table 13
Removed note description of trestart and trestart,fast from Table 13
Improved parameter description of T in Table 14
1.0
2021-03-17
Initial release
Datasheet
35
Rev. 2.0
2022-06-28
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2022-06-28
Published by
Infineon Technologies AG
81726 Munich, Germany
Important notice
Warnings
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”).
With respect to any examples, hints or any typical
values stated herein and/or any information regarding
the application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities
of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer’s compliance with its obligations
stated in this document and any applicable legal
requirements, norms and standards concerning
customer’s products and any use of the product of
Infineon Technologies in customer’s applications.
Due to technical requirements products may contain
dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized representatives of Infineon Technologies,
Infineon Technologies’ products may not be used in
any applications where a failure of the product or
any consequences of the use thereof can reasonably
be expected to result in personal injury.
©
2022 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
IFX-ksh1514880840764
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to such
application.
相关型号：
©2020 ICPDF网 联系我们和版权申明