IPB083N15N5LF [INFINEON]
OptiMOS™线性FET是一种全新方法,实现了增强型MOSFET饱和区域内的导通电阻(R DS(on) )和线性模式能力的出色平衡。它提供先进的沟槽栅MOSFET R DS(on)以及经典平面MOSFET的宽安全工作区。;型号: | IPB083N15N5LF |
厂家: | Infineon |
描述: | OptiMOS™线性FET是一种全新方法,实现了增强型MOSFET饱和区域内的导通电阻(R DS(on) )和线性模式能力的出色平衡。它提供先进的沟槽栅MOSFET R DS(on)以及经典平面MOSFET的宽安全工作区。 栅 |
文件: | 总11页 (文件大小:994K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IPB083N15N5LF
MOSFET
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
D²PAK
Features
tab
•ꢀIdealꢀforꢀhot-swapꢀandꢀe-fuseꢀapplications
•ꢀVeryꢀlowꢀon-resistanceꢀꢀRDS(on)
•ꢀWideꢀsafeꢀoperatingꢀareaꢀSOA
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀ100%ꢀavalancheꢀtested
•ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC1)ꢀꢀforꢀtargetꢀapplications
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
1
3
Drain
Pin 2, Tab
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
VDS
150
V
Gate
Pin 1
RDS(on),max
ID
8.3
mΩ
A
Source
Pin 3
105
Ipulseꢀ(VDS=56ꢀV,ꢀtp=10
ms)
5.6
A
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPB083N15N5LF
PG-TO263-3
083N15LF
-
1) J-STD20 and JESD22
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTC=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
-
-
105
66
14
VGS=10ꢀV,ꢀTC=25ꢀ°C
Continuous drain current
ID
A
VGS=10ꢀV,ꢀTC=100ꢀ°C
VGS=10ꢀV,ꢀTC=25ꢀ°C,ꢀRthJAꢀ=40ꢀK/W1)
Pulsed drain current2)
Avalanche energy, single pulse3)
Gate source voltage
ID,pulse
EAS
-
-
-
-
-
420
10
A
TC=25ꢀ°C
-
mJ
V
ID=25ꢀA,ꢀRGS=25ꢀΩ
VGS
Ptot
-20
-
20
-
Power dissipation
179
W
TC=25ꢀ°C
IEC climatic category;
DIN IEC 68-1: 55/150/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
150
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case
RthJC
RthJA
-
0.45
0.7
K/W
K/W
-
-
Device on PCB,
minimal footprint
-
-
-
-
62
40
Device on PCB,
RthJA
K/W
-
6 cm² cooling area1)
1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2) See Diagram 3 for more detailed information
3) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
150
3.3
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
4.1
4.9
VDS=VGS,ꢀID=134ꢀµA
-
-
1
10
2
100
VDS=120ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=120ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
IDSS
IGSS
µA
µA
-
-
2
-2
5
-5
VGS=20ꢀV,ꢀVDS=0ꢀV
VGS=-10ꢀV,ꢀVDS=0ꢀV
Drain-source on-state resistance
Gate resistance1)
RDS(on)
RG
-
6.9
28
18
8.3
42
-
mΩ VGS=10ꢀV,ꢀID=100ꢀA
-
Ω
-
Transconductance
gfs
9
S
|VDS|>2|ID|RDS(on)max,ꢀID=52ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics1)ꢀ
Values
Typ.
160
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
210
960
-
Input capacitance
Ciss
Coss
Crss
-
-
-
pF
pF
pF
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz
Output capacitance
740
Reverse transfer capacitance
11
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=52ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
7
-
-
-
-
ns
ns
ns
ns
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=52ꢀA,
RG,ext=1.6ꢀΩ
46
25
6
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=52ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=52ꢀA,
RG,ext=1.6ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
1.2
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge1)
Gate charge total1)
Gate plateau voltage
Output charge1)
Qgs
-
-
-
-
-
-
nC
nC
nC
V
VDD=75ꢀV,ꢀID=52ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=52ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=52ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=52ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀVGS=0ꢀV
Qgd
31
-
Qg
45
-
Vplateau
Qoss
6.6
-
111
148
nC
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
-
Max.
105
420
1.2
-
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.99
61
92
V
VGS=0ꢀV,ꢀIF=100ꢀA,ꢀTj=25ꢀ°C
VR=75ꢀV,ꢀIF=52ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=75ꢀV,ꢀIF=52ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
-
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
200
120
175
150
125
100
75
100
80
60
40
20
0
50
25
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
100
1 µs
10 µs
0.5
0.2
100 µs
102
10 ms
1 ms
DC
10-1
0.1
101
0.05
0.02
0.01
single pulse
100
10-2
100
101
102
103
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
30
10
25
8
6
4
2
0
10V
8 V
20
15
10
5
10 V
7V
6V
5.5V
5V
0
0
1
2
3
4
5
0
5
10
15
20
25
30
35
40
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance
20
14
12
10
8
15
10
5
6
4
150 °C
2
25 °C
0
0
0
1
2
3
4
5
6
7
8
0
5
10
15
20
25
VGSꢀ[V]
IDꢀ[A]
ID=f(VGS),ꢀVDS=10V;ꢀparameter:ꢀTj
gfs=f(ID),ꢀVDS=5ꢀV,ꢀTj=25ꢀ°C
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀon-stateꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.00
5
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
4
3
2
1
0
1340 µA
134 µA
-80
-40
0
40
80
120
160
-80
-40
0
40
80
120
160
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=52ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
103
25 °C
25 °C, max
150 °C
150 °C, max
Coss
103
102
101
100
Ciss
102
Crss
101
0
25
50
75
100
125
150
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
12
10
8
75V
30V
120V
101
6
100 °C
25 °C
100
4
2
125 °C
10-1
0
100
101
102
103
0
10
20
30
40
50
60
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate);ꢀID=52ꢀAꢀpulsed,ꢀresistiveꢀload;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
160
158
156
154
152
150
148
146
144
-80
-40
0
40
80
120
160
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
5ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TO263-3,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2022-09-09
OptiMOSTMꢀ5ꢀLinearꢀFET,ꢀ150ꢀV
IPB083N15N5LF
RevisionꢀHistory
IPB083N15N5LF
Revision:ꢀ2022-09-09,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
Release of final version
Update legend Diagram 7
2017-04-04
2022-09-09
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failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2022-09-09
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