IPD053N08N3 G [INFINEON]

OptiMOS™ 系列是高效率解决方案的市场领导者,适用于发电(例如太阳能微逆变器)、电源(例如服务器和通信)以及功耗(例如电动车)领域。;
IPD053N08N3 G
型号: IPD053N08N3 G
厂家: Infineon    Infineon
描述:

OptiMOS™ 系列是高效率解决方案的市场领导者,适用于发电(例如太阳能微逆变器)、电源(例如服务器和通信)以及功耗(例如电动车)领域。

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IPD053N08N3 G  
OptiMOS®3 Power-Transistor  
Product Summary  
Features  
VDS  
80  
5.3  
90  
V
• N-channel, normal level  
RDS(on),max  
ID  
mW  
A
• Excellent gate charge x R DS(on) product (FOM)  
• Very low on-resistance R DS(on)  
• 175 °C operating temperature  
previous engineering  
sample code:  
IPD06CN08N  
• Pb-free lead plating; RoHS compliant  
• Qualified according to JEDEC1) for target application  
• Ideal for high-frequency switching and synchronous rectification  
• Halogen-free according to IEC61249-2-21  
Type  
IPD053N08N3 G  
Package  
Marking  
PG-TO252-3  
053N08N  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol Conditions  
Unit  
T C=25 °C2)  
I D  
Continuous drain current  
90  
90  
A
T C=100 °C  
Pulsed drain current2)  
I D,pulse  
E AS  
T C=25 °C  
360  
I D=90 A, R GS=25 W  
Avalanche energy, single pulse  
Gate source voltage  
190  
mJ  
V
V GS  
±20  
P tot  
T C=25 °C  
Power dissipation  
150  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... 175  
55/175/56  
Rev. 1.1  
page 1  
2014-05-19  
IPD053N08N3 G  
Values  
Parameter  
Symbol Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics  
R thJC  
Thermal resistance, junction - case  
Thermal resistance,  
-
-
-
-
-
-
1
K/W  
R thJA  
minimal footprint  
75  
50  
6 cm2 cooling area3)  
junction - ambient  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS V GS=0 V, I D=1 mA  
V GS(th) V DS=V GS, I D=90 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
80  
2
-
-
V
2.8  
3.5  
V DS=80 V, V GS=0 V,  
T j=25 °C  
I DSS  
Zero gate voltage drain current  
-
-
0.1  
10  
1
µA  
V DS=80 V, V GS=0 V,  
T j=125 °C  
100  
I GSS  
V GS=20 V, V DS=0 V  
Gate-source leakage current  
-
-
-
1
100 nA  
R DS(on) V GS=10 V, I D=90 A  
V GS=6 V, I D=45 A  
Drain-source on-state resistance  
4.4  
5.8  
5.3  
9.5  
mW  
R G  
Gate resistance  
-
2.2  
-
-
W
|V DS|>2|I D|R DS(on)max  
I D=90 A  
,
g fs  
Transconductance  
56  
111  
S
1)J-STD20 and JESD22  
2) See figure 3  
3) Device on 40 mm x 40 mm x 1.5 mm  
epoxy PCB FR4 with 6 cm2 (one layer, 70  
Rev. 1.1  
page 2  
2014-05-19  
IPD053N08N3 G  
Values  
Parameter  
Symbol Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
-
-
-
-
-
-
-
3570  
963  
36  
4750 pF  
1280  
V GS=0 V, V DS=40 V,  
f =1 MHz  
C oss  
C rss  
t d(on)  
t r  
54  
18  
-
-
-
-
ns  
66  
V DD=40 V, V GS=10 V,  
I D=90 A, R G,ext=1.6 W  
t d(off)  
t f  
Turn-off delay time  
Fall time  
38  
10  
Gate Charge Characteristics4)  
Gate to source charge  
Gate to drain charge  
Switching charge  
Q gs  
-
-
-
-
-
-
19  
11  
19  
52  
5.3  
70  
25  
16  
28  
69  
-
nC  
Q gd  
V DD=40 V, I D=90A,  
V GS=0 to 10 V  
Q sw  
Q g  
Gate charge total  
V plateau  
Q oss  
Gate plateau voltage  
Output charge  
V
V DD=40 V, V GS=0 V  
93  
nC  
Reverse Diode  
I S  
Diode continous forward current  
Diode pulse current  
-
-
-
-
90  
A
T C=25 °C  
I S,pulse  
360  
V GS=0 V, I F=90 A,  
T j=25 °C  
V SD  
Diode forward voltage  
-
1.0  
1.2  
V
t rr  
Reverse recovery time  
-
-
72  
-
-
ns  
V R=40 V, I F=I S,  
di F/dt =100 A/µs  
Q rr  
Reverse recovery charge  
130  
nC  
4) See figure 16 for gate charge parameter definition  
Rev. 1.1  
page 3  
2014-05-19  
IPD053N08N3 G  
1 Power dissipation  
2 Drain current  
P tot=f(T C)  
I D=f(T C); V GS≥10 V  
100  
80  
60  
40  
20  
0
150  
120  
90  
60  
30  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TC [°C]  
TC [°C]  
3 Safe operating area  
I D=f(V DS); T C=25 °C; D =0  
parameter: t p  
4 Max. transient thermal impedance  
Z thJC=f(t p)  
parameter: D =t p/T  
103  
101  
limited by on-state  
resistance  
1 µs  
10 µs  
102  
100 µs  
100  
0.5  
1 ms  
0.2  
0.1  
10 ms  
101  
10-1  
0.05  
DC  
0.02  
0.01  
single pulse  
100  
10-2  
10-1  
100  
101  
102  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDS [V]  
tp [s]  
Rev. 1.1  
page 4  
2014-05-19  
IPD053N08N3 G  
5 Typ. output characteristics  
I D=f(V DS); T j=25 °C  
6 Typ. drain-source on resistance  
R DS(on)=f(I D); T j=25 °C  
parameter: V GS  
parameter: V GS  
360  
20  
8 V  
10 V  
7 V  
320  
16  
280  
5.5 V  
5 V  
4.5 V  
6.5 V  
240  
200  
160  
120  
80  
12  
8
6 V  
6 V  
5.5 V  
6.5 V  
8 V  
7 V  
4
10 V  
5 V  
40  
4.5 V  
0
0
0
1
2
3
4
5
0
40  
80  
120  
160  
VDS [V]  
ID [A]  
7 Typ. transfer characteristics  
I D=f(V GS); |V DS|>2|I D|R DS(on)max  
parameter: T j  
8 Typ. forward transconductance  
g fs=f(I D); T j=25 °C  
160  
120  
80  
40  
0
150  
120  
90  
60  
175 °C  
25 °C  
30  
0
0
2
4
6
8
0
40  
80  
120  
160  
VGS [V]  
ID [A]  
Rev. 1.1  
page 5  
2014-05-19  
IPD053N08N3 G  
9 Drain-source on-state resistance  
10 Typ. gate threshold voltage  
V GS(th)=f(T j); V GS=V DS  
parameter: I D  
R DS(on)=f(T j); I D=90 A; V GS=10 V  
12  
10  
8
4
3
900 µA  
90 µA  
98 %  
6
2
typ  
4
1
0
2
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
Tj [°C]  
Tj [°C]  
11 Typ. capacitances  
12 Forward characteristics of reverse diode  
I F=f(V SD  
C =f(V DS); V GS=0 V; f =1 MHz  
)
parameter: T j  
104  
103  
Ciss  
Coss  
175 °C, 98%  
25 °C  
175 °C  
103  
102  
25 °C, 98%  
102  
101  
Crss  
101  
100  
0
0
20  
40  
60  
80  
0.5  
1
1.5  
2
VDS [V]  
VSD [V]  
Rev. 1.1  
page 6  
2014-05-19  
IPD053N08N3 G  
13 Avalanche characteristics  
14 Typ. gate charge  
V GS=f(Q gate); I D=90 A pulsed  
parameter: V DD  
I AS=f(t AV); R GS=25 W  
parameter: T j(start)  
100  
10  
1
12  
10  
8
25 °C  
40 V  
20 V  
60 V  
100 °C  
6
150 °C  
4
2
0
0.1  
1
10  
100  
1000  
0
20  
40  
60  
tAV [µs]  
Qgate [nC]  
15 Drain-source breakdown voltage  
16 Gate charge waveforms  
V BR(DSS)=f(T j); I D=1 mA  
90  
85  
80  
75  
70  
65  
60  
V GS  
Qg  
V gs(th)  
Qg(th)  
Qsw  
Qgd  
Qgate  
Qgs  
-60  
-20  
20  
60  
100  
140  
180  
Tj [°C]  
Rev. 1.1  
page 7  
2014-05-19  
IPD053N08N3 G  
PG-TO252-3 (D-Pak)  
Rev. 1.1  
page 8  
2014-05-19  
IPD053N08N3 G  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 2007 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of  
conditions or characteristics. With respect to any examples or hints given herein, any typical  
values stated herein and/or any information regarding the application of the device,  
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,  
including without limitation, warranties of non-infringement of intellectual property rights  
of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please  
contact the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information  
on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with  
the express written approval of Infineon Technologies, if a failure of such components can  
reasonably be expected to cause the failure of that life-support device or system or to affect  
the safety or effectiveness of that device or system. Life support devices or systems are  
intended to be implanted in the human body or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user  
Rev. 1.1  
page 9  
2014-05-19  

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