IPN70R900P7S [INFINEON]

CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。;
IPN70R900P7S
型号: IPN70R900P7S
厂家: Infineon    Infineon
描述:

CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。

文件: 总13页 (文件大小:1023K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IPN70R900P7S  
MOSFET  
PG-SOT223  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
CoolMOS™ꢀisꢀaꢀrevolutionaryꢀtechnologyꢀforꢀhighꢀvoltageꢀpower  
MOSFETs,ꢀdesignedꢀaccordingꢀtoꢀtheꢀsuperjunctionꢀ(SJ)ꢀprincipleꢀand  
pioneeredꢀbyꢀInfineonꢀTechnologies.  
TheꢀlatestꢀCoolMOS™ꢀP7ꢀisꢀanꢀoptimizedꢀplatformꢀtailoredꢀtoꢀtargetꢀcost  
sensitiveꢀapplicationsꢀinꢀconsumerꢀmarketsꢀsuchꢀasꢀcharger,ꢀadapter,  
lighting,ꢀTV,ꢀetc.  
TheꢀnewꢀseriesꢀprovidesꢀallꢀtheꢀbenefitsꢀofꢀaꢀfastꢀswitchingꢀSuperjunction  
MOSFET,ꢀcombinedꢀwithꢀanꢀexcellentꢀprice/performanceꢀratioꢀandꢀstateꢀof  
theꢀartꢀease-of-useꢀlevel.ꢀTheꢀtechnologyꢀmeetsꢀhighestꢀefficiency  
standardsꢀandꢀsupportsꢀhighꢀpowerꢀdensity,ꢀenablingꢀcustomersꢀgoing  
towardsꢀveryꢀslimꢀdesigns.  
Drain  
Pin 2, Tab  
Features  
•ꢀExtremelyꢀlowꢀlossesꢀdueꢀtoꢀveryꢀlowꢀFOMꢀRDS(on)*QgꢀandꢀRDS(on)*Eoss  
•ꢀExcellentꢀthermalꢀbehavior  
•ꢀIntegratedꢀESDꢀprotectionꢀdiode  
Gate  
Pin 1  
•ꢀLowꢀswitchingꢀlossesꢀ(Eoss  
•ꢀProductꢀvalidationꢀacc.ꢀJEDECꢀStandard  
)
Source  
Pin 3  
Benefits  
•ꢀCostꢀcompetitiveꢀtechnology  
•ꢀLowerꢀtemperature  
•ꢀHighꢀESDꢀruggedness  
•ꢀEnablesꢀefficiencyꢀgainsꢀatꢀhigherꢀswitchingꢀfrequencies  
•ꢀEnablesꢀhighꢀpowerꢀdensityꢀdesignsꢀandꢀsmallꢀformꢀfactors  
Potentialꢀapplications  
RecommendedꢀforꢀFlybackꢀtopologiesꢀforꢀexampleꢀusedꢀinꢀChargers,  
Adapters,ꢀLightingꢀApplications,ꢀetc.  
Pleaseꢀnote:ꢀForꢀMOSFETꢀparallelingꢀtheꢀuseꢀofꢀferriteꢀbeadsꢀonꢀtheꢀgate  
orꢀseperateꢀtotemꢀpolesꢀisꢀgenerallyꢀrecommended.  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
VDS @ Tj=25°C  
RDS(on),max  
Value  
700  
0.9  
Unit  
V
Qg,typ  
6.8  
nC  
A
ID,pulse  
12.8  
0.9  
Eoss @ 400V  
V(GS)th,typ  
µJ  
V
3
ESD class (HBM)  
1C  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPN70R900P7S  
PG-SOT223  
70S900  
see Appendix A  
Final Data Sheet  
1
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Final Data Sheet  
2
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTjꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
6
3.5  
TC = 20°C  
A
Continuous drain current1)  
Pulsed drain current2)  
ID  
TC = 100°C  
ID,pulse  
IAS  
-
-
-
-
-
-
12.8  
3.6  
A
A
TC=25°C  
Application (Flyback) relevant  
avalanche current, single pulse3)  
measured with standard leakage  
inductance of transformer of 5µH  
MOSFET dv/dt ruggedness  
Gate source voltage  
dv/dt  
VGS  
100  
V/ns VDSꢀ=0...400V  
-16  
-30  
-
-
16  
30  
static;  
V
AC (f>1 Hz)  
Power dissipation  
Ptot  
-
-
-
-
-
-
-
-
6.5  
150  
1.9  
12.8  
1
W
°C  
A
TC=25°C  
-
Operating and storage temperature  
Continuous diode forward current  
Diode pulse current2)  
Reverse diode dv/dt4)  
Maximum diode commutation speed4) dif/dt  
Tj,ꢀTstg  
IS  
-40  
-
-
-
-
-
TC=25°C  
TC = 25°C  
IS,pulse  
A
dv/dt  
V/ns VDSꢀ=0...400V,ꢀISD<=IS,ꢀTj=25°C  
A/µs VDSꢀ=0...400V,ꢀISD<=IS,ꢀTj=25°C  
50  
Insulation withstand voltage VISO  
n.a.  
V
Vrms, TC=25°C, t=1min  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - solder  
point  
RthJS  
-
-
-
19.1  
°C/W -  
Thermal resistance, junction - ambient  
for minimal footprint  
RthJA  
-
-
-
160  
75  
°C/W minimal footprint  
Device on 40mm*40mm*1.5 epoxy  
PCB FR4 with 6cm2 (one layer 70µm  
°C/W thick) copper area for drain  
connection and cooling. PCB is  
vertical without blown air.  
Thermal resistance, junction - ambient  
soldered on copper area  
RthJA  
-
-
Soldering temperature, wavesoldering  
only allowed at leads  
Tsold  
260  
°C  
reflow MSL1  
1) DPAK / IPAK equivalent. Limited by Tj max. Tj = 20°C. Maximum duty cycle D=0.5  
2) Pulse width tp limited by Tj,max  
3) Proven during verification test. For explanation please read AN - CoolMOSTM 700V P7.  
4)VDClink=400V;ꢀVDS,peak<V(BR)DSS;ꢀidenticalꢀlowꢀsideꢀandꢀhighꢀsideꢀswitchꢀwithꢀidenticalꢀRG  
Final Data Sheet  
3
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
700  
Typ.  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
V(GS)th  
-
V
V
VGS=0V,ꢀID=1mA  
2.50  
3
3.50  
VDS=VGS,ꢀID=0.06mA  
-
-
-
10  
1
-
VDS=700V,ꢀVGS=0V,ꢀTj=25°C  
VDS=700V,ꢀVGS=0V,ꢀTj=150°C  
Zero gate voltage drain current  
IDSS  
µA  
µA  
Gate-source leakage current incl. Zener  
diode  
IGSS  
RDS(on)  
RG  
-
-
1
VGS=20V,ꢀVDS=0V  
-
-
0.74  
1.53  
0.90  
-
VGS=10V,ꢀID=1.1A,ꢀTj=25°C  
VGS=10V,ꢀID=1.1A,ꢀTj=150°C  
Drain-source on-state resistance  
Gate resistance  
-
1.6  
-
f=1ꢀMHz,ꢀopenꢀdrain  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
211  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
Output capacitance  
Ciss  
-
-
-
-
pF  
pF  
VGS=0V,ꢀVDS=400V,ꢀf=250kHz  
VGS=0V,ꢀVDS=400V,ꢀf=250kHz  
Coss  
5
Effective output capacitance, energy  
related1)  
Co(er)  
Co(tr)  
td(on)  
tr  
-
-
-
-
-
-
13  
-
-
-
-
-
-
pF  
pF  
ns  
ns  
ns  
ns  
VGS=0V,ꢀVDS=0...400V  
Effective output capacitance, time  
related2)  
177  
12  
ID=constant,ꢀVGS=0V,ꢀVDS=0...400V  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
Turn-on delay time  
Rise time  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
4.7  
58  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
Turn-off delay time  
Fall time  
td(off)  
tf  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
31  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics  
Values  
Typ.  
0.9  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Qgs  
-
-
-
-
-
-
-
-
nC  
nC  
nC  
V
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
Qgd  
2.6  
Qg  
6.8  
Gate plateau voltage  
Vplateau  
4.4  
1)Co(er)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V  
2)Co(tr)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V  
Final Data Sheet  
4
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics  
Values  
Typ.  
0.9  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Diode forward voltage  
VSD  
trr  
-
-
-
-
-
-
-
-
V
VGS=0V,ꢀIF=1.4A,ꢀTj=25°C  
Reverse recovery time  
160  
0.5  
ns  
µC  
A
VR=400V,ꢀIF=0.9A,ꢀdiF/dt=50A/µs  
VR=400V,ꢀIF=0.9A,ꢀdiF/dt=50A/µs  
VR=400V,ꢀIF=0.9A,ꢀdiF/dt=50A/µs  
Reverse recovery charge  
Peak reverse recovery current  
Qrr  
Irrm  
7
Final Data Sheet  
5
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀSafeꢀoperatingꢀarea  
10  
102  
9
8
7
6
5
4
3
2
1
0
101  
100  
10 µs  
1 µs  
100 µs  
1 ms  
10-1  
10-2  
10-3  
10 ms  
DC  
0
25  
50  
75  
100  
125  
150  
100  
101  
102  
103  
TCꢀ[°C]  
VDSꢀ[V]  
Ptot=f(TC)  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
102  
102  
101  
100  
1 µs  
101  
10 µs  
0.5  
100 µs  
0.2  
0.1  
1 ms  
10-1  
10-2  
10-3  
100  
0.05  
0.02  
10 ms  
0.01  
single pulse  
DC  
10-1  
100  
101  
102  
103  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=80ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJCꢀ=f(tP);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀoutputꢀcharacteristics  
14  
10  
20 V  
20 V  
10 V  
10 V  
9
8
7
6
5
4
3
2
1
0
8 V  
7 V  
6 V  
12  
8 V  
7 V  
10  
6 V  
5.5 V  
8
6
5.5 V  
5 V  
4
5 V  
4.5 V  
2
4.5 V  
0
0
5
10  
15  
20  
0
5
10  
15  
20  
VDSꢀ[V]  
VDSꢀ[V]  
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
ID=f(VDS);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance  
Diagramꢀ8:ꢀDrain-sourceꢀon-stateꢀresistance  
6
2.00  
7 V  
1.80  
1.60  
1.40  
5
4
3
2
1
0
5.5 V  
6.5 V  
6 V  
5 V  
98%  
1.20  
10 V  
1.00  
typ  
0.80  
0.60  
0.40  
0.20  
0.00  
0
5
10  
15  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
IDꢀ[A]  
Tjꢀ[°C]  
RDS(on)=f(ID);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(Tj);ꢀID=1.1ꢀA;ꢀVGS=10ꢀV  
Final Data Sheet  
7
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
Diagramꢀ9:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ10:ꢀTyp.ꢀgateꢀcharge  
14  
10  
9
8
25 °C  
12  
10  
7
6
5
4
3
2
1
0
120 V  
400 V  
8
150 °C  
6
4
2
0
0
2
4
6
8
10  
12  
0
2
4
6
8
VGSꢀ[V]  
Qgateꢀ[nC]  
ID=f(VGS);ꢀVDS=20V;ꢀparameter:ꢀTj  
VGS=f(Qgate);ꢀID=0.9ꢀAꢀpulsed;ꢀparameter:ꢀVDD  
Diagramꢀ11:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
Diagramꢀ13:ꢀDrain-sourceꢀbreakdownꢀvoltage  
102  
840  
25 °C  
125 °C  
820  
800  
780  
760  
740  
720  
700  
680  
660  
640  
620  
600  
101  
100  
10-1  
0.0  
0.5  
1.0  
1.5  
2.0  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
VSDꢀ[V]  
Tjꢀ[°C]  
IF=f(VSD);ꢀparameter:ꢀTj  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
8
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
Diagramꢀ14:ꢀTyp.ꢀcapacitances  
Diagramꢀ15:ꢀTyp.ꢀCossꢀstoredꢀenergy  
104  
2.00  
1.80  
1.60  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
0.00  
103  
Ciss  
102  
101  
Coss  
100  
Crss  
10-1  
0
100  
200  
300  
400  
500  
0
100  
200  
300  
400  
500  
600  
700  
VDSꢀ[V]  
VDSꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=250ꢀkHz  
Eoss=f(VDS)  
Final Data Sheet  
9
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
5ꢀꢀꢀꢀꢀTestꢀCircuits  
Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics  
Test circuit for diode characteristics  
Diode recovery waveform  
Rg1  
VDS  
Rg 2  
IF  
Rg1 = Rg 2  
Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimes  
Switching times test circuit for inductive load  
Switching times waveform  
VDS  
90%  
10%  
VDS  
VGS  
VGS  
td(off)  
tf  
td(on)  
ton  
tr  
toff  
Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀload  
Unclamped inductive load test circuit  
Unclamped inductive waveform  
V(BR)DS  
ID  
VDS  
VDS  
VDS  
ID  
Final Data Sheet  
10  
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
6ꢀꢀꢀꢀꢀPackageꢀOutlines  
DOCUMENT NO.  
Z8B00180553  
0
SCALE  
MILLIMETERS  
DIM  
INCHES  
MIN  
1.52  
-
MAX  
1.80  
0.10  
1.70  
0.80  
3.10  
0.32  
6.70  
7.30  
3.70  
MIN  
0.060  
-
MAX  
2.5  
A
A1  
A2  
b
0.071  
0.004  
0.067  
0.031  
0.122  
0.013  
0.264  
0.287  
0.146  
0
2.5  
1,50  
0.059  
0.024  
0.116  
0.009  
0.248  
0.264  
0.130  
5mm  
0.60  
2.95  
0.24  
6.30  
6.70  
3.30  
b2  
c
EUROPEAN PROJECTION  
D
E
E1  
e
2.3 BASIC  
4.6 BASIC  
0.091 BASIC  
0.181 BASIC  
e1  
L
ISSUE DATE  
24-02-2016  
0.75  
1.10  
0.030  
0.043  
N
3
3
REVISION  
O
ꢀƒ  
ꢁꢀƒ  
ꢀƒ  
ꢁꢀƒ  
01  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-SOT223,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
11  
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
7ꢀꢀꢀꢀꢀAppendixꢀA  
Tableꢀ11ꢀꢀꢀꢀꢀRelatedꢀLinks  
IFXꢀCoolMOSªꢀP7ꢀWebpage:ꢀwww.infineon.com  
IFXꢀDesignꢀtools:ꢀwww.infineon.com  
Final Data Sheet  
12  
Rev.ꢀ2.2,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPN70R900P7S  
RevisionꢀHistory  
IPN70R900P7S  
Revision:ꢀ2018-02-13,ꢀRev.ꢀ2.2  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
2.2  
Release of final version  
Changed to MSL level 1  
Corrected front page text  
2017-06-23  
2017-09-15  
2018-02-13  
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG  
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,  
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,  
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,  
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,  
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.  
TrademarksꢀupdatedꢀAugustꢀ2015  
OtherꢀTrademarks  
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.  
WeꢀListenꢀtoꢀYourꢀComments  
Anyꢀinformationꢀwithinꢀthisꢀdocumentꢀthatꢀyouꢀfeelꢀisꢀwrong,ꢀunclearꢀorꢀmissingꢀatꢀall?ꢀYourꢀfeedbackꢀwillꢀhelpꢀusꢀtoꢀcontinuously  
improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:  
erratum@infineon.com  
Publishedꢀby  
InfineonꢀTechnologiesꢀAG  
81726ꢀMünchen,ꢀGermany  
©ꢀ2018ꢀInfineonꢀTechnologiesꢀAG  
AllꢀRightsꢀReserved.  
LegalꢀDisclaimer  
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristicsꢀ  
(“Beschaffenheitsgarantie”)ꢀ.  
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe  
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation  
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.  
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis  
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe  
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.  
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s  
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct  
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.  
Information  
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon  
TechnologiesꢀOfficeꢀ(www.infineon.com).  
Warnings  
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,  
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.  
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or  
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
Final Data Sheet  
13  
Rev.ꢀ2.2,ꢀꢀ2018-02-13  

相关型号:

IPN80R1K2P7

800V CoolMOS™ P7超结MOSFET系列完全适合低功率SMPS应用,可完全满足性能,易用性和性价比等市场需求。它主要侧重于反激式应用,包括适配器和充电器,LED驱动器,音频SMPS,辅助和工业电源。
INFINEON

IPN80R3K3P7

800V CoolMOSª P7 Power Transistor
INFINEON

IPN80R4K5P7

800V CoolMOS™ P7超结MOSFET系列完全适合低功率SMPS应用,可完全满足性能,易用性和性价比等市场需求。它主要侧重于反激式应用,包括适配器和充电器,LED驱动器,音频SMPS,辅助和工业电源。
INFINEON

IPN80R750P7

800V CoolMOS™ P7超结MOSFET系列完全适合低功率SMPS应用,可完全满足性能,易用性和性价比等市场需求。它主要侧重于反激式应用,包括适配器和充电器,LED驱动器,音频SMPS,辅助和工业电源。
INFINEON

IPN95R1K2P7

Designed to meet the growing consumer needs in the high voltage MOSFETs arena, the latest 950V CoolMOS™ P7 technology focuses on the low-power SMPS market.
INFINEON

IPP-1054

OUTLINE 4 WAY
IPP

IPP-1110

OUTLINE 4 WAY
IPP

IPP-1171

OUTLINE 4-WAY
IPP

IPP-1176

OUTLINE 2-WAY
IPP

IPP-1177

OUTLINE 4-WAY
IPP

IPP-1188

OUTLINE 2-WAY
IPP

IPP-1211

OUTLINE 4-WAY
IPP