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IPT039N15N5 [INFINEON]

英飞凌无引脚 TO 封装型 OptiMOS™ 功率 MOSFET 针对大电流应用进行优化，如叉车、轻型电动车 (LEV)、电动工具、负载点 (POL)、电信和电熔丝。此外，封装尺寸缩小了 60%，设计更为紧凑。相较于 D²PAK 7 引脚封装，无引脚 TO 封装尺寸大幅减少了 30%。同时封装高度也降低了 50%，在机架式或刀片服务器等空间狭小的应用中表现出显著优势。;
IPT039N15N5
型号： IPT039N15N5
厂家： Infineon    Infineon
描述：

英飞凌无引脚 TO 封装型 OptiMOS™ 功率 MOSFET 针对大电流应用进行优化，如叉车、轻型电动车 (LEV)、电动工具、负载点 (POL)、电信和电熔丝。此外，封装尺寸缩小了 60%，设计更为紧凑。相较于 D²PAK 7 引脚封装，无引脚 TO 封装尺寸大幅减少了 30%。同时封装高度也降低了 50%，在机架式或刀片服务器等空间狭小的应用中表现出显著优势。

服务器 电信 电熔丝
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中文：  中文翻译
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IPT039N15N5  
MOSFET  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
TOLL  
Features  
Tab  
•ꢀN-channel  
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)  
•ꢀSuperiorꢀthermalꢀresistance  
•ꢀ100%ꢀavalancheꢀtested  
1
2
3
4
5
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
6
7
8
Productꢀvalidation  
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications  
Drain  
Tab  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
Value  
150  
3.9  
Unit  
Gate  
Pin 1  
VDS  
V
Source  
Pin 2-8  
RDS(on),max  
ID  
mΩ  
A
190  
219  
78  
Qoss  
nC  
nC  
QG  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
039N15N5  
RelatedꢀLinks  
IPT039N15N5  
PG-HSOF-8  
-
Final Data Sheet  
1
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Final Data Sheet  
2
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
-
-
-
-
190  
134  
128  
21  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
VGS=10ꢀV,ꢀTC=100ꢀ°C  
Continuous drain current1)  
ID  
A
VGS=8ꢀV,ꢀTC=100ꢀ°C  
VGS=10V,TA=25°C,RthJA=40°C/W2)  
Pulsed drain current3)  
Avalanche energy, single pulse4)  
ID,pulse  
EAS  
-
-
-
-
760  
255  
20  
A
TA=25ꢀ°C  
-
mJ  
V
ID=100ꢀA,ꢀRGS=25ꢀΩ  
Gate source voltage  
VGS  
-20  
-
-
-
-
-
319  
3.8  
TC=25ꢀ°C  
Power dissipation  
Ptot  
W
TA=25ꢀ°C,ꢀRthJA=40ꢀ°C/W2)  
IEC climatic category; DIN IEC 68-1:  
55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case  
RthJC  
RthJA  
-
0.47  
°C/W -  
°C/W -  
Thermal resistance, junction - ambient,  
minimal footprint  
-
-
-
-
62  
40  
Thermal resistance, junction - ambient,  
6 cm² cooling area2)  
RthJA  
°C/W -  
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature  
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual  
environmental conditions.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
3) See Diagram 3 for more detailed information  
4) See Diagram 13 for more detailed information  
Final Data Sheet  
3
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
150  
3.0  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
3.8  
4.6  
VDS=VGS,ꢀID=257ꢀµA  
-
-
0.1  
10  
1.0  
100  
VDS=120ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=120ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
IDSS  
µA  
nA  
IGSS  
-
10  
100  
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
-
3.3  
3.6  
3.9  
4.3  
VGS=10ꢀV,ꢀID=50ꢀA  
VGS=8ꢀV,ꢀID=25ꢀA  
RDS(on)  
mΩ  
Gate resistance  
RG  
gfs  
-
-
0.9  
-
-
Ω
-
Transconductance  
110  
S
|VDS|≥2|ID|RDS(on)max,ꢀID=50ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance1)  
Output capacitance1)  
Reverse transfer capacitance1)  
Ciss  
Coss  
Crss  
-
-
-
5900 7700 pF  
1500 1930 pF  
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz  
33  
58  
-
pF  
ns  
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
18.7  
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,  
RG,ext=1.6ꢀΩ  
4.5  
-
-
-
ns  
ns  
ns  
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-off delay time  
Fall time  
23.5  
5.4  
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,  
RG,ext=1.6ꢀΩ  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ  
Values  
Typ.  
31  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge1)  
Switching charge  
Gate charge total1)  
Gate plateau voltage  
Output charge1)  
Qgs  
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=75ꢀV,ꢀVGS=0ꢀV  
Qg(th)  
Qgd  
22  
-
15.5  
24  
23  
-
Qsw  
Qg  
78  
98  
-
Vplateau  
Qoss  
5.3  
219  
291  
nC  
1) Defined by design. Not subject to production test.  
2) See ″Gate charge waveforms″ for parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
190  
760  
1.0  
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
-
A
A
V
TC=25ꢀ°C  
IS,pulse  
VSD  
trr  
-
TC=25ꢀ°C  
Diode forward voltage  
0.81  
53.4  
77.2  
VGS=0ꢀV,ꢀIF=50ꢀA,ꢀTj=25ꢀ°C  
VR=75ꢀV,ꢀIF=50ꢀA,ꢀdiF/dt=100ꢀA/µs  
VR=75ꢀV,ꢀIF=50ꢀA,ꢀdiF/dt=100ꢀA/µs  
Reverse recovery time1)  
Reverse recovery charge1)  
106.8 ns  
154.4 nC  
Qrr  
1) Defined by design. Not subject to production test.  
Final Data Sheet  
5
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
350  
200  
175  
150  
125  
100  
75  
300  
250  
200  
150  
100  
50  
50  
25  
0
0
0
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS≥10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
103  
101  
1 µs  
single pulse  
0.01  
0.02  
10 µs  
0.05  
0.1  
0.2  
0.5  
102  
100  
100 µs  
DC  
101  
1 ms  
10-1  
10-2  
10-3  
100  
10-1  
10-2  
10 ms  
100  
101  
102  
103  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
800  
10  
10 V  
7 V  
700  
8 V  
6 V  
8
600  
500  
400  
300  
200  
100  
0
6
4
2
0
7 V  
8 V  
10 V  
6 V  
5 V  
0
1
2
3
4
5
0
50  
100  
150  
200  
250  
300  
350  
400  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
400  
10  
350  
300  
250  
200  
150  
100  
175 °C  
8
6
4
2
0
25 °C  
175 °C  
25 °C  
50  
0
0
1
2
3
4
5
6
7
4
5
6
7
8
9
10  
VGSꢀ[V]  
VGSꢀ[V]  
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
RDS(on)=f(VGS),ꢀID=50ꢀA;ꢀparameter:ꢀTj  
Final Data Sheet  
7
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
2.4  
5
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
4
3
2
1
0
2570 µA  
257 µA  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj),ꢀID=50ꢀA,ꢀVGS=10ꢀV  
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
104  
103  
25 °C  
25 °C, max  
175 °C  
Ciss  
175 °C, max  
103  
102  
101  
102  
101  
100  
Coss  
Crss  
0
25  
50  
75  
100  
125  
150  
0.00  
0.25  
0.50  
0.75  
1.00  
1.25  
1.50  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
103  
10  
30 V  
75 V  
120 V  
8
6
4
2
0
102  
25 °C  
101  
100 °C  
100  
150 °C  
10-1  
10-1  
100  
101  
102  
103  
0
10  
20  
30  
40  
50  
60  
70  
80  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start  
VGS=f(Qgate),ꢀID=50ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
160  
158  
156  
154  
152  
150  
148  
146  
144  
-80  
-40  
0
40  
80  
120  
160  
200  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
1) partially covered with Mold Flash  
MILLIMETERS  
INCHES  
DIM  
MIN  
2.20  
0.70  
9.70  
0.42  
0.40  
10.28  
MAX  
2.40  
0.90  
9.90  
0.50  
0.60  
10.58  
MIN  
MAX  
0.094  
0.035  
0.390  
0.020  
0.024  
0.416  
DOCUMENT NO.  
Z8B00169619  
A
b
0.087  
0.028  
0.382  
0.017  
0.016  
0.405  
b1  
b2  
c
0
SCALE  
D
2
D2  
E
3.30  
0.130  
9.70  
10.10  
0.382  
0.398  
0
2
E1  
E4  
E5  
e
7.50  
8.50  
0.295  
0.335  
4mm  
9.46  
1.20 (BSC)  
0.372  
0.047 (BSC)  
EUROPEAN PROJECTION  
H
11.48  
6.55  
11.88  
6.75  
0.452  
0.258  
0.468  
0.266  
H1  
H2  
H3  
H4  
N
7.15  
3.59  
3.26  
8
0.281  
0.141  
0.128  
8
ISSUE DATE  
20-02-2014  
K1  
L
4.18  
0.165  
1.60  
1.00  
2.10  
1.30  
0.063  
0.039  
0.083  
0.051  
L1  
L2  
L4  
0.70  
0.60  
0.028  
0.024  
REVISION  
02  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HSOF-8,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
10  
Rev.ꢀ2.1,ꢀꢀ2023-03-08  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV  
IPT039N15N5  
RevisionꢀHistory  
IPT039N15N5  
Revision:ꢀ2023-03-08,ꢀRev.ꢀ2.1  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
2021-09-10  
2023-03-08  
Release of final version  
Update Coss max  
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Final Data Sheet  
11  
Rev.ꢀ2.1,ꢀꢀ2023-03-08  

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