IPTG044N15NM5 [INFINEON]
OptiMOS™ 功率 MOSFET IPTG044N15NM5 采用改良型鸥翼式TO引脚 封装。TOLG 封装尺寸与无引脚 TO 封装尺寸互相兼容,与 D2PAK 7 封装相比,TOLG 封装具有出色的电气性能,同时减少了约 60% 的电路板空间。这款新型封装的OptiMOS™ 5 150 V的 RDS(on) 非常低,而且经过优化,可承受大电流。;型号: | IPTG044N15NM5 |
厂家: | Infineon |
描述: | OptiMOS™ 功率 MOSFET IPTG044N15NM5 采用改良型鸥翼式TO引脚 封装。TOLG 封装尺寸与无引脚 TO 封装尺寸互相兼容,与 D2PAK 7 封装相比,TOLG 封装具有出色的电气性能,同时减少了约 60% 的电路板空间。这款新型封装的OptiMOS™ 5 150 V的 RDS(on) 非常低,而且经过优化,可承受大电流。 |
文件: | 总13页 (文件大小:1638K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IPTG044N15NM5
MOSFET
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
PG-HSOG-8
TAB
Features
TAB
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)
•ꢀSuperiorꢀthermalꢀresistance
1
8
•ꢀ100%ꢀavalancheꢀtested
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
8
1
Productꢀvalidation
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications
Drain
TAB
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
150
4.4
Unit
Gate
Pin 1
VDS
V
Source
Pin 2-8
RDS(on),max
ID
mΩ
A
174
200
71
Qoss
nC
nC
QG
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPTG044N15NM5
PG-HSOG-8
044N15N5
-
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
-
-
-
-
174
123
115
19.4
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=100ꢀ°C
Continuous drain current1)
ID
A
VGS=8ꢀV,ꢀTC=100ꢀ°C
VGS=10V,TA=25°C,RthJA=40°C/W2)
Pulsed drain current3)
Avalanche energy, single pulse4)
ID,pulse
EAS
-
-
-
-
696
321
20
A
TA=25ꢀ°C
-
mJ
V
ID=100ꢀA,ꢀRGS=25ꢀΩ
Gate source voltage
VGS
-20
-
-
-
-
-
300
3.8
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRthJA=40ꢀ°C/W2)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case
RthJC
RthJA
-
0.5
°C/W -
°C/W -
Thermal resistance, junction - ambient,
6 cm² cooling area2)
-
-
-
-
40
62
Thermal resistance, junction - ambient,
minimal footprint
RthJA
°C/W -
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) See Diagram 3 for more detailed information
4) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
150
3.0
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
3.8
4.6
VDS=VGS,ꢀID=235ꢀµA
-
-
0.1
10
1.0
100
VDS=120ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=120ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
10
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
3.6
4.0
4.4
5.0
VGS=10ꢀV,ꢀID=50ꢀA
VGS=8ꢀV,ꢀID=25ꢀA
RDS(on)
mΩ
Gate resistance1)
Transconductance
RG
gfs
-
-
0.9
1.2
-
Ω
-
110
S
|VDS|≥2|ID|RDS(on)max,ꢀID=50ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
5400 7000 pF
1300 1950 pF
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=75ꢀV,ꢀf=1ꢀMHz
30
17
53
-
pF
ns
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
5.0
25
-
-
-
ns
ns
ns
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=75ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
6.5
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
29
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge1)
Switching charge
Gate charge total1)
Gate plateau voltage
Output charge1)
Qgs
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=75ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=75ꢀV,ꢀVGS=0ꢀV
Qg(th)
Qgd
20
-
14
21
-
Qsw
23
Qg
71
89
-
Vplateau
Qoss
5.4
200
266
nC
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
-
Max.
174
696
1.0
91
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.82
45
49
V
VGS=0ꢀV,ꢀIF=50ꢀA,ꢀTj=25ꢀ°C
VR=75ꢀV,ꢀIF=50ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=75ꢀV,ꢀIF=50ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
98
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
320
200
280
240
200
160
120
80
175
150
125
100
75
50
40
25
0
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
101
single pulse
0.01
1 µs
0.02
0.05
10 µs
102
0.1
0.2
0.5
100
1 ms
100 µs
101
100
10-1
10-2
10-3
10 ms
DC
10-1
10-2
100
101
102
103
10-6
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
700
12
10 V
8 V
600
500
10
6 V
7 V
8
6
4
2
0
400
7 V
8 V
300
200
10 V
6 V
100
5 V
4.5 V
0
0
1
2
3
4
5
0
50
100
150
200
250
300
350
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
350
12
300
250
200
150
100
10
8
175 °C
6
4
2
0
25 °C
50
175 °C
25 °C
0
0
1
2
3
4
5
6
7
5
7
9
11
13
15
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=50ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.4
5
2.0
1.6
1.2
0.8
0.4
0.0
4
3
2350 µA
235 µA
2
1
0
-75 -50 -25
0
25 50 75 100 125 150 175 200
-75 -50 -25
0
25 50 75 100 125 150 175 200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=50ꢀA,ꢀVGS=10ꢀV
VGS(th)=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
103
25 °C
25 °C, max
175 °C
175 °C, max
Ciss
103
102
101
102
101
100
Coss
Crss
125
0
25
50
75
100
150
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
103
10
30 V
75 V
120 V
8
6
4
2
0
102
25 °C
101
100 °C
150 °C
100
10-1
10-1
100
101
102
103
0
10
20
30
40
50
60
70
80
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=50ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
160
158
156
154
152
150
148
146
144
-75 -50 -25
0
25 50 75 100 125 150 175 200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
5ꢀꢀꢀꢀꢀPackageꢀOutlines
PACKAGE - GROUP
NUMBER:
PG-HSOG-8-U01
DATE: 08.02.2021
REVISION: 01
MILLIMETERS
DIMENSIONS
MIN.
MAX.
2.40
0.10
0.80
0.60
10.10
9.56
11.90
8.75
7.01
A
A1
b
2.20
0.00
0.60
0.40
9.70
9.36
11.50
8.45
6.81
c
D
D1
E
E1
E2
e
1.20
8.40
e1
L
0.66
2.90
0.86
3.10
P
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HSOG-8,ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
2.75
2.8
3.7
1.55
5
6.625
2.7
0.85
4x
0.7
4x
1.1
6x
5
6.525
Figureꢀ2ꢀꢀꢀꢀꢀOutlineꢀFootprintꢀ(PG-HSOG-8),ꢀdimensionsꢀinꢀmm
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
12
4
0.3
10.3
2.55
2.85
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1 [
]
Figureꢀ3ꢀꢀꢀꢀꢀOutlineꢀTapeꢀ(PG-HSOG-8),ꢀdimensionsꢀinꢀmm
Final Data Sheet
12
Rev.ꢀ2.1,ꢀꢀ2023-03-19
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ150ꢀV
IPTG044N15NM5
RevisionꢀHistory
IPTG044N15NM5
Revision:ꢀ2023-03-19,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
2022-05-05
2023-03-19
Release of final version
Update Coss max
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(“Beschaffenheitsgarantie”)ꢀ.
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
TechnologiesꢀOfficeꢀ(www.infineon.com).
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
13
Rev.ꢀ2.1,ꢀꢀ2023-03-19
相关型号:
IPTG054N15NM5
OptiMOS™ 功率 MOSFET IPTG054N15NM5 采用改良型鸥翼式TO引脚 封装。TOLG 封装尺寸与无引脚 TO 封装尺寸互相兼容,与 D2PAK 7 封装相比,TOLG 封装具有出色的电气性能,同时减少了约 60% 的电路板空间。这款新型封装的OptiMOS™ 5 150 V的 RDS(on) 非常低,而且经过优化,可承受大电流。
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