IR2152PBF [INFINEON]
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| 型号： | IR2152PBF |
| 厂家： | 
Infineon |
| 描述： | 暂无描述 驱动器 |
| 文件： | 总6页 (文件大小：206K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Data Sheet No. PD-6.035F
IR2152
SELF-OSCILLATING HALF-BRIDGE DRIVER
Features
Product Summary
n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Undervoltage lockout
V
600V max.
50%
OFFSET
Duty Cycle
I +/-
100 mA / 210 mA
10 - 20V
O
n Programmable oscillator frequency
1
V
OUT
f =
1.4 ×(RT + 75Ω)× CT
Deadtime (typ.)
Packages
1.2 µs
n Matched propagation delay for both channels
n Low side output in phase with RT
Description
The IR2152 is a high voltage, high speed, self-os-
cillating power MOSFET and IGBT driver with both high
and low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction.The front end fea-
tures a programmable oscillator which is similar to the
555 timer. The output drivers feature a high pulse cur-
rent buffer stage and an internal deadtime designed for
minimum driver cross-conduction. Propagation delays
for the two channels are matched to simplify use in
50% duty cycle applications.The floating channel can
be used to drive an N-channel power MOSFET or IGBT
in the high side configuration that operates off a high
voltage rail up to 600 volts.
Typical Connection
up to 600V
V CC
RT
V B
HO
V S
T O
L O A D
CT
C O M
LO
To Order
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-193
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IR2152
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur.All voltage param-
eters are absolute voltages referenced to COM.The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Parameter
Definition
Value
Symbol
Min.
Max.
Units
V
V
High Side Floating Supply Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Output Voltage
-0.3
625
B
S
V
- 25
V + 0.3
B
B
S
V
V
- 0.3
V
+ 0.3
HO
B
V
V
-0.3
V
+ 0.3
+ 0.3
+ 0.3
LO
CC
CC
CC
V
RT
R Voltage
T
-0.3
-0.3
—
V
V
V
C Voltage
T
CT
I
Supply Current (Note 1)
25
CC
mA
V/ns
W
I
R
Output Current
T
-5
5
RT
dV /dt
Allowable Offset Supply Voltage Transient
—
50
s
P
Package Power Dissipation @ T ≤ +25°C
(8 Lead DIP)
(8 Lead SOIC)
(8 Lead DIP)
(8 Lead SOIC)
—
1.0
D
A
—
0.625
125
200
150
150
300
R
Thermal Resistance, Junction to Ambient
—
θJA
°C/W
°C
—
T
Junction Temperature
—
J
T
Storage Temperature
-55
—
S
T
Lead Temperature (Soldering, 10 seconds)
L
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V offset rating is tested with all supplies biased at 15V differential.
S
Parameter
Definition
Value
Symbol
Min.
Max.
Units
V
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Output Voltage
V
S
+ 10
V + 20
S
B
S
V
—
600
V
V
V
V
B
HO
S
V
0
V
CC
LO
I
Supply Current (Note 1)
—
5
mA
°C
CC
T
Ambient Temperature
-40
125
A
Note 1:
Because of the IR2152’s application specificity toward off-line supply systems, this IC contains a zener clamp
structure between the chip V and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
CC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip V and the rectified line voltage and a local decoupling capacitor from
CC
V
to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. There-
CC
fore, this circuit should not be driven by a DC, low impedance power source of greater than V
.
CLAMP
B-194 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
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IR2152
Dynamic Electrical Characteristics
V
(V , V ) = 12V, C = 1000 pF and T = 25°C unless otherwise specified.
BIAS CC BS L A
Parameter
Definition
Value
Min. Typ. Max. Units Test Conditions
Symbol
t
Turn-On Rise Time
Turn-Off Fall Time
Deadtime
—
80
120
r
ns
t
f
—
40
70
DT
D
0.50
48
1.20 2.25
50 52
µs
%
R
Duty Cycle
T
Static Electrical Characteristics
V
(V , V ) = 12V, C = 1000 pF, C = 1 nF and T = 25°C unless otherwise specified. The V , V
and I
IN TH IN
BIAS CC BS
L
T
A
parameters are referenced to COM. The V and I parameters are referenced to COM and are applicable to the
O
O
respective output leads: HO or LO.
Parameter
Definition
Value
Min. Typ. Max. Units Test Conditions
Symbol
f
Oscillator Frequency
19.4
94
14.4
7.8
3.8
—
20.0
100
15.6
8.0
4.0
20
20.6
106
16.8
8.2
R = 35.7 kΩ
T
OSC
kHz
R = 7.04 kΩ
T
V
V
CC
Zener Shunt Clamp Voltage
I
= 5 mA
CC
CLAMP
V
2/3 V
1/3 V
Threshold
Threshold
V
CT+
CC
CC
V
4.2
CT-
V
C
T
Undervoltage Lockout, V
- C
50
2.5V<V <V
CC CCUV+
CTUV
CC
T
V
R
High Level Output Voltage, V
Low Level Output Voltage
Undervoltage Lockout
- R
—
0
100
300
50
I
= -100 µA
RT
RT+
T
CC
T
—
200
20
I
= -1 mA
RT
V
R
T
—
I = 100 µA
RT
RT-
mV
—
200
0
300
100
100
100
50
I
RT
= 1 mA
V
R
T
—
2.5V<V <V
CC CCUV+
RTUV
V
High Level Output Voltage, V
- V
—
—
I = 0A
O
OH
BIAS
O
V
Low Level Output Voltage, V
—
—
I = 0A
O
OL
O
I
Offset Supply Leakage Current
Quiescent V Supply Current
—
—
V = V = 600V
B S
LK
I
—
10
50
QBS
QCC
BS
µA
V
I
Quiescent V
Supply Current
—
400
0.001
8.4
950
1.0
CC
I
C
T
Input Current
—
CT
V
V
CC
Supply Undervoltage Positive Going
7.7
9.2
CCUV+
Threshold
Supply Undervoltage Negative Going
V
V
CC
7.4
8.1
8.9
CCUV-
Threshold
Supply Undervoltage Lockout Hysteresis
V
V
CC
200
100
210
500
125
250
—
—
—
mV
mA
CCUVH
I
Output High Short Circuit Pulsed Current
Output Low Short Circuit Pulsed Current
V = 0V
O
O+
I
V = 15V
O
O-
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-195
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IR2152
Functional Block Diagram
VB
UV
DETECT
Q
H V
L E V E L
S H I F T
R
S
HO
PULSE
FILTER
RT
R
-
R
S
Q
Q
DEAD
TIME
PULSE
GEN
VS
+
R
R
VC C
15.6V
-
C T
+
DEAD
TIME
LO
DELAY
COM
Lead Definitions
Lead
Symbol Description
R
Oscillator timing resistor input,in phase with HO for normal IC operation
T
T
C
Oscillator timing capacitor input, the oscillator frequency according to the following equation:
1
f =
1.4 ×(RT + 75Ω)× CT
where 75Ω is the effective impedance of the R output stage
T
V
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
B
HO
V
S
V
CC
LO
COM
Lead Assignments
8 Lead DIP
SO-8
IR2151
IR2151S
B-196 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
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IR2152
Device Information
Process & Design Rule
Transistor Count
Die Size
HVDCMOS 4.0 µm
231
68 X 101 X 26 (mil)
Die Outline
Thickness of Gate Oxide
Connections
First
800Å
Poly Silicon
5 µm
Material
Width
Layer
Spacing
Thickness
Material
Width
Spacing
Thickness
6 µm
5000Å
Al - Si - Cu (Si: 1.0%, Cu: 0.5%)
6 µm
Second
Layer
9 µm
20,000Å
Contact Hole Dimension
Insulation Layer
5 µm X 5 µm
PSG (SiO2)
1.7 µm
PSG (SiO2)
1.7 µm
Material
Thickness
Material
Passivation
Thickness
Method of Saw
Method of Die Bond
Wire Bond
Full Cut
Ablebond 84 - 1
Thermo Sonic
Au (1.0 mil / 1.3 mil)
Cu
Method
Material
Material
Die Area
Leadframe
Ag
Lead Plating
Types
Materials
Pb : Sn (37 : 63)
8 Lead PDIP / SO-8
EME6300 / MP150 / MP190
Package
Remarks:
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-197
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IR2152
VCLAMP
VCCUV
+
VCC
RT (LO)
50%
50%
t
CT
RT
RT
(HO)
t
f
r
HO
LO
90%
90%
LO
HO
10%
10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
RT
50%
50%
90%
10%
LO
DT
HO
90%
10%
Figure 3. Deadtime Waveform Definitions
B-198 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
To Order
相关型号：
IR2152S
Half Bridge Driver. LO Out of Phase with RT. Programmable Oscillating Frequency. 1.2us Deadtime in a 8-lead SOIC package
ETC
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