IR2S1844PBF [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器
| 型号： | IR2S1844PBF |
| 厂家： | 
Infineon |
| 描述： | HALF-BRIDGE DRIVER |
| 文件： | 总26页 (文件大小：518K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60252
/
IRS2184 IRS21844(S)PbF
HALF-BRIDGE DRIVER
Features
Packages
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V and 5 V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5 V offset
·
·
8-Lead PDIP
IRS2184
·
·
·
14-Lead PDIP
IRS21844
·
·
·
8-Lead SOIC
IRS2184S
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4 A/1.8 A
·
14-Lead SOIC
IRS21844S
·
RoHS compliant
·
Description
The IRS2184/IRS21844 are high volt-
Feature Comparison
age, high speed power MOSFET and
IGBT drivers with dependent high-side
and low-side referenced output chan-
nels. Proprietary HVIC and latch
immune CMOS technologies enable
ruggedized monolithic construction.
The logic input is compatible with stan-
dard CMOS or LSTTL output, down to 3.3
V logic. The output drivers feature a
Cross-
Input
logic
Deadtime
(ns)
t
/t
(ns)
conduction
prevention
logic
on off
Part
Ground Pins
2181
21814
2183
21834
2184
COM
VSS/COM
COM
VSS/COM
COM
HIN/LIN
HIN/LIN
IN/SD
no
none
180/220
180/220
680/270
Internal 400
Program 400-5000
Internal 400
yes
yes
21844
Program 400-5000
VSS/COM
high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V.
Typical Connection
up to 600 V
VCC
VCC
IN
VB
HO
VS
IN
TO
LOAD
SD
SD
COM
LO
up to 600 V
IRS2184
HO
VB
IRS21844
VCC
IN
VCC
IN
VS
TO
LOAD
SD
DT
VSS
SD
(Refer to Lead Assignments for correct
configuration).These diagrams show
electrical connections only. Please refer
to our Application Notes and DesignTips
for proper circuit board layout.
COM
LO
VSS
RDT
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1
IRS2184/IRS21844(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Definition
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Min.
Max.
Units
V
B
-0.3
620 (Note 1)
V
S
V
B
- 20
V
B
V
B
+ 0.3
+ 0.3
V
HO
V - 0.3
S
V
Low-side and logic fixed supply voltage
Low-side output voltage
-0.3
-0.3
20 (Note 1)
CC
V
V
LO
V
+ 0.3
+ 0.3
+ 0.3
+ 0.3
CC
DT
Programmable deadtime pin voltage (IRS21844 only)
Logic input voltage (IN & SD)
V
- 0.3
V
SS
CC
V
V
- 0.3
- 20
V
V
IN
SS
CC
CC
V
SS
Logic ground (IRS21844 only)
V
CC
dV /dt
Allowable offset supply voltage transient
—
50
V/ns
W
S
(8-lead PDIP)
—
—
—
—
—
—
—
—
—
-50
—
1.0
0.625
1.6
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
P
D
Package power dissipation @ T ≤ +25 °C
A
1.0
125
200
75
RthJ
Thermal resistance, junction to ambient
A
°C/W
°C
120
150
150
300
T
J
Junction temperature
T
T
Storage temperature
S
Lead temperature (soldering, 10 seconds)
L
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V and V offset rating are tested with all supplies biased at a 15 V differential.
S
SS
Symbol
Definition
Min.
Max.
Units
V
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
V
+ 10
V + 20
S
B
S
V
Note 2
600
S
V
HO
V
S
V
B
V
CC
10
0
20
V
V
LO
V
CC
V
IN
Logic input voltage (IN & SD)
V
SS
V
CC
DT
Programmable deadtime pin voltage (IRS21844 only)
Logic ground (IRS21844 only)
V
V
SS
CC
V
SS
-5
5
T
Ambient temperature
-40
125
°C
A
Note 2: Logic operational for V of -5 V to +600 V. Logic state held for V of -5 V to -V . (Please refer to the Design Tip
S
S
BS
DT97-3 for more details).
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2
IRS2184/IRS21844(S)PbF
Dynamic Electrical Characteristics
V
(V , V ) = 15 V, V = COM, C = 1000 pF, T = 25° C, DT = V unless otherwise specified.
BIAS CC BS
L
A
SS
SS
Symbol
Definition
Min. Typ. Max. Units Test Conditions
t
Turn-on propagation delay
—
—
—
—
—
—
—
280
4
680
270
180
0
900
400
270
90
V = 0 V
S
on
off
t
Turn-off propagation delay
V
= 0 V or 600 V
S
t
sd
Shut-down propagation delay
MTon
MToff
Delay matching, HS & LS turn-on
ns
Delay matching, HS & LS turn-off
Turn-on rise time
0
40
t
t
40
20
400
5
60
r
V
S
= 0 V
Turn-off fall time
35
f
Deadtime: LO turn-off to HO turn-on(DT
520
6
R
= 0 Ω
LO-HO) &
DT
DT
HO turn-off to LO turn-on (DT
µs
R
= 200 kΩ
HO-LO)
- DT
LO - HO HO-LO
DT
—
—
0
50
R
DT
=0 Ω
ns
MDT
Deadtime matching = DT
0
600
R
= 200 kΩ
DT
Static Electrical Characteristics
V
(V , V ) = 15 V, V = COM, DT= V
and T = 25 °C unless otherwise specified. The V , V and I
SS A IL IH, IN
BIAS CC BS
SS
parameters are referenced to V /COM and are applicable to the respective input leads: IN and SD. The V , I and
SS
O O,
R
on
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HO & logic “0” for LO
2.5
—
—
—
—
—
—
—
60
1.0
25
—
—
0.8
—
IH
V
Logic “0” input voltage for HO & logic “1” for LO
—
IL
V
= 10 V to 20 V
CC
V
SD,TH+
SD input positive going threshold
SD input negative going threshold
2.5
—
V
V
0.8
1.4
0.2
50
SD,TH-
V
OH
High level output voltage, V
- V
O
—
—
I
O
= 0 A
BIAS
V
OL
Low level output voltage, V
I
= 20 mA
O
O
I
LK
Offset supply leakage current
Quiescent V supply current
—
V = V = 600 V
B S
µA
mA
µA
I
20
0.4
—
150
1.6
60
QBS
BS
V
= 0 V or 5 V
IN
I
Quiescent V supply current
CC
QCC
I
Logic “1” input bias current
Logic “0” input bias current
IN = 5 V, SD = 0 V
IN = 0 V, SD = 5 V
IN+
I
IN-
—
5.0
V
V
and V supply undervoltage positive going
CC BS
CCUV+
8.0
7.4
8.9
8.2
9.8
9.0
V
threshold
V and V supply undervoltage negative going
CC
threshold
BSUV+
V
V
CCUV-
BS
BSUV-
V
A
V
CCUVH
BSUVH
Hysteresis
0.3
0.7
—
V
V
= 0 V,
O
I
Output high short circuit pulsed current
Output low short circuit pulsed current
1.4
1.8
1.9
2.3
—
—
O+
PW ≤ 10 µs
= 15 V,
V
O
I
O-
PW ≤ 10 µs
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3
IRS2184/IRS21844(S)PbF
Functional Block Diagrams
VB
UV
2184
DETECT
HO
R
R
S
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VB
UV
21844
DETECT
HO
R
Q
R
S
PULSE
FILTER
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
DT
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VSS
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4
IRS2184/IRS21844(S)PbF
Lead Definitions
Symbol Description
Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO
(referenced to COM for IRS2184 and VSS for IRS21844)
Logic input for shutdown (referenced to COM for IRS2184 and VSS for IRS21844)
Programmable deadtime lead, referenced to VSS. (IRS21844 only)
Logic ground (IRS21844 only)
IN
SD
DT
VSS
V
B
High-side floating supply
HO
High-side gate drive output
V
V
High-side floating supply return
S
Low-side and logic fixed supply
CC
LO
Low-side gate drive output
COM
Low-side return
Lead Assignments
V
V
B
1
2
3
4
IN
B
8
7
1
2
3
4
IN
8
7
HO
HO
SD
COM
LO
SD
COM
LO
V
S
V
S
6
5
6
5
V
V
CC
CC
8-Lead PDIP
8-Lead SOIC
IRS2184PbF
IRS2184SPbF
14
1
2
3
4
5
6
7
IN
14
1
IN
V
13
12
11
10
9
V
SD
13
12
11
10
9
B
2
3
4
5
6
7
SD
B
HO
HO
VSS
DT
VSS
DT
V
S
V
S
COM
LO
COM
LO
8
V
8
V
CC
CC
14-Lead PDIP
14-Lead SOIC
IRS21844PbF
IRS21844SPbF
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5
IRS2184/IRS21844(S)PbF
IN
IN(LO)
50%
50%
t
SD
IN(HO)
t
t
t
f
on
off
r
90%
90%
HO
LO
LO
HO
10%
10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
50%
50%
IN
90%
SD
DT
10%
HO
LO
LO-HO
50%
DT
HO-LO
10%
90%
t
sd
HO
LO
90%
MDT=
DT
- DT
LO-HO
HO-LO
Figure 3. Shutdown Waveform Definitions
Figure 4. Deadtime Waveform Definitions
IN(LO)
50%
50%
IN(HO)
LO
HO
10%
MT
MT
90%
LO
HO
Figure 5. Delay Matching Waveform Definitions
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6
IRS2184/IRS21844(S)PbF
1400
1200
1400
1200
1000
800
Max.
1000
Max.
Typ.
Typ.
800
600
600
400
400
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 6A. Turn-On Propagation Delay
vs. Temperature
Figure 6B. Turn-On Propagation Delay
vs. Supply Voltage
700
600
700
600
500
400
300
200
100
500
400
300
Max.
Max.
Typ.
Typ.
200
100
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 7A. Turn-Off Propagation Delay
vs. Temperature
Figure 7B. Turn-Off Propagation Delay
vs. Supply Voltage
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7
IRS2184/IRS21844(S)PbF
500
400
500
400
300
200
100
0
Max.
300
Max.
Typ.
Typ.
200
100
0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 8A. SD Propagation Delay
vs. Temperature
Figure 8B. SD Propagation Delay
vs. Supply Voltage
120
100
80
60
40
20
0
120
100
80
60
40
20
0
Max.
Typ.
Max
Typ.
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 9A. Turn-On Rise Time vs.
Figure 9B. Turn-On Rise Time vs. Supply
Temperature
Voltage
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8
IRS2184/IRS21844(S)PbF
80
60
80
60
40
20
0
Max.
40
Max.
Typ
Typ.
20
0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 10A. Turn-Off Fall Time vs.
Temperature
Figure 10B. Turn-Off Fall Time vs. Supply
Voltage
1100
900
1100
900
700
500
300
100
700
Max.
Max.
Typ.
500
Typ.
Min.
Min.
300
100
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 11A. Deadtime vs. Temperature
Figure 11B. Deadtime vs. Supply Voltage
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9
IRS2184/IRS21844(S)PbF
6
5
4
3
7
6
5
4
3
2
1
0
Max.
Typ.
Min.
Min.
2
1
0
0
50
100
150
200
-50
-25
0
25
50
75
100
125
RDT (K )
W
Temperature (oC)
Figure 11C. Deadtime vs. RDT
Figure 12A. Logic "1" Input Voltage
vs. Temperature
6
5
4
3
2
1
0
6
5
4
3
2
1
0
Max.
Max.
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
Temperature (oC)
VBAIS Supply Voltage (V)
Figure 12B. Logic "1" Input Voltage
vs. Supply Voltage
Figure 13A. Logic "0" Input Voltage
vs. Temperature
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10
IRS2184/IRS21844(S)PbF
6
5
4
3
2
1
0
6
5
4
3
Max.
2
1
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
SD input positive going threshold (+)
Figure 14A.
Figure 13B. Logic "0" Input Voltage
vs. Supply Voltage
vs. Temperature
5
4
3
2
6
5
4
3
2
1
Max.
1
Max.
0
10
12
14
16
18
20
-50 -25
0
25
50
75 100 125
Temperature (oC)
VCC Supply Voltage (V)
Figure 14B. SD input positive going threshold (+)
vs. Supply Voltage
Figure 15A. SD Input Negative Going
Threshold vs. Temperature
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11
IRS2184/IRS21844(S)PbF
5
4
3
2
1
0
5.0
4.0
3.0
2.0
Max.
1.0
Max.
0.0
10
12
14
16
18
20
-50 -25
0
25
50
75 100 125
Temperature (oC)
Supply Voltage (V)
Figure 15B. SD Input Negative Going Threshold
vs. Supply Voltage
Figure 16A. High Level Output Voltage
vs. Temperature (I = 0 mA)
o
0.5
0.4
0.3
0.2
0.1
0.0
5.0
4.0
3.0
Max.
2.0
Max
1.0
0.0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
V
BIAS
Supply Voltage (V)
Figure 17A. Low Level Output vs. Temperature
Figure 16B. High Level Output Voltage
vs. Supply Voltage (I = 0 mA)
o
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12
IRS2184/IRS21844(S)PbF
0.5
0.4
0.3
0.2
0.1
0.0
500
400
300
200
Max.
100
Max.
0
10
12
14
16
18
20
-50 -25
0
25
50
75 100 125
Supply Voltage (V)
Temperature (oC)
Figure 18A. Offset Supply Leakage
Current vs. Temperature
Figure 17B. Low Level Output vs. Supply Voltage
500
400
300
200
250
200
150
100
50
Max.
Typ.
Min.
100
Max.
0
0
-50 -25
0
25
50
75 100 125
100
200
300
400
500
600
Temperature (oC)
VB Boost Voltage (V)
Figure 19A. VBS Supply Current
vs. Temperature
Figure 18B. Offset Supply Leakage
Current vs. VB Boost Voltage
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13
IRS2184/IRS21844(S)PbF
250
200
150
100
50
5
4
3
Max.
2
Max.
Typ.
Min.
Typ.
1
Min.
0
0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
VBS Floating Supply Voltage (V)
Figure 20A. VCC Supply Current
vs. Temperature
Figure 19B. VBS Supply Current
vs. VBS Floating Supply Voltage
5
4
3
2
1
0
120
100
80
60
40
20
0
Max.
Max.
Typ.
Typ.
Min
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
VCC Supply Voltage (V)
Figure 21A. Logic "1" Input Bias Current
vs. Temperature
Figure 20B. VCC Supply Current
vs. VCC Supply Voltage
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14
IRS2184/IRS21844(S)PbF
6
120
100
80
5
4
3
2
1
0
Max
60
40
20
0
Max.
Typ.
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
Supply Voltage (V)
Temperature (°C)
Figure 21B. Logic "1" Input Bias Current
vs. Supply Voltage
Figure 22A. Logic “0” Input Bias Curremt
vs. Temperature
12
6
11
10
9
5
4
3
2
1
0
Max
Max.
Typ.
Min.
8
7
6
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 23. VCC and VBS Undervoltage Threshold (+)
vs. Temperature
Figure 22B. Logic “0” Input Bias Curremt
vs. Voltage
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15
IRS2184/IRS21844(S)PbF
12
11
10
9
5
4
Max.
3
Typ.
Typ.
Min.
2
8
Min.
7
1
6
0
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75
100 125
Temperature (oC)
Temperature (oC)
Figure 24. VCC and VBS Undervoltage Threshold (-)
vs. Temperature
Figure 25A. Output Source Current
vs. Temperature
5
4
3
5.0
4.0
3.0
2.0
1.0
Typ.
Min.
2
Typ.
1
Min.
0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 26A. Output Sink Current
vs. Temperature
Figure 25B. Output Source Current
vs. Supply Voltage
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16
IRS2184/IRS21844(S)PbF
5
4
3
140
120
100
80
140v
2
1
0
70v
Typ.
Min.
60
0v
40
20
10
12
14
16
18
20
1
10
100
1000
Supply Voltage (V)
Frequency (kHz)
Figure 27. IRS2181 vs. Frequency (IRFBC20),
Rgate=33 , VCC=15 V
Figure 26B. Output Sink Current
vs. Supply Voltage
Ω
140
120
100
80
140
120
100
80
140v
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 29. IRS2181 vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
Figure 28. IRS2181 vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
Ω
Ω
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17
IRS2184/IRS21844(S)PbF
140v
140
120
100
80
140
120
100
80
70v
0v
60
60
140v
70v
0v
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 30. IRS2181 vs. Frequency (IRFPE50),
Figure 31. IRS21814 vs. Frequency (IRFBC20),
Rgate=10 , VCC=15 V
Rgate=33 , VCC=15 V
W
W
140
140
120
100
80
120
100
80
140v
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
Frequency (kHz)
Figure 32. IRS21814 vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
100
1000
1
10
Frequency (kHz)
Figure 33. IRS21814 vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
100
1000
W
W
www.irf.com
18
IRS2184/IRS21844(S)PbF
140v
140
120
100
140
120
100
80
70v
0v
80
140v
70v
60
60
0v
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 34. IRS21814 vs. Frequency (IRFPE50),
Figure 35. IRS2181s vs. Frequency (IRFBC20),
Rgate=10 , VCC=15 V
Rgate=33 , VCC=15 V
W
W
140v 70v
140
140
120
100
80
120
100
80
140v
70v
0v
0v
60
60
40
40
20
20
1
10
Frequency (kHz)
Figure 37. IRS2181s vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
100
1000
1
10
Frequency (kHz)
Figure 36. IRS2181s vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
100
1000
W
W
www.irf.com
19
IRS2184/IRS21844(S)PbF
140V 70V 0V
140
120
100
80
140
120
100
80
60
60
140v
70v
40
0v
40
20
20
1
10
100
1000
1
10
Frequency (kHz)
Figure 39. IRS21814s vs. Frequency (IRFBC20),
Rgate=33 , VCC=15 V
100
1000
Frequency (kHz)
Figure 38. IRS2181s vs. Frequency (IRFPE50),
Rgate=10 , VCC=15 V
W
W
140
120
100
80
140
120
100
80
140v
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 40. IRS21814s vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
Figure 41. IRS21814s vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
W
W
www.irf.com
20
IRS2184/IRS21844(S)PbF
140v 70v
0v
140
120
100
80
60
40
20
1
10
Frequency (kHz)
Figure 42. IRS21814s vs. Frequency (IRFPE50),
Rgate=10 , VCC=15 V
100
1000
W
www.irf.com
21
IRS2184/IRS21844(S)PbF
Cast Outlines
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
IN C H E S
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
A
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
5
6
D
E
e
H
E
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
4
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
K x 45°
e1
A
C
y
0.10 [.004]
8X c
8X L
A1
B
8X b
7
0.25 [.010]
C A
5
6
7
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
www.irf.com
22
IRS2184/IRS21844(S)PbF
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-6019
01-3063 00 (MS-012AB)
14-Lead SOIC (narrow body)
www.irf.com
23
IRS2184/IRS21844(S)PbF
Tape & Reel
8-lead SOIC
LOADED TA PE FEED DIRECTION
A
B
H
D
F
C
N OTE : CONTROLLING
D IMENSION IN MM
E
G
CA R RIE R TA P E D IM E NS IO N FO R 8 S O ICN
M etr ic
Im p erial
Co d e
M in
7 .9 0
3 .9 0
11 .7 0
5 .4 5
6 .3 0
5 .1 0
1 .5 0
1 .5 0
M ax
8.1 0
4.1 0
1 2. 30
5.5 5
6.5 0
5.3 0
n/a
M in
M ax
0 .3 18
0 .1 61
0 .4 84
0 .2 18
0 .2 55
0 .2 08
n/a
A
B
C
D
E
F
0.31 1
0.15 3
0 .4 6
0.21 4
0.24 8
0.20 0
0.05 9
0.05 9
G
H
1.6 0
0 .0 62
F
D
B
C
A
E
G
H
RE E L D IM E NS IO N S FO R 8 S O IC N
M etr ic
Im p erial
Co d e
M in
32 9.60
20 .9 5
12 .8 0
1 .9 5
98 .0 0
n /a
14 .5 0
12 .4 0
M ax
3 30 .2 5
2 1. 45
1 3. 20
2.4 5
1 02 .0 0
1 8. 40
1 7. 10
1 4. 40
M in
1 2 .9 76
0.82 4
0.50 3
0.76 7
3.85 8
n /a
M ax
13 .0 0 1
0 .8 44
0 .5 19
0 .0 96
4 .0 15
0 .7 24
0 .6 73
0 .5 66
A
B
C
D
E
F
G
H
0.57 0
0.48 8
www.irf.com
24
IRS2184/IRS21844(S)PbF
Tape & Reel
14-lead SOIC
LOADED TA PE FEED DIRECTION
A
B
H
D
F
C
N OTE : CONTROLLING
D IMENSION IN MM
E
G
CA R RIE R TA P E D IM E NS IO N FO R 1 4 S O IC N
M etr ic
Im p erial
Co d e
M in
7 .9 0
3 .9 0
15 .7 0
7 .4 0
6 .4 0
9 .4 0
1 .5 0
1 .5 0
M ax
8.1 0
4.1 0
1 6. 30
7.6 0
6.6 0
9.6 0
n/a
M in
M ax
0 .3 18
0 .1 61
0 .6 41
0 .2 99
0 .2 60
0 .3 78
n/a
A
B
C
D
E
F
0.31 1
0.15 3
0.61 8
0.29 1
0.25 2
0.37 0
0.05 9
0.05 9
G
H
1.6 0
0 .0 62
F
D
B
C
A
E
G
H
RE E L D IM E NS IO N S FO R 1 4 SO IC N
M etr ic
Im p erial
Co d e
M in
32 9.60
20 .9 5
12 .8 0
1 .9 5
98 .0 0
n /a
18 .5 0
16 .4 0
M ax
3 30 .2 5
2 1. 45
1 3. 20
2.4 5
1 02 .0 0
2 2. 40
2 1. 10
1 8. 40
M in
1 2 .9 76
0.82 4
0.50 3
0.76 7
3.85 8
n /a
M ax
13 .0 0 1
0 .8 44
0 .5 19
0 .0 96
4 .0 15
0 .8 81
0 .8 30
0 .7 24
A
B
C
D
E
F
G
H
0.72 8
0.64 5
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25
IRS2184/IRS21844(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
IRSxxxxx
YWW?
Date code
IR logo
?XXXX
Pin 1
Identifier
Lot Code
(Prod mode - 4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2184PbF
8-Lead SOIC IRS2184SPbF
14-Lead PDIP IR2S1844PbF
14-Lead SOIC IRS21844SPbF
8-Lead SOIC Tape & Reel IRS2184STRPbF
14-Lead SOIC Tape & Reel IRS21844STRPbF
The SOIC-8 is MSL2 qualified.
The SOIC-14 is MSL3 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 11/27/2006
www.irf.com
26
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