IRF644NSTRRPBF [INFINEON]
Power Field-Effect Transistor, 14A I(D), 250V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, PLASTIC, D2PAK-3;
| 型号： | IRF644NSTRRPBF |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 14A I(D), 250V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, PLASTIC, D2PAK-3 局域网 开关 脉冲 晶体管 |
| 文件： | 总11页 (文件大小：291K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95161
IRF644NPbF
IRF644NSPbF
l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Ease of Paralleling
l Simple Drive Requirements
l Lead-Free
IRF644NLPbF
HEXFET® Power MOSFET
D
VDSS = 250V
RDS(on) = 240mΩ
G
ID = 14A
Description
S
Fifth Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.
The TO-220 package is universally preferred for all
commercial-industrialapplicationsatpowerdissipationlevels
to approximately 50 watts. The low thermal resistance and
low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
D2Pak
IRF644NSPbF IRF644NLPbF
TO-262
TO-220AB
IRF644NPbF
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of its
low internal connection resistance and can dissipate up to
2.0W in a typical surface mount application.
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
14
9.9
A
56
PD @TC = 25°C
Power Dissipation
150
W
W/°C
V
Linear Derating Factor
1.0
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
180
8.4
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
15
mJ
V/ns
7.9
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
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1
4/22/04
IRF644N/644NS/644NLPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
250 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.33 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 240
mΩ VGS = 10V, ID = 8.4A
2.0
8.8
––– 4.0
––– –––
V
S
VDS = VGS, ID = 250µA
VDS = 50V, ID = 8.4A
VDS = 250V, VGS = 0V
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 54
––– ––– 9.2
––– ––– 26
IDSS
Drain-to-Source Leakage Current
µA
nA
VDS = 200V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = 8.4A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 200V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
10 –––
21 –––
30 –––
17 –––
VDD = 125V
ID = 8.4A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 6.2Ω
VGS = 10V, See Fig. 10
Between lead,
6mm (0.25in.)
from package
D
S
4.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
nH
G
7.5
and center of die contact
VGS = 0V
Ciss
Coss
Crss
Input Capacitance
––– 1060 –––
––– 140 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
–––
38 –––
pF
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
14
56
––– –––
––– –––
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 1.3
––– 165 250
––– 1.0 1.6
V
TJ = 25°C, IS = 14A, VGS = 0V
TJ = 25°C, IF = 14A
ns
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
1.0
Units
RθJC
RθCS
RθJA
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Junction-to-Ambient (PCB mount)**
0.50
–––
–––
62
°C/W
–––
40
2
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IRF644N/644NS/644NLPbF
100
10
1
100
VGS
VGS
15V
10V
TOP
TOP
15V
10V
8.0V
8.0V
7.0V
6.0V
5.5V
5.0V
7.0V
6.0V
5.5V
5.0V
10
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
1
20µs PULSE WIDTH
Tj = 25°C
20µs PULSE WIDTH
Tj = 175°C
0.1
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.5
14A
=
I
D
°
T = 175 C
J
3.0
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 25 C
J
10
V
= 50V
DS
20µs PULSE WIDTH
V
=10V
GS
1
4
6
8
10
11 13
15
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature ( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF644N/644NS/644NLPbF
10000
V
C
= 0V,
f = 1 MHZ
GS
20
16
12
8
= C + C
,
C
ds
SHORTED
I = 8.4A
D
iss
gs
gd
V
V
V
= 200V
= 125V
= 50V
DS
DS
DS
C
= C
rss
gd
C
= C + C
ds gd
oss
Ciss
1000
100
10
Coss
Crss
4
1
10
100
0
0
12
24
36
48
60
V
, Drain-to-Source Voltage (V)
DS
Q , Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
10
1
°
T = 175 C
J
100µsec
°
T = 25 C
J
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0 V
GS
0.1
0.1
0.0
0.4
0.8
1.1
1.5
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-toSource Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF644N/644NS/644NLPbF
15
12
9
RD
VDS
VGS
DꢀUꢀTꢀ
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10aꢀ Switching Time Test Circuit
3
V
DS
90%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10bꢀ Switching Time Waveforms
10
1
D = 0.50
0.20
P
2
DM
0.10
0.05
0.1
0.01
t
1
SINGLE PULSE
0.02
t
2
(THERMAL RESPONSE)
0.01
Notes:
1. Duty factor D = t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF644N/644NS/644NLPbF
300
15V
I
D
TOP
3.4A
5.9A
BOTTOM 8.4A
240
180
120
60
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
AS
20V
0.01
Ω
t
p
Fig 12aꢀ Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12cꢀ Maximum Avalanche Energy
Vs# Drain Current
I
AS
Fig 12bꢀ Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
VGS
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13bꢀ Gate Charge Test Circuit
Fig 13aꢀ Basic Gate Charge Waveform
6
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IRF644N/644NS/644NLPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
DꢀUꢀT*
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• DꢀUꢀTꢀ - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of DꢀUꢀT for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple ≤ 5%
*** VGS = 5ꢀ0V for Logic Level and 3V Drive Devices
Fig 14ꢀ For N-channel HEXFET® power MOSFETs
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7
IRF644N/644NS/644NLPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
2- DRAIN
3- SOURCE
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMB LED ON WW 19, 1997
IN THE AS S EMBLY LINE "C"
INTE RNAT IONAL
RECT IFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 7 = 1997
WEEK 19
AS S EMBLY
LOT CODE
LINE C
8
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IRF644N/644NS/644NLPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 530S WIT H
P AR T N U MB E R
L OT COD E 8024
IN T E R N AT ION AL
R E CT IF IE R
L OGO
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB L Y L IN E "L "
F 530S
D AT E CODE
Y E AR 0 = 2000
W E E K 02
N ote: "P " in as s embly line
pos ition indicates "L ead-F ree"
AS S E MB L Y
L OT COD E
L INE
L
OR
P AR T N U MB E R
IN T E R N AT ION AL
R E CT IF IE R
L OGO
F 530S
D AT E COD E
P
=
D E S IGN AT E S L E AD -F R E E
P R OD U CT (OP T ION AL )
AS S E MB L Y
L OT COD E
YE AR
W E E K 02
A = AS S E MB L Y S IT E COD E
0 = 2000
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9
IRF644N/644NS/644NLPbF
TO-262 Package Outline
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
ASSEMBLED ON WW 19, 1997
RECTIFIER
IN THE ASSEMBLY LINE "C"
LOGO
DATE CODE
YEAR 7 = 1997
WE EK 19
Note: "P" in assembly line
pos ition indicates "Lead-Free"
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
AS S E MBL Y
LOT CODE
WEE K 19
A = AS S E MB L Y S IT E CODE
10
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IRF644N/644NS/644NLPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L = 5.0µH
RG = 25Ω, IAS = 8.4A. (See Figure 12)
ISD ≤ 8.4A, di/dt ≤ 378A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
This is a calculated value limited to TJ = 175°C .
This is only applied to TO-220AB package.
**When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint & soldering techniques refer to
,
application note #AN-994.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
ꢀ This is a typical value at device destruction
and represents operation outside rated limits.
Data and specifications subject to change without notice.
This product has been designed and qualified for the (IRF644N) automotive [Q101]
& (IRF644NS/L) industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/04
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11
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