IRF6655TR1_技术文档

PD - 96926D

IRF6655

DirectFET Power MOSFET

Typical values (unless otherwise specified)

l RoHS compliant containing no lead or bromide

l Low Profile (<0.7 mm)

V_DSS

V_GS

R_DS(on)

53mΩ@ 10V

V_gs(th)

100V max ±20V max

l Dual Sided Cooling Compatible

l Ultra Low Package Inductance

Q_{g tot}

Q_gd

l Optimized for High Frequency Switching

8.7nC

2.8nC

3.9V

l Ideal for High Performance Isolated Converter

Primary Switch Socket

l Ideal for Control FET sockets in 36V – 75V in

Synchronous Buck applications

l Low Conduction Losses

l Compatible with existing Surface Mount Techniques

DirectFET ISOMETRIC

SH

Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)

SQ

SX

ST

SH

MQ

MX

MT

MN

Description

The IRF6655 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET^TMpackaging to achieve the

lowest combined on-state resistance and gate charge in a package that has a footprint similar to that of a micro-8, and only 0.7mm profile. The

DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-

red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The

DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by

80%.

The IRF6655 is optimized for low power primary side bridge topologies in isolated DC-DC applications, and for high side control FET sockets in

non-isolated synchronous buck DC-DC applications for use in wide range universal Telecom systems (36V – 75V), and for secondary side

synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal perfor-

mance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high

performance isolated DC-DC converters.

Absolute Maximum Ratings

Max.

100

±20

4.2

3.4

19

Parameter

Units

V

V_DS

Drain-to-Source Voltage

V

Gate-to-Source Voltage

GS

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current

I

@ T_A= 25°C

D

@ T_A= 70°C

@ T_C= 25°C

A

34

DM

E_AS

I_AR

11

Single Pulse Avalanche Energy

Avalanche Current

mJ

A

5.0

200

180

160

140

120

100

80

12.0

10.0

8.0

V

= 80V

I = 5.0A

D

I

= 5.0A

DS

D

= 50V

= 20V

T

= 125°C

J

6.0

4.0

60

40

20

0

2.0

T

= 25°C

12

J

0.0

4

6

8

10

14

16

18

0

2

4

6

8

10

Q

Total Gate Charge (nC)

G

V

Gate -to -Source Voltage (V)

GS,

Fig 2. Typical On-Resistance Vs. Gate Voltage

Fig 1. Typical On-Resistance Vs. Gate Voltage

Notes:

Click on this section to link to the appropriate technical paper.

Click on this section to link to the DirectFET MOSFETs

Repetitive rating; pulse width limited by max. junction temperature.

Starting T_J= 25°C, L = 0.89mH, R_G= 25Ω, I_AS= 5.0A.

Surface mounted on 1 in. square Cu board, steady state.

T_Cmeasured with thermocouple mounted to top (Drain) of part.

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1

11/16/05

IRF6655

Static @ T_J= 25°C (unless otherwise specified)

Conditions

V_GS= 0V, I_D= 250µA

Parameter

Min. Typ. Max. Units

BV_DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

100

–––

2.8

–––

0.12

53

–––

62

V

V/°C

mΩ

V

Reference to 25°C, I_D= 1mA

∆ΒV_DSS/∆T_J

R_DS(on)

V_GS= 10V, I_D= 5.0A g

V_DS= V_GS, I_D= 25µA

V_GS(th)

–––

-11

–––

8.7

2.1

0.58

2.8

3.2

3.4

4.5

1.9

7.4

2.8

14

4.8

∆V_GS(th)/∆T_J

I_DSS

Gate Threshold Voltage Coefficient

Drain-to-Source Leakage Current

–––

6.6

––– mV/°C

V

_DS= 100V, V_GS= 0V

20

250

100

-100

–––

11.7

–––

4.2

µA

nA

S

V_DS= 80V, V_GS= 0V, T_J= 125°C

V_GS= 20V

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Forward Transconductance

Total Gate Charge

V_GS= -20V

V_DS= 10V, I_D= 5.0A

gfs

Q_g

–––

V_DS= 50V

Q_gs1

Q_gs2

Q_gd

Q_godr

Q_sw

Q_oss

R_G

Pre-Vth Gate-to-Source Charge

Post-Vth Gate-to-Source Charge

Gate-to-Drain Charge

Gate Charge Overdrive

Switch Charge (Q_gs2+ Q_gd)

Output Charge

V_GS= 10V

I_D= 5.0A

nC

–––

2.9

See Fig. 17

V_DS= 16V, V_GS= 0V

nC

Gate Resistance

Ω

V_DD= 50V, V_GS= 10Vꢁg

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

–––

I_D= 5.0A

Rise Time

R_G=6.0Ω

Turn-Off Delay Time

ns

Fall Time

4.3

530

110

29

V_GS= 0V

C_iss

C_oss

C_rss

C_oss

Input Capacitance

V_DS= 25V

ƒ = 1.0MHz

Output Capacitance

pF

Reverse Transfer Capacitance

Output Capacitance

V_GS= 0V, V_DS= 1.0V, f=1.0MHz

510

67

V_GS= 0V, V_DS= 80V, f=1.0MHz

Output Capacitance

Diode Characteristics

Conditions

MOSFET symbol

Parameter

Continuous Source Current

Min. Typ. Max. Units

D

I_S

–––

38

showing the

(Body Diode)

A

G

integral reverse

S

I_SM

Pulsed Source Current

(Body Diode)ꢁe

–––

34

p-n junction diode.

T_J= 25°C, I_S= 5.0A, V_GS= 0V g

T_J= 25°C, I_F= 5.0A, V_DD= 25V

di/dt = 100A/µs g

V_SD

t_rr

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

–––

31

1.3

47

56

V

ns

nC

Q_rr

37

Notes:

ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.

2

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IRF6655

Absolute Maximum Ratings

Max.

Parameter

Units

2.2

P

@T_A= 25°C

@T_A= 70°C

@T_C= 25°C

Power Dissipation

W

D

P

J

1.4

42

270

T

Peak Soldering Temperature

Operating Junction and

°C

-40 to + 150

Storage Temperature Range

STG

Thermal Resistance

Parameter

Typ.

–––

12.5

20

Max.

58

Units

R_θ

Junction-to-Ambient

JA

Junction-to-Ambient

Junction-to-Case

–––

3.0

JA

°C/W

JA

–––

1.4

JC

Junction-to-PCB Mounted

–––

J-PCB

100

10

D = 0.50

0.20

0.10

0.05

Ri (°C/W) τi (sec)

R₁

R₂

R₃

R₄

R₅

0.02

0.01

1.6195

2.1406

0.000126

0.001354

1

τ

^Jτ_J

τ

^Aτ_A

¹τ₁

τ

²τ₂

³τ₃

⁴τ₄

⁵τ₅

22.2887 0.375850

20.0457 7.410000

Ci= τi/Ri

0.1

11.9144

99

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthja + Tc

0.01

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

10

100

t

, Rectangular Pulse Duration (sec)

1

Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

Notes:

T_Cmeasured with thermocouple incontact with top (Drain) of part.

Surface mounted on 1 in. square Cu board, steady state.

R is measured at T_Jof approximately 90°C.

Used double sided cooling , mounting pad.

Mounted on minimum footprint full size board with metalized

back and with small clip heatsink.

θ

Mounted on minimum

Surface mounted on 1 in. square Cu

Mounted to a PCB with a

footprint full size board with

metalized back and with small

clip heatsink (still air)

board (still air).

thin gap filler and heat sink.

(still air)

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3

IRF6655

100

10

1

VGS

15V

10V

9.0V

8.0V

7.0V

6.0V

VGS

15V

TOP

10V

9.0V

8.0V

7.0V

6.0V

BOTTOM

10

1

6.0V

60µs PULSE WIDTH

Tj = 150°C

≤

60µs PULSE WIDTH

Tj = 25°C

≤

0.1

1

10

100

1000

0.1

1

10

100

1000

V

, Drain-to-Source Voltage (V)

DS

V

, Drain-to-Source Voltage (V)

DS

Fig 4. Typical Output Characteristics

Fig 5. Typical Output Characteristics

100

2.0

1.5

1.0

0.5

I

= 5.0A

D

V

= 10V

GS

10

T

= -40°C

= 25°C

= 150°C

J

1

V

= 25V

DS

≤

60µs PULSE WIDTH

10

, Gate-to-Source Voltage (V)

0.1

2

4

6

8

12

-60 -40 -20

0

20 40 60 80 100 120 140 160

T

J

, Junction Temperature (°C)

V

GS

Fig 6. Typical Transfer Characteristics

Fig 7. Normalized On-Resistance vs. Temperature

10000

120

V

= 0V,

= C

f = 1 MHZ

GS

C

+ C , C

SHORTED

iss

gs

gd

ds

= C

rss

oss

gd

= C + C

T

= 125°C

ds

gd

J

100

80

1000

100

10

C

iss

C

oss

T

= 25°C

J

60

C

rss

Vgs = 10V

8 10

40

1

10

, Drain-to-Source Voltage (V)

100

0

2

4

6

V

I , Drain Current (A)

DS

D

Fig 9. Normalized Typical On-Resistance vs.

Fig 8. Typical Capacitance vs. Drain-to-Source Voltage

Drain Current and Gate Voltage

4

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IRF6655

100

10

1

1000

100

10

Tc = 25°C

Tj = 175°C

Single Pulse

OPERATION IN THIS AREA

LIMITED BY R

(on)

DS

100µsec

100msec

1msec

T

= -40°C

= 25°C

= 150°C

1

J

10msec

0.1

0.01

V

= 0V

GS

0.4

0.6

V

0.8

1.0

1.2

1.4

1.6

0

1

10

100

1000

, Source-to-Drain Voltage (V)

V

, Drain-to-Source Voltage (V)

SD

DS

Fig 10. Typical Source-Drain Diode Forward Voltage

Fig11. Maximum Safe Operating Area

5.5

5

4

3

2

1

0

4.5

4

3.5

3

I

= 25µA

= 250µA

= 1.0mA

= 1.0A

D

2.5

2

-75 -50 -25

0

25 50 75 100 125 150 175

25

50

75

100

125

150

T

, Ambient Temperature (°C)

T , Temperature ( °C )

A

J

Fig 12. Maximum Drain Current vs. Ambient Temperature

Fig 13. Threshold Voltage vs. Temperature

50

I

D

TOP

0.86A

1.3A

40

30

20

10

0

BOTTOM 5.0A

25

50

75

100

125

150

Starting T , Junction Temperature (°C)

J

Fig 14. Maximum Avalanche Energy vs. Drain Current

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5

IRF6655

Current Regulator

Same Type as D.U.T.

Id

Vds

50KΩ

Vgs

.2µF

.3µF

12V

+

V

DS

D.U.T.

-

Vgs(th)

V

GS

3mA

I

D

G

Qgs1

Qgs2

Qgd

Qgodr

Current Sampling Resistors

Fig 15a. Gate Charge Test Circuit

Fig 15b. Gate Charge Waveform

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

V_GS

20V

0.01

Ω

t

p

I

AS

Fig 16b. Unclamped Inductive Waveforms

Fig 16a. Unclamped Inductive Test Circuit

R_D

V_DS

90%

V_GS

D.U.T.

R_G

+

-

V_DD

10%

V_GS

10V

t_d(on)

t_d(off)

t_r

t_f

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

Fig 17a. Switching Time Test Circuit

Fig 17b. Switching Time Waveforms

6

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IRF6655

D.U.T

+

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

-

+

-

+

-

V_DD

• di/dt controlled by R_G

R_G

• Driver same type as D.U.T.

+

-

• I_SDcontrolled by Duty Factor "D"

Driver Gate Drive

P.W.

Period

D =

*

V

=10V

GS

D.U.T. I Waveform

SD

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

Re-Applied

Voltage

Body Diode

Forward Drop

Inductor Current

Inductor Curent

I

SD

Ripple ≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 18. Diode Reverse Recovery Test Circuit for N-Channel

HEXFET^®Power MOSFETs

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7

IRF6655

DirectFET™ Substrate and PCB Layout, SH Outline

(Small Size Can, H-Designation).

Please see DirectFET application note AN-1035 for all details regarding PCB assembly using DirectFET.

This includes all recommendations for stencil and substrate designs.

8

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IRF6655

DirectFET Outline Dimension, SH Outline

(Small Size Can, H-Designation).

Please see DirectFET application note AN-1035 for all details regarding PCB assembly using DirectFET. This

includes all recommendations for stencil and substrate designs.

DIMENSIONS

IMPERIAL

MIN

METRIC

MAX

CODE

MIN

4.75

3.70

2.75

0.35

0.58

0.63

0.83

0.99

2.29

0.59

0.03

0.08

MAX

0.191

0.156

0.112

0.018

0.024

0.026

0.034

0.041

0.092

0.028

0.003

0.007

4.85

3.95

2.85

0.45

0.62

0.67

0.87

1.03

2.33

0.70

0.08

0.17

0.187

0.146

0.108

0.014

0.023

0.025

0.033

0.039

0.090

0.023

0.001

0.003

A

B

C

D

E

F

Note: Controlling

dimensions are in mm.

G

H

K

L

M

N

P

DirectFET Part Marking

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9

IRF6655

DirectFET Tape & Reel Dimension (Showing component orientation).

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. (ordered as IRF6655). For 1000 parts on 7" reel,

order IRF6655TR1

REEL DIMENSIONS

STANDARD OPTION (QTY 4800)

TR1 OPTION (QTY 1000)

METRIC

MAX

IMPERIAL

METRIC

MIN

MAX

IMPERIAL

CODE

MIN

MAX

N.C

MIN

6.9

MAX

N.C

0.50

N.C

0.53

N.C

MIN

A

B

C

D

E

F

330.0

20.2

12.8

1.5

12.992

0.795

0.504

0.059

3.937

N.C

177.77

19.06

13.5

1.5

N.C

13.2

N.C

18.4

14.4

15.4

N.C

0.75

0.53

0.059

2.31

N.C

0.520

N.C

12.8

N.C

100.0

N.C

58.72

N.C

0.724

0.567

0.606

13.50

12.01

G

H

0.488

0.469

0.47

12.4

11.9

Loaded Tape Feed Direction

NOTE: CONTROLLING

DIMENSIONS IN MM

DIMENSIONS

METRIC

IMPERIAL

MIN

MAX

CODE

MIN

7.90

3.90

11.90

5.45

4.00

5.00

1.50

MAX

8.10

4.10

12.30

5.55

4.20

5.20

N.C

A

B

C

D

E

F

0.311

0.319

0.161

0.484

0.219

0.165

0.205

N.C

0.154

0.469

0.215

0.157

0.197

0.059

G

H

1.60

0.063

Data and specifications subject to change without notice.

This product has been designed and qualified for the Consumer market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.11/05

10

www.irf.com

Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/


型号：	IRF6655TR1
厂家：	Infineon
描述：	Power Field-Effect Transistor, 4.2A I(D), 100V, 0.062ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ISOMETRIC-3
文件：	总11页 (文件大小：254K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRF6655TR1 [INFINEON]

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