IRF820ALPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRF820ALPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总10页 (文件大小：273K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95533
IRF820ASPbF
IRF820ALPbF
SMPS MOSFET
HEXFET® Power MOSFET
Applications
VDSS
500V
RDS(on) max
ID
2.5A
l Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High speed power switching
l Lead-Free
3.0Ω
Benefits
l Low Gate Charge Qg Results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective COSS specified (See AN 1001)
D2Pak
IRF820AS
TO-262
IRF820AL
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
2.5
1.6
A
10
50
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
0.4
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
3.4
V/ns
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Typical SMPS Topologies:
l Two Transistor Forward
l Half Bridge and Full Bridge
Notes through ꢀare on page 8
www.irf.com
1
7/20/04
IRF820AS/LPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
500 ––– –––
––– 0.60 ––– V/°C Reference to 25°C, ID = 1mA
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 3.0
2.0 ––– 4.5
Ω
V
VGS = 10V, ID = 1.5A
VDS = VGS, ID = 250µA
VDS = 500V, VGS = 0V
VDS = 400V, VGS = 0V, TJ = 125°C
VGS = 30V
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
gfs
1.4 ––– –––
S
VDS = 50V, ID = 1.5A
Qg
––– ––– 17
––– ––– 4.3
––– ––– 8.5
ID = 2.5A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 400V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
8.1 –––
12 –––
16 –––
13 –––
VDD = 250V
ID = 2.5A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 21Ω
RD = 97Ω,See Fig. 10
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 340 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
53 –––
2.7 –––
VDS = 25V
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 400V ꢀ
––– 490 –––
–––
–––
15 –––
28 –––
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
Max.
140
2.5
Units
mJ
EAS
IAR
–––
–––
–––
Avalanche Current
A
EAR
Repetitive Avalanche Energy
5.0
mJ
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
2.5
Units
°C/W
RθJC
RθJA
Junction-to-Ambient ( PCB Mounted, steady-state)*
–––
62
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
S
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
2.5
10
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.6
––– 330 500
V
TJ = 25°C, IS = 2.5A, VGS = 0V
ns
TJ = 25°C, IF = 2.5A
Qrr
ton
––– 760 1140 nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF820AS/LPbF
10
10
VGS
15V
10V
VGS
15V
10V
TOP
TOP
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
1
1
0.1
4.5V
4.5V
20µs PULSE WIDTH
J
20µs PULSE WIDTH
°
°
T = 150 C
T = 25 C
J
0.1
0.01
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
10
3.0
2.5A
=
I
D
°
T = 150 C
2.5
2.0
1.5
1.0
0.5
0.0
J
1
°
T = 25 C
J
0.1
V
= 50V
DS
20µs PULSE WIDTH
V
=10V
GS
0.01
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
4.0
5.0
6.0
7.0 8.0
9.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF820AS/LPbF
10000
20
15
10
5
V
C
= 0V,
f = 1 MHZ
I = 2.5A
D
GS
V
V
V
= 400V
= 250V
= 100V
DS
DS
DS
= C + C
,
C
SHORTED
iss
gs
gd
ds
C
= C
rss
gd
C
= C + C
oss
ds gd
1000
100
10
Ciss
Coss
Crss
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
0
4
8
12
16
1
10
100
1000
Q , Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 150 C
J
10us
100us
1ms
1
°
T = 25 C
J
°
T = 25 C
10ms
C
°
T = 150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.4
0.1
0.6
0.8
1.0
1.2
10
100
1000
10000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF820AS/LPbF
RD
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
2
DM
0.1
0.01
0.02
0.01
t
1
SINGLE PULSE
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF820AS/LPbF
300
250
200
150
100
50
15V
I
D
TOP
1.1A
1.6A
BOTTOM 2.5A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
700
650
600
550
Q
Q
GD
GS
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
0.0
0.5
I
1.0
1.5
2.0
2.5
D.U.T.
-
, Avalanche Current ( A)
AV
V
GS
3mA
I
I
D
G
Current Sampling Resistors
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Fig 13b. Gate Charge Test Circuit
6
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IRF820AS/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® power MOSFETs
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7
IRF820AS/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 530S WIT H
P AR T N U MB E R
L OT COD E 8024
IN T E R N AT ION AL
R E CT IF IE R
L OGO
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB L Y L IN E "L "
F 530S
D AT E CODE
Y E AR 0 = 2000
W E E K 02
N ote: "P " in as s embly line
pos ition indicates "L ead-F ree"
AS S E MB L Y
L OT COD E
L INE
L
OR
P AR T N U MB E R
IN T E R N AT ION AL
R E CT IF IE R
L OGO
F 530 S
D AT E CODE
P
=
D E S IGN AT E S L E AD -F R E E
P R OD U CT (OP T ION AL )
AS S E M B L Y
L OT CODE
YE AR
WE E K 02
A = AS S E MB L Y S IT E COD E
0 = 2000
8
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IRF820AS/LPbF
TO-262 Package Outline
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
AS S EMBLED ON WW 19, 1997
IN THE AS S EMBLY LINE "C"
DATE CODE
YEAR 7 = 1997
WEEK 19
Note: "P" in assembly line
pos ition indicates "L ead-F ree"
AS S EMBLY
LOT CODE
LINE C
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
P = DES IGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
AS S EMBLY
LOT CODE
WEEK 19
A = AS SEMBLY SIT E CODE
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9
IRF820AS/LPbF
D2Pak Tape & Reel Infomation
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 45mH
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
RG = 25Ω, IAS = 2.5A. (See Figure 12)
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 2.5A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C
,
Uses IRF820A data and test conditions
* When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/04
10
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