IRFHS9351TR2PBF [INFINEON]
Small Signal Field-Effect Transistor, 2.3A I(D), 30V, 2-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, 2 X 2 MM, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, QFN-6;
| 型号： | IRFHS9351TR2PBF |
| 厂家： | 
Infineon |
| 描述： | Small Signal Field-Effect Transistor, 2.3A I(D), 30V, 2-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, 2 X 2 MM, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, QFN-6 开关 光电二极管 晶体管 |
| 文件： | 总9页 (文件大小：293K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRFHS9351PbF
HEXFET® Power MOSFET
VDS
-30
V
V
TOP VIEW
VGS max
±20
D1
G2
RDS(on) max
(@VGS = -10V)
S1 1
G1 2
D2 3
6 D1
5 G2
4 S2
170
-3.4
m
Ω
S2
D1
D1
D2
FET1
ID
A
S1
(@TC = 25°C)
G1
D2
D2
FET2
2mm x 2mm Dual PQFN
Applications
l Charge and Discharge Switch for Battery Application
l System/load switch
Features and Benefits
Features
Benefits
Low RDSon (≤ 170mΩ)
Lower Conduction Losses
Low Thermal Resistance to PCB (≤ 19°C/W)
Low Profile (≤ 1.0 mm)
Enable better thermal dissipation
results in Increased Power Density
Easier Manufacturing
Compatible with Existing Surface Mount Techniques
RoHS Compliant Containing no Lead, no Bromide and no Halogen
MSL1, Industrial Qualification
Environmentally Friendlier
Increased Reliability
Standard Pack
Orderable part number
Package Type
Note
Form
Quantity
4000
IRFHS9351TRPBF
IRFHS9351TR2PBF
PQFN 2mm x 2mm
PQFN 2mm x 2mm
Tape and Reel
Tape and Reel
400
EOL notice # 259
Absolute Maximum Ratings
Parameter
Max.
-30
Units
VDS
Drain-to-Source Voltage
V
VGS
Gate-to-Source Voltage
± 20
-2.3
-1.5
-5.1
-4.1
-3.4
-20
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
ID @ TC = 70°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
A
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Power Dissipation
Power Dissipation
PD @TA = 25°C
PD @ TA = 70°C
1.4
W
0.9
Linear Derating Factor
Operating Junction and
0.01
-55 to + 150
W/°C
°C
TJ
TSTG
Storage Temperature Range
Notes through are on page 2
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IRFHS9351PbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = -250μA
Parameter
Drain-to-Source Breakdown Voltage
Min.
Typ.
–––
0.02
135
235
-1.8
-4.6
–––
–––
–––
–––
–––
1.9
3.7
0.6
1.1
17
Max.
–––
–––
170
290
-2.4
–––
-1.0
-150
-100
100
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Units
V
BVDSS
-30
–––
–––
–––
-1.3
–––
–––
–––
–––
–––
2.4
Reference to 25°C, ID = -1mA
VGS = -10V, ID = -3.1A
VDSS/ TJ
Breakdown Voltage Temp. Coefficient
V/°C
RDS(on)
Static Drain-to-Source On-Resistance
m
VGS = -4.5V, ID = -2.5A
VGS(th)
VGS(th)
IDSS
Gate Threshold Voltage
V
VDS = VGS, ID = -10μA
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
mV/°C
VDS = -24V, VGS = 0V
VDS = -24V, VGS = 0V, TJ = 125°C
VGS = -20V
μA
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
nA
V
GS = 20V
VDS = -10V, ID = -3.1A
gfs
Qg
S
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
nC
VDS = -15V,VGS = -4.5V,ID = - 3.1A
Qg
V
GS = -10V
VDS = -15V
D = -3.1A
Total Gate Charge
Qgs
Qgd
RG
td(on)
tr
nC
Gate-to-Source Charge
Gate-to-Drain Charge
Gate R esistance
I
VDD = -15V, VGS = -4.5V
ID = -3.1A
Turn-On Delay Time
Rise Time
8.3
30
ns
pF
td(off)
tf
RG = 1.8
Turn-Off Delay Time
Fall Time
6.3
7.9
160
39
See Figs. 19a & 19b
Ciss
Coss
Crss
VGS = 0V
Input Capacitance
VDS = -25V
ƒ = 1.0KHz
Output Capacitance
Reverse Transfer Capacitance
26
Diode Characteristics
Parameter
Min.
Typ.
Max.
Units
Conditions
IS
Continuous Source Current
MOSFET symbol
D
S
–––
–––
-5.1
showing the
(Body Diode)
A
G
ISM
integral reverse
p-n junction diode.
Pulsed Source Current
(Body Diode)
–––
–––
–––
–––
-20
VSD
Diode Forward Voltage
-1.2
V
T
T
= 25°C, I = -3.1A, V
= 0V
J
S
GS
trr
= 25°C, I = -3.1A, VDD = -15V
F
Reverse Recovery Time
–––
–––
20
42
30
63
ns
J
Qrr
di/dt = 370/μs
Reverse Recovery Charge
nC
Thermal Resistance
Typ.
–––
–––
Max.
19
Parameter
Units
Junction-to-Case
R
R
R
R
JC (Bottom)
JC (Top)
Junction-to-Case
170
90
°C/W
Junction-to-Ambient
JA
JA
Junction-to-Ambient (t<10s)
–––
75
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Current limited by package. .
Pulse width ≤ 400μs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
ꢀ Rθ is measured at TJ of approximately 90°C.
For DESIGN AID ONLY, not subject to production testing.
.
2
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IRFHS9351PbF
100
10
1
100
10
1
VGS
VGS
-10V
TOP
-10V
TOP
-8.0V
-5.0V
-4.5V
-3.5V
-3.3V
-3.0V
-2.8V
-8.0V
-5.0V
-4.5V
-3.5V
-3.3V
-3.0V
-2.8V
BOTTOM
BOTTOM
-2.8V
-2.8V
60μs
≤
PULSE WIDTH
Tj = 150°C
≤60μs PULSE WIDTH
Tj = 25°C
0.1
0.1
0.1
1
10
100
0.1
1
10
100
-V , Drain-to-Source Voltage (V)
-V , Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
100
1.6
I
= -3.1A
D
V
= -10V
GS
1.4
1.2
1.0
0.8
0.6
10
1
T
= 150°C
T
J
= 25°C
V
J
= -15V
DS
60μs PULSE WIDTH
≤
0.1
1
2
3
4
5
6
7
8
-60 -40 -20
T
0
20 40 60 80 100120 140 160
, Junction Temperature (°C)
-V , Gate-to-Source Voltage (V)
GS
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
14
1000
100
10
V
C
= 0V,
f = 1 KHZ
GS
I
= -3.1A
V
V
= -24V
= -15V
D
= C + C , C SHORTED
DS
DS
iss
gs
gd ds
12
10
8
C
= C
rss
gd
C
= C + C
oss
ds
gd
C
iss
C
6
oss
C
rss
4
2
0
0
1
2
3
4
5
1
10
100
Q
, Total Gate Charge (nC)
-V , Drain-to-Source Voltage (V)
DS
G
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
3
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IRFHS9351PbF
100
10
1
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100μsec
1msec
T
= 150°C
J
1
DC
10msec
T
= 25°C
J
0.1
0.01
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
0.1
0.1
1
10
, Drain-to-Source Voltage (V)
DS
100
0.4
0.6
0.8
1.0
1.2
1.4
V
-V , Source-to-Drain Voltage (V)
SD
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
6
2.5
5
4
3
2
1
0
2.0
1.5
1.0
0.5
I
= -10uA
D
25
50
75
100
125
150
-75 -50 -25
0
25 50 75 100 125 150
T
, CaseTemperature (°C)
C
T , Temperature ( °C )
J
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
100
10
D = 0.50
0.20
0.10
0.05
1
0.1
0.02
0.01
Notes:
SINGLE PULSE
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
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IRFHS9351PbF
500
400
300
200
100
500
400
300
200
100
I
= -3.1A
D
Vgs = -4.5V
T
= 125°C
J
Vgs = -10V
T
= 25°C
5
J
0
10
15
20
25
0
2
4
6
8
-I , Drain Current (A)
D
-V
GS,
Gate -to -Source Voltage (V)
Fig 13. Typical On-Resistance vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
400
300
200
100
0
1E-5
1E-4
1E-3
1E-2
1E-1
1E+0
Time (sec)
Fig 14. Typical Power vs. Time
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T *
+
-
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
• di/dt controlled by RG
Re-Applied
Voltage
RG
+
-
• Driver same type as D.U.T.
Body Diode
Inductor Current
Forward Drop
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
* Reverse Polarity of D.U.T for P-Channel
Fig 15. Diode Reverse Recovery Test Circuit for P-Channel HEXFET® Power MOSFETs
5
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IRFHS9351PbF
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
20K
Qgs1
Qgs2
Qgodr
Qgd
Fig 16a. Gate Charge Test Circuit
Fig 16b. Gate Charge Waveform
L
V
DS
I
AS
D.U.T
R
G
V
DD
I
A
AS
-VGS
DRIVER
0.01
Ω
t
p
t
p
V
(BR)DSS
15V
Fig 17b. Unclamped Inductive Waveforms
Fig 17a. Unclamped Inductive Test Circuit
RD
VDS
t
t
r
t
t
f
d(on)
d(off)
VGS
V
GS
D.U.T.
10%
RG
-
VDD
+
-VGS
90%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
DS
Fig 18a. Switching Time Test Circuit
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Fig 18b. Switching Time Waveforms
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IRFHS9351PbF
PQFN Package Details
PQFN Part Marking
9351
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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IRFHS9351PbF
PQFN Tape and Reel
CORE
TAPE
Remark:
- Dimension above are typical dimensions.
Width
- Cover tape thickness is 0.048mm +/- 0.005mm.
- Surface resistivity 10E5 < Rs <10E9.
Table 2:
COVER
TAPE
TOLERANCE
(WIDTH)
+/- 0.1 mm
+/- 0.1 mm
5.4 mm
9.5 mm
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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IRFHS9351PbF
Qualification information†
Industrial††
(per JEDEC JESD47F ††† guidelines )
Qualification level
MS L 1
Moisture Sensitivity Level
RoHS compliant
PQFN 2mm x 2mm
(per I PC/JE DE C J-S T D-020D†††
Yes
)
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
•
Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #259)
5/13/2014
5/21/2014
• Updated data sheet based on corporate template.
•
Updated qual level from "Consumer" to "Industrial" on page 1 & 9.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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